coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

1 participants
3140 discussions

[S] Change in coreboot[main]: arch/x86: Use defines for GDT segments
by Patrick Rudolph (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Jérémy Compostella, Patrick Rudolph, Shuo Liu. Hello Jérémy Compostella, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87254?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: arch/x86: Use defines for GDT segments ...................................................................... arch/x86: Use defines for GDT segments Stop using magic values and use defines for GDT offsets. Change-Id: I40c15f6341bdef9cd457619ec81e7ac624ec2d63 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/wakeup.S M src/cpu/x86/smm/smm_stub.S M src/device/oprom/realmode/x86_asm.S 3 files changed, 9 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/87254/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87254?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40c15f6341bdef9cd457619ec81e7ac624ec2d63 Gerrit-Change-Number: 87254 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com>

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[XS] Change in coreboot[main]: device/Kconfig: Make option to allocate above 4G appear in Kconfig
by Angel Pons (Code Review) 10 Apr '25

10 Apr '25

Angel Pons has posted comments on this change by Alicja Michalska. ( https://review.coreboot.org/c/coreboot/+/86131?usp=email ) Change subject: device/Kconfig: Make option to allocate above 4G appear in Kconfig ...................................................................... Patch Set 14: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86131/comment/7492dbb7_a0a45f85?us… : PS14, Line 13: like Intel Arc or Radeon RX Out of curiosity, does Nvidia have ReBAR? -- To view, visit https://review.coreboot.org/c/coreboot/+/86131?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia17b3312016409d8fd6bcce4321481a7b7e35ce5 Gerrit-Change-Number: 86131 Gerrit-PatchSet: 14 Gerrit-Owner: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 10 Apr 2025 10:22:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/amd/common/cpu/noncar: Compute core info
by Naresh Solanki (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Angel Pons, Felix Held, Fred Reitberger, Jason Glenesk, Marvin Drees, Matt DeVillier. Naresh Solanki has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email ) Change subject: soc/amd/common/cpu/noncar: Compute core info ...................................................................... Patch Set 15: (1 comment) File src/soc/amd/common/block/include/amdblocks/cpu.h: https://review.coreboot.org/c/coreboot/+/85640/comment/9fc8c00e_9cba2245?us… : PS15, Line 17: size_t l3_cache_size; > This stores the L3 cache size, yes. […] byte -- To view, visit https://review.coreboot.org/c/coreboot/+/85640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46947e8ac62c903036a81642e03201e353c3dac6 Gerrit-Change-Number: 85640 Gerrit-PatchSet: 15 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Apr 2025 10:19:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: soc/amd/common/cpu/noncar: Compute core info
by Angel Pons (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Marvin Drees, Matt DeVillier, Naresh Solanki. Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email ) Change subject: soc/amd/common/cpu/noncar: Compute core info ...................................................................... Patch Set 15: (2 comments) File src/soc/amd/common/block/include/amdblocks/cpu.h: https://review.coreboot.org/c/coreboot/+/85640/comment/834622d2_11900d18?us… : PS15, Line 11: struct core_info { There might be a better way to order these fields to reduce the amount of padding in the struct (without packing it). https://review.coreboot.org/c/coreboot/+/85640/comment/439241bb_11143992?us… : PS15, Line 17: size_t l3_cache_size; This stores the L3 cache size, yes. But in which units? -- To view, visit https://review.coreboot.org/c/coreboot/+/85640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46947e8ac62c903036a81642e03201e353c3dac6 Gerrit-Change-Number: 85640 Gerrit-PatchSet: 15 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 10:13:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: src/soc/amd/* : Move CPU init in common code
by Angel Pons (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Felix Held, Martin L Roth, Naresh Solanki. Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/87214?usp=email ) Change subject: src/soc/amd/* : Move CPU init in common code ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87214?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If53455f359302f368f7c979defa2c1088c5c2f16 Gerrit-Change-Number: 87214 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 10 Apr 2025 10:09:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: mb/asus/h61-series: Add H61M-A/USB3
by Angel Pons (Code Review) 10 Apr '25

10 Apr '25

Angel Pons has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/86726?usp=email ) Change subject: mb/asus/h61-series: Add H61M-A/USB3 ...................................................................... Patch Set 2: (2 comments) Patchset: PS1: > I was in a bit of a rush since I did this in my former high school (one of the students wanted to ge […] USB 3.0 ports seem fine in OS, PCIe ports got tested and configured right. I didn't have enough time to test everything I wanted to test (among other things, I had to tear apart a monitor to replace its logic board with one I had fixed about 8 years ago) but I expect the rest of things to work. File src/mainboard/asus/h61-series/variants/h61m-a_usb3/overridetree.cb: PS1: > I ate the USB port settings for no reason, I should go get them back from autopork Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86726?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18b116d265e0b7105e13a317b552aab0e4bbc762 Gerrit-Change-Number: 86726 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 10 Apr 2025 10:05:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: mb/asus/h61-series: Add H61M-A/USB3
by Angel Pons (Code Review) 10 Apr '25

10 Apr '25

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86726?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/asus/h61-series: Add H61M-A/USB3 ...................................................................... mb/asus/h61-series: Add H61M-A/USB3 Add support for yet another of these LGA1155 boards. Nothing too fancy, just another slightly different combination of the same chips. Working: - Booting to Arch Linux using SeaBIOS (current version) - Native RAM init - Realtek Ethernet NIC - Some rear USB 2.0 and 3.0 (ASM1042) ports (did not test all) - At least one SATA port (did not test all) - libgfxinit to initialise a DVI-D display - PCIe x16 slot - Both PCIe x1 slots - EHCI debug (one of the rear USB 2.0 ports) Not working: - Automatic fan speed control (known limitation of Super I/O code) Untested: - HDMI, VGA - Internal flashing (board was ported using an EM100Pro) - Audio - Front USB ports - PS/2 ports Change-Id: I18b116d265e0b7105e13a317b552aab0e4bbc762 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/asus/h61-series/Kconfig M src/mainboard/asus/h61-series/Kconfig.name A src/mainboard/asus/h61-series/variants/h61m-a_usb3/board_info.txt A src/mainboard/asus/h61-series/variants/h61m-a_usb3/cmos.default A src/mainboard/asus/h61-series/variants/h61m-a_usb3/cmos.layout A src/mainboard/asus/h61-series/variants/h61m-a_usb3/data.vbt A src/mainboard/asus/h61-series/variants/h61m-a_usb3/early_init.c A src/mainboard/asus/h61-series/variants/h61m-a_usb3/gma-mainboard.ads A src/mainboard/asus/h61-series/variants/h61m-a_usb3/gpio.c A src/mainboard/asus/h61-series/variants/h61m-a_usb3/hda_verb.c A src/mainboard/asus/h61-series/variants/h61m-a_usb3/overridetree.cb 11 files changed, 491 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/86726/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86726?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18b116d265e0b7105e13a317b552aab0e4bbc762 Gerrit-Change-Number: 86726 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/nissa/var/meliks: Get wifi sar name
by Eric Lai (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Dinesh Gehlot, Nick Vaccaro, SH Kim, Subrata Banik. Eric Lai has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/87253?usp=email ) Change subject: mb/google/nissa/var/meliks: Get wifi sar name ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87253?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d7a08059c0ed7588311a421faf59146ac43001d Gerrit-Change-Number: 87253 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 10 Apr 2025 09:15:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/fatcat/var/felino: Use GPP_E03 for EC_SYNC_IRQ
by Kapil Porwal (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Pranava Y N, Tongtong Pan. Kapil Porwal has posted comments on this change by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/87210?usp=email ) Change subject: mb/google/fatcat/var/felino: Use GPP_E03 for EC_SYNC_IRQ ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87210?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7d120fcf2de8dbbbc399d2ead4e294d11ea8a14 Gerrit-Change-Number: 87210 Gerrit-PatchSet: 2 Gerrit-Owner: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 08:35:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/nissa/var/anraggar: Support x32 memory configuration
by Kapil Porwal (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Nick Vaccaro, Qinghong Zeng, Subrata Banik. Kapil Porwal has posted comments on this change by Qinghong Zeng. ( https://review.coreboot.org/c/coreboot/+/87234?usp=email ) Change subject: mb/google/nissa/var/anraggar: Support x32 memory configuration ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/anraggar/memory.c: https://review.coreboot.org/c/coreboot/+/87234/comment/7829bde2_29e18bc1?us… : PS1, Line 8: static const struct mb_cfg variant_memcfg = { : .type = MEM_TYPE_LP5X, : : .rcomp = { : /* Baseboard uses only 100ohm Rcomp resistors */ : .resistor = 100, : }, : : /* DQ byte map */ : .lpx_dq_map = { : .ddr0 = { : .dq0 = { 12, 9, 10, 11, 14, 13, 8, 15 }, : .dq1 = { 3, 1, 2, 0, 4, 7, 5, 6 }, : }, : .ddr1 = { : .dq0 = { 3, 1, 2, 0, 4, 7, 5, 6 }, : .dq1 = { 13, 9, 8, 11, 10, 14, 15, 12 }, : }, : .ddr2 = { : .dq0 = { 2, 1, 3, 0, 4, 6, 5, 7 }, : .dq1 = { 8, 9, 10, 11, 13, 14, 12, 15 }, : }, : .ddr3 = { : .dq0 = { 3, 0, 1, 2, 5, 6, 4, 7 }, : .dq1 = { 13, 9, 11, 8, 14, 15, 10, 12 }, : }, : .ddr4 = { : .dq0 = { 12, 9, 10, 11, 14, 13, 8, 15 }, : .dq1 = { 3, 1, 2, 0, 4, 7, 5, 6 }, : }, : .ddr5 = { : .dq0 = { 3, 1, 2, 0, 4, 7, 5, 6 }, : .dq1 = { 13, 9, 8, 11, 10, 14, 15, 12 }, : }, : .ddr6 = { : .dq0 = { 2, 1, 3, 0, 4, 6, 5, 7 }, : .dq1 = { 8, 9, 10, 11, 13, 14, 12, 15 }, : }, : .ddr7 = { : .dq0 = { 3, 0, 1, 2, 5, 6, 4, 7 }, : .dq1 = { 13, 9, 11, 8, 14, 15, 10, 12 }, : }, : }, : : /* DQS CPU<>DRAM map */ : .lpx_dqs_map = { : .ddr0 = { .dqs0 = 1, .dqs1 = 0 }, : .ddr1 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr2 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr3 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr4 = { .dqs0 = 1, .dqs1 = 0 }, : .ddr5 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr6 = { .dqs0 = 0, .dqs1 = 1 }, : .ddr7 = { .dqs0 = 0, .dqs1 = 1 }, : }, : : .lp5x_config = { : .ccc_config = 0xff, : }, : : .ect = 1, /* Early Command Training */ : : .UserBd = BOARD_TYPE_MOBILE, : }; : : const struct mb_cfg *variant_memory_params(void) : { : return &variant_memcfg; : } : : int variant_memory_sku(void) : { : /* : * Memory configuration board straps : * GPIO_MEM_CONFIG_0 GPP_E1 : * GPIO_MEM_CONFIG_1 GPP_E2 : * GPIO_MEM_CONFIG_2 GPP_E3 : */ : gpio_t spd_gpios[] = { : GPP_E1, : GPP_E2, : GPP_E3, : }; : : return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); : } : : bool variant_is_half_populated(void) : { : /* : * Ideally half_populated is used in platforms with multiple channels to : * enable only one half of the channel. Alder Lake N has single channel, : * and it would require for new structures to be defined in meminit block : * driver for LPx memory configurations. In order to avoid adding new : * structures, set half_populated to true. This has the same effect as : * having single channel with 64-bit width. : */ : return true; : } : : void variant_get_spd_info(struct mem_spd *spd_info) : { : spd_info->topo = MEM_TOPO_MEMORY_DOWN; : spd_info->cbfs_index = variant_memory_sku(); : } Not required here. Please remove. -- To view, visit https://review.coreboot.org/c/coreboot/+/87234?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic401d3db57659c6ced13c123591c1fd82fa9a721 Gerrit-Change-Number: 87234 Gerrit-PatchSet: 1 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Ginger Zhang <zhangqingchun(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 08:33:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit April 2025