coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: device/pci_ids: Add Amston Lake CPU IDs
by Harrie Paijmans (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Dinesh Gehlot, Erik van den Bogaert, Frans Hendriks, Harrie Paijmans, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Erik van den Bogaert, Frans Hendriks, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87243?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Erik van den Bogaert, Code-Review+1 by Kapil Porwal, Code-Review+2 by Frans Hendriks, Verified+1 by build bot (Jenkins) Change subject: device/pci_ids: Add Amston Lake CPU IDs ...................................................................... device/pci_ids: Add Amston Lake CPU IDs Intel processor number X7433RE. Based on docs 721616 rev 2.3. BUG=NA TEST=Boots on Intel Alder Lake CRB with X7433RE processor Change-Id: Ia43945887e7d536b5b7387a4dda4e245973c27ee Signed-off-by: Harrie Paijmans <hpaijmans(a)eltan.com> --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/alderlake/cpu.c M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/alderlake/include/soc/cpu.h M src/soc/intel/common/block/systemagent/systemagent.c 6 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/87243/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/87243?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia43945887e7d536b5b7387a4dda4e245973c27ee Gerrit-Change-Number: 87243 Gerrit-PatchSet: 3 Gerrit-Owner: Harrie Paijmans <hpaijmans(a)eltan.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Harrie Paijmans <hpaijmans(a)eltan.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB
by Alok Agarwal (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Ronak Kanabar, Subrata Banik, srinivas.kulkarni(a)intel.com. Alok Agarwal has posted comments on this change by Alok Agarwal. ( https://review.coreboot.org/c/coreboot/+/86949?usp=email ) Change subject: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB ...................................................................... Patch Set 6: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86949/comment/c613e410_55ef609c?us… : PS4, Line 7: src > remove `src` Done https://review.coreboot.org/c/coreboot/+/86949/comment/6697bc64_fb71a718?us… : PS4, Line 7: . > no `. […] Done https://review.coreboot.org/c/coreboot/+/86949/comment/c364e218_8c380153?us… : PS4, Line 8: : Update MEMORY_INFO_DATA_HOB, child structures and their data for SMBIOS type 16/17 design change. : > wrap up text Done https://review.coreboot.org/c/coreboot/+/86949/comment/e5e41531_b5961534?us… : PS4, Line 11: 406375765 > I have created bug b:409946211 Done https://review.coreboot.org/c/coreboot/+/86949/comment/a27d0bdc_1ba49d8d?us… : PS4, Line 12: Able to build google/fatcat. > Use a meaningful TEST message to explain what issue this CL resolves. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1f7ee111e299ef53795912f80b444c07facde11e Gerrit-Change-Number: 86949 Gerrit-PatchSet: 6 Gerrit-Owner: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: srinivas.kulkarni(a)intel.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: srinivas.kulkarni(a)intel.com Gerrit-Comment-Date: Fri, 11 Apr 2025 08:42:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Alok Agarwal <alok.agarwal(a)intel.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB
by Alok Agarwal (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Ronak Kanabar, Subrata Banik, srinivas.kulkarni(a)intel.com. Alok Agarwal has posted comments on this change by Alok Agarwal. ( https://review.coreboot.org/c/coreboot/+/86949?usp=email ) Change subject: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86949/comment/9245f60f_6dcb5ce6?us… : PS4, Line 11: 406375765 > please file a bug to understand this failure better. […] I have created bug b:409946211 -- To view, visit https://review.coreboot.org/c/coreboot/+/86949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1f7ee111e299ef53795912f80b444c07facde11e Gerrit-Change-Number: 86949 Gerrit-PatchSet: 6 Gerrit-Owner: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: srinivas.kulkarni(a)intel.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: srinivas.kulkarni(a)intel.com Gerrit-Comment-Date: Fri, 11 Apr 2025 08:41:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB
by Alok Agarwal (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Alok Agarwal, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Ronak Kanabar, srinivas.kulkarni(a)intel.com. Hello Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Ronak Kanabar, Subrata Banik, srinivas.kulkarni(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86949?usp=email to look at the new patch set (#6). Change subject: soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB ...................................................................... soc/intel/pantherlake: Adopt the MEMORY_INFO_DATA_HOB Update MEMORY_INFO_DATA_HOB, child structures and their data for SMBIOS type 16/17 design change. Related changes of MEMORY_INFO_DATA_HOB are available from FSP 3103_05 onwards. BUG=b:409946211 TEST=Verify that the updates to MEMORY_INFO_DATA_HOB and its child structures for SMBIOS type 16/17 design change are correctly integrated from FSP 3103_05 onwards. Ensure that the build process for google/fatcat completes successfully without errors, confirming that the build error in coreboot is resolved and able to boot. Change-Id: I1f7ee111e299ef53795912f80b444c07facde11e Signed-off-by: Alok Agarwal <alok.agarwal(a)intel.corp-partner.google.com> --- M src/soc/intel/pantherlake/romstage/romstage.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/86949/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/86949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1f7ee111e299ef53795912f80b444c07facde11e Gerrit-Change-Number: 86949 Gerrit-PatchSet: 6 Gerrit-Owner: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: srinivas.kulkarni(a)intel.com Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: srinivas.kulkarni(a)intel.com

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[S] Change in coreboot[main]: util/mediatek: Add check-pi-img.py
by Yu-Ping Wu (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/87226?usp=email ) Change subject: util/mediatek: Add check-pi-img.py ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/87226/comment/02e507c4_d752dd06?us… : PS2, Line 9: Add a script to perform validity check of the PI_IMG firmware. > For ignorants like me: […] Done. File util/mediatek/check-pi-img.py: https://review.coreboot.org/c/coreboot/+/87226/comment/3a2a3a3f_bebf9851?us… : PS2, Line 24: {} cookies found > Maybe extend the error message, that exactly two cookies need to be present. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/87226?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I27011492c7fab747aa3ee12d514d20a6a52d0a4d Gerrit-Change-Number: 87226 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 11 Apr 2025 08:24:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: util/mediatek: Add check-pi-img.py
by Yu-Ping Wu (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Yidi Lin, Yu-Ping Wu. Hello Yidi Lin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87226?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+2 by Yidi Lin, Verified+1 by build bot (Jenkins) Change subject: util/mediatek: Add check-pi-img.py ...................................................................... util/mediatek: Add check-pi-img.py According to MediaTek's proprietary PI_IMG parser, two cookies (one header and one footer) are expected. Therefore, add a script to perform validity check of the PI_IMG firmware, so that format errors could be caught in build time. Change-Id: I27011492c7fab747aa3ee12d514d20a6a52d0a4d Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M Documentation/util.md M util/README.md A util/mediatek/check-pi-img.py M util/mediatek/description.md 4 files changed, 38 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/87226/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/87226?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I27011492c7fab747aa3ee12d514d20a6a52d0a4d Gerrit-Change-Number: 87226 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: util/mtkheader: Rename to util/mediatek
by Yu-Ping Wu (Code Review) 11 Apr '25

11 Apr '25

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87225?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: util/mtkheader: Rename to util/mediatek ...................................................................... util/mtkheader: Rename to util/mediatek To allow adding more scripts to the util/mtkheader folder, rename it to util/mediatek. Also update description.md and regenerate Documentation/util.md and util/README.md by util_readme.sh. Change-Id: Ibc6ef9dddc541d2dd471898af431cadde231edca Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87225 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M Documentation/util.md M src/soc/mediatek/mt8173/Makefile.mk M src/soc/mediatek/mt8183/Makefile.mk M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8188/Makefile.mk M src/soc/mediatek/mt8189/Makefile.mk M src/soc/mediatek/mt8192/Makefile.mk M src/soc/mediatek/mt8195/Makefile.mk M src/soc/mediatek/mt8196/Makefile.mk M util/README.md M util/cbfstool/platform_fixups.c A util/mediatek/description.md R util/mediatek/gen-bl-img.py D util/mtkheader/description.md 14 files changed, 17 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved diff --git a/Documentation/util.md b/Documentation/util.md index 341a4c5..ba4618f 100644 --- a/Documentation/util.md +++ b/Documentation/util.md @@ -87,9 +87,11 @@ * __marvell__ - Add U-Boot boot loader for Marvell ARMADA38X `C` * __[me_cleaner](https://github.com/corna/me_cleaner)__ - Tool for partial deblobbing of Intel ME/TXE firmware images `Python` +* __mediatek__ + * gen-bl-img.py - Generate MediaTek bootloader header. +`Python3` * __mma__ - Memory Margin Analysis automation tests `Bash` * __msrtool__ - Dumps chipset-specific MSR registers. `C` -* __mtkheader__ - Generate MediaTek bootload header. `Python3` * __nvidia__ - nvidia blob parsers * __nvramtool__ - Reads and writes coreboot parameters and displaying information from the coreboot table in CMOS/NVRAM. `C` diff --git a/src/soc/mediatek/mt8173/Makefile.mk b/src/soc/mediatek/mt8173/Makefile.mk index ee698b7..49861a7 100644 --- a/src/soc/mediatek/mt8173/Makefile.mk +++ b/src/soc/mediatek/mt8173/Makefile.mk @@ -79,7 +79,7 @@ # Generate the actual coreboot bootblock code $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8173 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8173 sf $< $@ CPPFLAGS_common += -Isrc/soc/mediatek/mt8173/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include diff --git a/src/soc/mediatek/mt8183/Makefile.mk b/src/soc/mediatek/mt8183/Makefile.mk index bd50780..c1fd3b8 100644 --- a/src/soc/mediatek/mt8183/Makefile.mk +++ b/src/soc/mediatek/mt8183/Makefile.mk @@ -96,6 +96,6 @@ CPPFLAGS_common += -Isrc/soc/mediatek/common/include $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 emmc $< $@ + ./util/mediatek/gen-bl-img.py mt8183 emmc $< $@ endif diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk index ea4bcfc..c6c47fd 100644 --- a/src/soc/mediatek/mt8186/Makefile.mk +++ b/src/soc/mediatek/mt8186/Makefile.mk @@ -81,6 +81,6 @@ cbfs-files-y += $(DRAM_CBFS) $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8183 sf $< $@ endif diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk index 2c8379e..dc6b649 100644 --- a/src/soc/mediatek/mt8188/Makefile.mk +++ b/src/soc/mediatek/mt8188/Makefile.mk @@ -91,6 +91,6 @@ cbfs-files-y += $(DRAM_CBFS) $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8183 sf $< $@ endif diff --git a/src/soc/mediatek/mt8189/Makefile.mk b/src/soc/mediatek/mt8189/Makefile.mk index 7631bc6..592734f 100644 --- a/src/soc/mediatek/mt8189/Makefile.mk +++ b/src/soc/mediatek/mt8189/Makefile.mk @@ -39,6 +39,6 @@ cbfs-files-y += $(DRAM_CBFS) endif $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8189 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8189 sf $< $@ endif diff --git a/src/soc/mediatek/mt8192/Makefile.mk b/src/soc/mediatek/mt8192/Makefile.mk index b2c3ced..90a4e6d 100644 --- a/src/soc/mediatek/mt8192/Makefile.mk +++ b/src/soc/mediatek/mt8192/Makefile.mk @@ -83,6 +83,6 @@ cbfs-files-y += $(DRAM_CBFS) $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8183 sf $< $@ endif diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk index ecc6965..c460d58 100644 --- a/src/soc/mediatek/mt8195/Makefile.mk +++ b/src/soc/mediatek/mt8195/Makefile.mk @@ -101,6 +101,6 @@ cbfs-files-y += $(DRAM_CBFS) $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8183 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8183 sf $< $@ endif diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index fa0e3fe..903f57b 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -135,6 +135,6 @@ cbfs-files-y += $(FSP_RAMSTAGE_CBFS) $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin - ./util/mtkheader/gen-bl-img.py mt8196 sf $< $@ + ./util/mediatek/gen-bl-img.py mt8196 sf $< $@ endif diff --git a/util/README.md b/util/README.md index f40036b..7c93947 100644 --- a/util/README.md +++ b/util/README.md @@ -78,9 +78,11 @@ * __marvell__ - Add U-Boot boot loader for Marvell ARMADA38X `C` * __[me_cleaner](https://github.com/corna/me_cleaner)__ - Tool for partial deblobbing of Intel ME/TXE firmware images `Python` +* __mediatek__ + * gen-bl-img.py - Generate MediaTek bootloader header. +`Python3` * __mma__ - Memory Margin Analysis automation tests `Bash` * __msrtool__ - Dumps chipset-specific MSR registers. `C` -* __mtkheader__ - Generate MediaTek bootload header. `Python3` * __nvidia__ - nvidia blob parsers * __nvramtool__ - Reads and writes coreboot parameters and displaying information from the coreboot table in CMOS/NVRAM. `C` diff --git a/util/cbfstool/platform_fixups.c b/util/cbfstool/platform_fixups.c index 12a5ad7..74035bb 100644 --- a/util/cbfstool/platform_fixups.c +++ b/util/cbfstool/platform_fixups.c @@ -109,7 +109,7 @@ } /* - * MediaTek bootblock.bin layout (see util/mtkheader/gen-bl-img.py): + * MediaTek bootblock.bin layout (see util/mediatek/gen-bl-img.py): * header 2048 bytes * gfh info 176 bytes, where bytes 32-35 (in little endian) is the * total size excluding the header (gfh info + data + hash) diff --git a/util/mediatek/description.md b/util/mediatek/description.md new file mode 100644 index 0000000..67ff390 --- /dev/null +++ b/util/mediatek/description.md @@ -0,0 +1,2 @@ +__mediatek__ + * gen-bl-img.py - Generate MediaTek bootloader header. `Python3` diff --git a/util/mtkheader/gen-bl-img.py b/util/mediatek/gen-bl-img.py similarity index 100% rename from util/mtkheader/gen-bl-img.py rename to util/mediatek/gen-bl-img.py diff --git a/util/mtkheader/description.md b/util/mtkheader/description.md deleted file mode 100644 index 01c0776c..0000000 --- a/util/mtkheader/description.md +++ /dev/null @@ -1 +0,0 @@ -Generate MediaTek bootload header. `Python3` -- To view, visit https://review.coreboot.org/c/coreboot/+/87225?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibc6ef9dddc541d2dd471898af431cadde231edca Gerrit-Change-Number: 87225 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: Documentation,util: Run util_readme.sh to regen *.md
by Yu-Ping Wu (Code Review) 11 Apr '25

11 Apr '25

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87224?usp=email ) Change subject: Documentation,util: Run util_readme.sh to regen *.md ...................................................................... Documentation,util: Run util_readme.sh to regen *.md As CB:71757 [1] updates Documentation/util.md and util/README.md manually without modifying util/intelp2m/description.md, we port the description changes back to that file. [1] commit da54bd60af60 ("Documentation: Update information about intelp2m") Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87224 Reviewed-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> --- M Documentation/util.md M util/README.md M util/intelp2m/description.md 3 files changed, 6 insertions(+), 6 deletions(-) Approvals: Maxim Polyakov: Looks good to me, approved Paul Menzel: Looks good to me, but someone else must approve Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/Documentation/util.md b/Documentation/util.md index e6d1402..341a4c5 100644 --- a/Documentation/util.md +++ b/Documentation/util.md @@ -70,8 +70,8 @@ `C` * __intelmetool__ - Dump interesting things about Management Engine even if hidden `C` -* __intelp2m__ - Convert the inteltool register dump to gpio.h with GPIO -configuration for porting coreboot to your motherboard. `Go` +* __intelp2m__ - Convert the inteltool register dump to gpio.h with +GPIO configuration for porting coreboot to your motherboard. `Go` * __inteltool__ - Provides information about the Intel CPU/chipset hardware configuration (register contents, MSRs, etc). `C` * __intelvbttool__ - Parse VBT from VGA BIOS `C` diff --git a/util/README.md b/util/README.md index 6d58d7a..f40036b 100644 --- a/util/README.md +++ b/util/README.md @@ -61,8 +61,8 @@ `C` * __intelmetool__ - Dump interesting things about Management Engine even if hidden `C` -* __intelp2m__ - Generate a GPIO configuration based on a register dump -obtained using inteltool. `Go` +* __intelp2m__ - Convert the inteltool register dump to gpio.h with +GPIO configuration for porting coreboot to your motherboard. `Go` * __inteltool__ - Provides information about the Intel CPU/chipset hardware configuration (register contents, MSRs, etc). `C` * __intelvbttool__ - Parse VBT from VGA BIOS `C` diff --git a/util/intelp2m/description.md b/util/intelp2m/description.md index 5d718b0..b6cf527 100644 --- a/util/intelp2m/description.md +++ b/util/intelp2m/description.md @@ -1,2 +1,2 @@ -convert the configuration DW0/1 registers value from an inteltool dump -to coreboot macros. `go` +Convert the inteltool register dump to gpio.h with GPIO configuration +for porting coreboot to your motherboard. `Go` -- To view, visit https://review.coreboot.org/c/coreboot/+/87224?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737 Gerrit-Change-Number: 87224 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com>

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[XS] Change in coreboot[main]: soc/qualcomm: Use runtime check for QUP wrapper 2 init
by Kapil Porwal (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Julius Werner, Paul Menzel, Subrata Banik. Kapil Porwal has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87271?usp=email ) Change subject: soc/qualcomm: Use runtime check for QUP wrapper 2 init ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I553ee4891abc5dd744b69bcbee1cca2efd993ef3 Gerrit-Change-Number: 87271 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 11 Apr 2025 08:15:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: arch/x86: Use defines for GDT segments
by Shuo Liu (Code Review) 11 Apr '25

11 Apr '25

Attention is currently required from: Jérémy Compostella, Patrick Rudolph. Shuo Liu has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/87254?usp=email ) Change subject: arch/x86: Use defines for GDT segments ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/87254?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40c15f6341bdef9cd457619ec81e7ac624ec2d63 Gerrit-Change-Number: 87254 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Fri, 11 Apr 2025 08:12:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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