coreboot-gerrit March 2025

coreboot-gerrit@coreboot.org

1 participants
2811 discussions

[XS] Change in coreboot[main]: mb/google/brya/vell: Enable RTD3 for SSD to resolve S0ix issue
by Subrata Banik (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Pranava Y N. Subrata Banik has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/86646?usp=email ) Change subject: mb/google/brya/vell: Enable RTD3 for SSD to resolve S0ix issue ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86646?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9015f992cc797af013e8882630220b3df41dc9b3 Gerrit-Change-Number: 86646 Gerrit-PatchSet: 2 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:37:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya: Enable RTD3 for SSD to resolve S0ix issue
by Subrata Banik (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N. Subrata Banik has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/86685?usp=email ) Change subject: mb/google/brya: Enable RTD3 for SSD to resolve S0ix issue ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86685?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc85b85ef57216dc394f9a2e1b25bb7154da658f Gerrit-Change-Number: 86685 Gerrit-PatchSet: 1 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:37:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya/gladios: Enable RTD3 for SSD
by Subrata Banik (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Pranava Y N. Subrata Banik has posted comments on this change by Pranava Y N. ( https://review.coreboot.org/c/coreboot/+/86648?usp=email ) Change subject: mb/google/brya/gladios: Enable RTD3 for SSD ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86648?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I329e3a99e2e5c7cf4a51d7d8606987f5277d4584 Gerrit-Change-Number: 86648 Gerrit-PatchSet: 1 Gerrit-Owner: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:37:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd/glinda/cpu: Implement soc_fill_cpu_cache_info helper
by Angel Pons (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Felix Held, Jérémy Compostella, Maximilian Brune, Naresh Solanki, Patrick Rudolph, Paul Menzel. Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85640?usp=email ) Change subject: soc/amd/glinda/cpu: Implement soc_fill_cpu_cache_info helper ...................................................................... Patch Set 6: (1 comment) File src/soc/amd/glinda/cpu.c: https://review.coreboot.org/c/coreboot/+/85640/comment/91dc069b_3c251131?us… : PS6, Line 42: *info = info_list[0]; Now that I think of it, we only need to save the CPU cache info for CPU index 0. For the rest of CPU indices, we only use the cache size and the unique ID. So we might as well use a separate structure. Or, given that the code already seems to assume that cache info is the same for all CPUs (except for size, of course), we could just call `x86_get_cpu_cache_info()` and update the cache size accordingly. -- To view, visit https://review.coreboot.org/c/coreboot/+/85640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I46947e8ac62c903036a81642e03201e353c3dac6 Gerrit-Change-Number: 85640 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:26:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: arch/x86/cpu: Add element id to struct cpu_cache_info
by Angel Pons (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Felix Held, Jérémy Compostella, Naresh Solanki. Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85639?usp=email ) Change subject: arch/x86/cpu: Add element id to struct cpu_cache_info ...................................................................... Patch Set 3: (1 comment) File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/85639/comment/6dc11cc5_8331a40b?us… : PS3, Line 273: unique_id > When multiple caches share a "unique" ID, they are the same cache Now that I think of it, if the only things that need to be tracked per cache are the ID and the size, we don't need to add this field here. -- To view, visit https://review.coreboot.org/c/coreboot/+/85639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29002931b559a05756419e0c4ec5c78586d3c3a5 Gerrit-Change-Number: 85639 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:21:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: arch/x86/cpu: Add element id to struct cpu_cache_info
by Angel Pons (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Felix Held, Jérémy Compostella, Naresh Solanki. Angel Pons has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85639?usp=email ) Change subject: arch/x86/cpu: Add element id to struct cpu_cache_info ...................................................................... Patch Set 3: Code-Review+1 (1 comment) File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/85639/comment/bcc72b1a_1a3379b3?us… : PS3, Line 273: unique_id > Is it called "unique" in the spec? When multiple caches share a "unique" ID, is it then unique at al […] When multiple caches share a "unique" ID, they are the same cache -- To view, visit https://review.coreboot.org/c/coreboot/+/85639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29002931b559a05756419e0c4ec5c78586d3c3a5 Gerrit-Change-Number: 85639 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:20:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[S] Change in coreboot[main]: google/fatcat/var/fatcat: Update GSPI0 CS pin
by Paul Menzel (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Andy Ebrahiem, Henry Barnor, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Paul Menzel has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86480?usp=email ) Change subject: google/fatcat/var/fatcat: Update GSPI0 CS pin ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86480/comment/95b7b246_ddf4f33a?us… : PS5, Line 12: > Acknowledged I do not see it. -- To view, visit https://review.coreboot.org/c/coreboot/+/86480?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9d80e163fd4e3e21cc153091bb40763e78d6c595 Gerrit-Change-Number: 86480 Gerrit-PatchSet: 8 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:17:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jayvik Desai <jayvik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb/cwwk/adl: Fix HDMI, PCIe CLKREQ, EC, TPM
by Paul Menzel (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Brandon Weeks, Felix Held. Paul Menzel has posted comments on this change by Brandon Weeks. ( https://review.coreboot.org/c/coreboot/+/86260?usp=email ) Change subject: mb/cwwk/adl: Fix HDMI, PCIe CLKREQ, EC, TPM ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86260/comment/55c2ba79_211439c4?us… : PS2, Line 10: vendor firmware > I don't think the vendor firmware has meaningful versions. […] Understood. -- To view, visit https://review.coreboot.org/c/coreboot/+/86260?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9365e76c593b7e4a334dcdc5ecd46da253e14716 Gerrit-Change-Number: 86260 Gerrit-PatchSet: 5 Gerrit-Owner: Brandon Weeks <bweeks(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Brandon Weeks <bweeks(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:14:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Brandon Weeks <bweeks(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/geralt: Adjust VSP/VSN voltage for CSOT_PNA957QT1_1 panel
by Paul Menzel (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Hung-Te Lin, Xinxiong Xu, Yang Wu, cong yang. Paul Menzel has posted comments on this change by Yang Wu. ( https://review.coreboot.org/c/coreboot/+/86640?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/google/geralt: Adjust VSP/VSN voltage for CSOT_PNA957QT1_1 panel ...................................................................... Patch Set 5: (2 comments) Patchset: PS5: The diff looks good. Commit Message: https://review.coreboot.org/c/coreboot/+/86640/comment/6ee802d5_bfa0ad33?us… : PS3, Line 15: TEST=Boot to firmware screen > Before modifying the voltage, there may be some screen flickering after the kernel boot. […] Please add this to the commit message. I suggest at the beginning to start with the problem description. Is there an upstream report, so this can be added to the Linux driver? -- To view, visit https://review.coreboot.org/c/coreboot/+/86640?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1b69303317f5ef47818f4a6a0c851bf650285e51 Gerrit-Change-Number: 86640 Gerrit-PatchSet: 5 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xinxiong Xu <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:13:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com>

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[XS] Change in coreboot[main]: arch/x86/cpu: Add element id to struct cpu_cache_info
by Patrick Rudolph (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Felix Held, Jérémy Compostella, Naresh Solanki. Patrick Rudolph has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85639?usp=email ) Change subject: arch/x86/cpu: Add element id to struct cpu_cache_info ...................................................................... Patch Set 3: (1 comment) File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/85639/comment/9f3910e9_d665f166?us… : PS3, Line 273: unique_id Is it called "unique" in the spec? When multiple caches share a "unique" ID, is it then unique at all? -- To view, visit https://review.coreboot.org/c/coreboot/+/85639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29002931b559a05756419e0c4ec5c78586d3c3a5 Gerrit-Change-Number: 85639 Gerrit-PatchSet: 3 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 10:13:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit March 2025