coreboot-gerrit March 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/amd/cpu: smbios: Set external clock to 100 MHz
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Naresh Solanki. Felix Held has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85636?usp=email ) Change subject: soc/amd/cpu: smbios: Set external clock to 100 MHz ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > this one should have been made more genetic. […] revert: CB:86689 -- To view, visit https://review.coreboot.org/c/coreboot/+/85636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99f73695019612d58b0c78c6985370d23c78b729 Gerrit-Change-Number: 85636 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 14:19:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: soc/amd/glinda/cpu: Update smbios parameters
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Naresh Solanki. Felix Held has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85637?usp=email ) Change subject: soc/amd/glinda/cpu: Update smbios parameters ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > this one should likely have been made more genetic. […] CB:86688 -- To view, visit https://review.coreboot.org/c/coreboot/+/85637?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8eaa54c9a0086f4d397a7ddb01009acfd3f1aee Gerrit-Change-Number: 85637 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 14:19:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[XS] Change in coreboot[main]: Revert "soc/amd/cpu: smbios: Set external clock to 100 MHz"
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86689?usp=email ) Change subject: Revert "soc/amd/cpu: smbios: Set external clock to 100 MHz" ...................................................................... Revert "soc/amd/cpu: smbios: Set external clock to 100 MHz" This reverts commit fe107c1ad217243d68e55d7e238fc59c15d30d70. I have strong doubts that this is Glinda-specific, so this likely should have been made common after verifying. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ib7282e2bec4d6aa5b74efa5621c825bc234cca82 --- M src/soc/amd/glinda/cpu.c 1 file changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/86689/1 diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index 2638007..a716127 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -7,16 +7,11 @@ #include <cpu/amd/microcode.h> #include <cpu/cpu.h> #include <device/device.h> -#include <smbios.h> #include <soc/cpu.h> _Static_assert(CONFIG_MAX_CPUS == 24, "Do not override MAX_CPUS. To reduce the number of " "available cores, use the downcore_mode and disable_smt devicetree settings instead."); -unsigned int smbios_processor_external_clock(void) -{ - return 100; // 100 MHz -} static void zen_2_3_init(struct device *dev) { check_mca(); -- To view, visit https://review.coreboot.org/c/coreboot/+/86689?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib7282e2bec4d6aa5b74efa5621c825bc234cca82 Gerrit-Change-Number: 86689 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: Revert "soc/amd/glinda/cpu: Update smbios parameters"
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86688?usp=email ) Change subject: Revert "soc/amd/glinda/cpu: Update smbios parameters" ...................................................................... Revert "soc/amd/glinda/cpu: Update smbios parameters" This reverts commit 00b4a61dc53c68b47d1452c387409f2eadf32c93. I have strong doubts that this is Glinda-specific, so this probably should have been made common after verifying. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ie7fa0dca4c92f7bb0d49956aa9f1588b5fcba585 --- M src/soc/amd/glinda/cpu.c 1 file changed, 0 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/86688/1 diff --git a/src/soc/amd/glinda/cpu.c b/src/soc/amd/glinda/cpu.c index 680b095..2638007 100644 --- a/src/soc/amd/glinda/cpu.c +++ b/src/soc/amd/glinda/cpu.c @@ -17,22 +17,6 @@ { return 100; // 100 MHz } - -unsigned int smbios_cache_error_correction_type(u8 level) -{ - return SMBIOS_CACHE_ERROR_CORRECTION_MULTI_BIT; -} - -unsigned int smbios_cache_conf_operation_mode(u8 level) -{ - return SMBIOS_CACHE_OP_MODE_WRITE_BACK; -} - -unsigned int smbios_cache_sram_type(void) -{ - return SMBIOS_CACHE_SRAM_TYPE_PIPELINE_BURST; -} - static void zen_2_3_init(struct device *dev) { check_mca(); -- To view, visit https://review.coreboot.org/c/coreboot/+/86688?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie7fa0dca4c92f7bb0d49956aa9f1588b5fcba585 Gerrit-Change-Number: 86688 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: soc/amd/glinda/cpu: Update smbios parameters
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Felix Held has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85637?usp=email ) Change subject: soc/amd/glinda/cpu: Update smbios parameters ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: this one should likely have been made more genetic. should i revert this one now? -- To view, visit https://review.coreboot.org/c/coreboot/+/85637?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If8eaa54c9a0086f4d397a7ddb01009acfd3f1aee Gerrit-Change-Number: 85637 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 Mar 2025 14:14:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/amd/cpu: smbios: Set external clock to 100 MHz
by Felix Held (Code Review) 03 Mar '25

03 Mar '25

Felix Held has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85636?usp=email ) Change subject: soc/amd/cpu: smbios: Set external clock to 100 MHz ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: this one should have been made more genetic. should i revert this one now? -- To view, visit https://review.coreboot.org/c/coreboot/+/85636?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99f73695019612d58b0c78c6985370d23c78b729 Gerrit-Change-Number: 85636 Gerrit-PatchSet: 6 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 03 Mar 2025 14:14:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: google/fatcat/var/fatcat: Update GSPI0 CS pin
by Subrata Banik (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Andy Ebrahiem, Henry Barnor, Jayvik Desai, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86480?usp=email ) Change subject: google/fatcat/var/fatcat: Update GSPI0 CS pin ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/fatcat/variants/fatcat/fw_config.c: https://review.coreboot.org/c/coreboot/+/86480/comment/29424d3b_cea05f86?us… : PS8, Line 486: PAD_NC(GPP_E17, NONE), at line 480 -- To view, visit https://review.coreboot.org/c/coreboot/+/86480?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9d80e163fd4e3e21cc153091bb40763e78d6c595 Gerrit-Change-Number: 86480 Gerrit-PatchSet: 8 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Mar 2025 13:30:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: google/fatcat/var/fatcat: Update GSPI0 CS pin
by Subrata Banik (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Andy Ebrahiem, Henry Barnor, Jayvik Desai, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86480?usp=email ) Change subject: google/fatcat/var/fatcat: Update GSPI0 CS pin ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: Please remove GPP_E17 programming from gpio.c file now -- To view, visit https://review.coreboot.org/c/coreboot/+/86480?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9d80e163fd4e3e21cc153091bb40763e78d6c595 Gerrit-Change-Number: 86480 Gerrit-PatchSet: 8 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Reviewer: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Andy Ebrahiem <ahmet.ebrahiem(a)9elements.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Henry Barnor <hbarnor(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Mar 2025 13:29:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: drivers/intel/usb4: Add mainboard function to get EC port
by Derek Huang (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Derek Huang, Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub "Kuba" Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86673?usp=email to look at the new patch set (#5). Change subject: drivers/intel/usb4: Add mainboard function to get EC port ...................................................................... drivers/intel/usb4: Add mainboard function to get EC port This patch adds mainboard override function which allows for custom port mapping between CPU physical port and EC port to accommodate the non-sequential mapping. Mainboard code must implement this function if the CPU physical port to EC port mapping is not sequential. BUG=b:399032094 TEST=build and verify TCSS port and EC port mapping Change-Id: Ibaad2a95d8624564ae012d23e8a7f19f6701db2c Signed-off-by: Derek Huang <derekhuang(a)google.com> --- M src/drivers/intel/usb4/retimer/retimer.h M src/soc/intel/meteorlake/retimer.c 2 files changed, 27 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/86673/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaad2a95d8624564ae012d23e8a7f19f6701db2c Gerrit-Change-Number: 86673 Gerrit-PatchSet: 5 Gerrit-Owner: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Save HW protect temperature to SRAM
by Yidi Lin (Code Review) 03 Mar '25

03 Mar '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86551?usp=email ) Change subject: soc/mediatek/mt8196: Save HW protect temperature to SRAM ...................................................................... Patch Set 4: (3 comments) File src/soc/mediatek/mt8196/thermal.c: https://review.coreboot.org/c/coreboot/+/86551/comment/8cf92cf5_2a5cd50e?us… : PS2, Line 606: if (tc_num == LVTS_AP_CONTROLLER0) : tc_index = 0; : else if (tc_num == LVTS_AP_CONTROLLER1) : tc_index = 1; : : if (tc_index != 0xff) { : thermal_write_reboot_msr_sram(tc_index, raw_high); : if (tc_index == 0) : thermal_write_reboot_temp_sram(tc->reboot_temperature); : } > patch: 86687 The patch order is wrong. @jarried.lin@mediatek.com can you organize the patches order ? File src/soc/mediatek/mt8196/thermal_sram.c: https://review.coreboot.org/c/coreboot/+/86551/comment/d97da93b_e8f6536e?us… : PS4, Line 67: unsigned int `uint32_t` https://review.coreboot.org/c/coreboot/+/86551/comment/6012b430_67278707?us… : PS4, Line 72: int idx, unsigned int value `unsigned int idx, uint32_t value` -- To view, visit https://review.coreboot.org/c/coreboot/+/86551?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib714c297871132907e286536c4b3aea1532f3869 Gerrit-Change-Number: 86551 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 03 Mar 2025 12:04:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit March 2025