coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

1 participants
2886 discussions

[S] Change in coreboot[main]: src/cpu/intel/car/romstage: Refactor stack guard code in romstage
by Name of user not set (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Name of user not set #1005756, Patrick Rudolph. Hello Intel coreboot Reviewers, Patrick Rudolph, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86562?usp=email to look at the new patch set (#3). Change subject: src/cpu/intel/car/romstage: Refactor stack guard code in romstage ...................................................................... src/cpu/intel/car/romstage: Refactor stack guard code in romstage Factor out stack_guard_set() and stack_guard_check(). It's just for improving readability. :) Change-Id: I754e422c0023cd7824dd6109f031239756acff4b Signed-off-by: melongmelong <knw0507(a)naver.com> --- M src/cpu/intel/car/romstage.c 1 file changed, 31 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/86562/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I754e422c0023cd7824dd6109f031239756acff4b Gerrit-Change-Number: 86562 Gerrit-PatchSet: 3 Gerrit-Owner: Name of user not set #1005756 Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Patrick Rudolph Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Patrick Rudolph Gerrit-Attention: Name of user not set #1005756

1 0

[XS] Change in coreboot[main]: soc/amd/glinda: Enable x86_64 support
by Ana Carolina Cabral (Code Review) 24 Feb '25

24 Feb '25

Ana Carolina Cabral has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86581?usp=email ) Change subject: soc/amd/glinda: Enable x86_64 support ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86581?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If1b5d91a376770c0f0e1a4ee46dd625b401fbfa6 Gerrit-Change-Number: 86581 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Feb 2025 12:00:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: soc/amd/common/block/lpc: Add ROM2 and ROM3 helper functions
by Ana Carolina Cabral (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph. Ana Carolina Cabral has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86583?usp=email ) Change subject: soc/amd/common/block/lpc: Add ROM2 and ROM3 helper functions ...................................................................... Patch Set 1: (2 comments) File src/soc/amd/common/block/lpc/lpc_util.c: https://review.coreboot.org/c/coreboot/+/86583/comment/8264cdc2_78d67c74?us… : PS1, Line 292: * The maxium window size is 16 MiB. > `'maxium' may be misspelled - perhaps 'maximum'?` Please fix. https://review.coreboot.org/c/coreboot/+/86583/comment/c9009768_e57e5d33?us… : PS1, Line 314: * Default at 0xfd00000000. The maxium window size is 64 MiB. > `'maxium' may be misspelled - perhaps 'maximum'?` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/86583?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10d4f0fe8a38e0ba2784a9839270d5dd3398d47a Gerrit-Change-Number: 86583 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 24 Feb 2025 11:48:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v5.0
by Jarried Lin (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Liu Liu. Jarried Lin has posted comments on this change by Liu Liu. ( https://review.coreboot.org/c/blobs/+/86586?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v5.0 ...................................................................... Patch Set 2: (4 comments) Patchset: PS2: Please change sspm.bin to Commit Message: https://review.coreboot.org/c/blobs/+/86586/comment/02074cfb_f5da8e81?usp=e… : PS2, Line 9: Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video problems Update sspm.bin to configure USB registers, reducing LDM delay time and resolving USB audio and video issues. "Please notice 72 char perline" https://review.coreboot.org/c/blobs/+/86586/comment/404ee83a_35bc7ddb?usp=e… : PS2, Line 12: TEST=Build pass and test pass test what? elaborate. File soc/mediatek/mt8196/sspm_release_notes.txt: https://review.coreboot.org/c/blobs/+/86586/comment/2ca15df4_66290c14?usp=e… : PS2, Line 4: 1. Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video issues 72 char perline -- To view, visit https://review.coreboot.org/c/blobs/+/86586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Gerrit-Change-Number: 86586 Gerrit-PatchSet: 2 Gerrit-Owner: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Mon, 24 Feb 2025 10:18:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v5.0
by Liu Liu (Code Review) 24 Feb '25

24 Feb '25

Liu Liu has uploaded a new patch set (#2). ( https://review.coreboot.org/c/blobs/+/86586?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v5.0 ...................................................................... soc/mediatek/mt8196: Update SSPM firmware to v5.0 Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video problems BRANCH=rauru TEST=Build pass and test pass BUG=b:361690180 Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Signed-off-by: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/sspm.bin M soc/mediatek/mt8196/sspm.bin.md5 M soc/mediatek/mt8196/sspm_release_notes.txt 3 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/86/86586/2 -- To view, visit https://review.coreboot.org/c/blobs/+/86586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Gerrit-Change-Number: 86586 Gerrit-PatchSet: 2 Gerrit-Owner: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com>

1 0

[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v5.0
by Liu Liu (Code Review) 24 Feb '25

24 Feb '25

Liu Liu has uploaded this change for review. ( https://review.coreboot.org/c/blobs/+/86586?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v5.0 ...................................................................... soc/mediatek/mt8196: Update SSPM firmware to v5.0 Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video problems BRANCH=rauru TEST=Build pass and test pass BUG=b: Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Signed-off-by: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/sspm.bin M soc/mediatek/mt8196/sspm.bin.md5 M soc/mediatek/mt8196/sspm_release_notes.txt 3 files changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/86/86586/1 diff --git a/soc/mediatek/mt8196/sspm.bin b/soc/mediatek/mt8196/sspm.bin old mode 100644 new mode 100755 index 09cd109..ce12d69 --- a/soc/mediatek/mt8196/sspm.bin +++ b/soc/mediatek/mt8196/sspm.bin Binary files differ diff --git a/soc/mediatek/mt8196/sspm.bin.md5 b/soc/mediatek/mt8196/sspm.bin.md5 index 4c26a59..b4dd13f 100644 --- a/soc/mediatek/mt8196/sspm.bin.md5 +++ b/soc/mediatek/mt8196/sspm.bin.md5 @@ -1 +1 @@ -1cf19f35ed264ad1331309c33c49ff25 *sspm.bin +4119695be57988065a3c4af20cc927c1 *sspm.bin diff --git a/soc/mediatek/mt8196/sspm_release_notes.txt b/soc/mediatek/mt8196/sspm_release_notes.txt index 460db02..ce29be4 100644 --- a/soc/mediatek/mt8196/sspm_release_notes.txt +++ b/soc/mediatek/mt8196/sspm_release_notes.txt @@ -1,5 +1,8 @@ ** Build from MediaTek Internal ** +# Version 5.0 +1. Update sspm.bin to set USB reg to reduce ldm delay time and solve USB audio and video issues + # Version 4.0 1. Update sspm.bin to fix EMI unmap register issue and make syetem fully sleep. -- To view, visit https://review.coreboot.org/c/blobs/+/86586?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I14a9d48920bc9f9d15b5b095f88257d5b5cd4f6e Gerrit-Change-Number: 86586 Gerrit-PatchSet: 1 Gerrit-Owner: Liu Liu <ot_liu.liu(a)mediatek.corp-partner.google.com>

1 0

[S] Change in coreboot[main]: mb/starlabs/byte_adl: Reconfigure the vGPIO's for CNVi BT
by Sean Rhodes (Code Review) 24 Feb '25

24 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86565?usp=email ) Change subject: mb/starlabs/byte_adl: Reconfigure the vGPIO's for CNVi BT ...................................................................... mb/starlabs/byte_adl: Reconfigure the vGPIO's for CNVi BT Manually confgiure the vGPIO's related to CNVi for USB Bluetooth instead of UART. Change-Id: I7d6007e40b2edbadeb5611f6cd67df0c1e6ee8a6 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86565 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c 1 file changed, 21 insertions(+), 11 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c index a1b95d0..71b706d 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c @@ -451,26 +451,36 @@ /* R7: Not Connected */ PAD_NC(GPP_R7, NONE), - /* BT_EN */ + /* CNV_BTEN */ PAD_CFG_GPO(GPP_VGPIO_0, 1, DEEP), - - /* CNVi BT UART0 */ + /* CNV_BT_HOST_WAKEB */ + PAD_NC(GPP_VGPIO_4, NONE), + /* CNV_BT_IF_SELECT */ + PAD_CFG_GPO(GPP_VGPIO_5, 1, DEEP), + /* vCNV_BT_UART_TXD */ PAD_NC(GPP_VGPIO_6, NONE), + /* vCNV_BT_UART_RXD */ PAD_NC(GPP_VGPIO_7, NONE), + /* vCNV_BT_UART_CTS_B */ PAD_NC(GPP_VGPIO_8, NONE), + /* vCNV_BT_UART_RTS_B */ PAD_NC(GPP_VGPIO_9, NONE), - - /* CNVi UART0 */ + /* vUART0_TXD */ PAD_NC(GPP_VGPIO_18, NONE), + /* vUART0_RXD */ PAD_NC(GPP_VGPIO_19, NONE), + /* vUART0_CTS_B */ PAD_NC(GPP_VGPIO_20, NONE), + /* vUART0_RTS_B */ PAD_NC(GPP_VGPIO_21, NONE), - - /* BT I2S */ - PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), - PAD_CFG_NF(GPP_VGPIO_31, NONE, DEEP, NF3), - PAD_CFG_NF(GPP_VGPIO_32, NONE, DEEP, NF3), - PAD_CFG_NF(GPP_VGPIO_33, NONE, DEEP, NF3), + /* BT_I2S_BCLK */ + PAD_NC(GPP_VGPIO_30, NONE), + /* BT_I2S_SYNC */ + PAD_NC(GPP_VGPIO_31, NONE), + /* BT_I2S_SDO */ + PAD_NC(GPP_VGPIO_32, NONE), + /* BT_I2S_SDI */ + PAD_NC(GPP_VGPIO_33, NONE), }; const struct pad_config *variant_gpio_table(size_t *num) -- To view, visit https://review.coreboot.org/c/coreboot/+/86565?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d6007e40b2edbadeb5611f6cd67df0c1e6ee8a6 Gerrit-Change-Number: 86565 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[XS] Change in coreboot[main]: mb/starlabs/byte_adl: Disconnect WLAN Sleep GPIO
by Sean Rhodes (Code Review) 24 Feb '25

24 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86564?usp=email ) Change subject: mb/starlabs/byte_adl: Disconnect WLAN Sleep GPIO ...................................................................... mb/starlabs/byte_adl: Disconnect WLAN Sleep GPIO This GPIO is not connected, so configure it accordingly. Change-Id: I4b3421f1ab676599ffec6b2f46429ce937704e40 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86564 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c index 6981b85..a1b95d0 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c @@ -37,7 +37,7 @@ /* GPD8: Suspend Clock */ PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* GPD9: Wireless LAN Sleep */ - PAD_CFG_NF(GPD9, NONE, DEEP, NF1), + PAD_NC(GPD9, NONE), /* GPD10: Sleep S5 */ PAD_NC(GPD10, NONE), /* GPD11: LAN PHY Enable */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86564?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b3421f1ab676599ffec6b2f46429ce937704e40 Gerrit-Change-Number: 86564 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[XS] Change in coreboot[main]: mb/google/trulo: Update GPIO wake pins
by Subrata Banik (Code Review) 24 Feb '25

24 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/86555?usp=email ) Change subject: mb/google/trulo: Update GPIO wake pins ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86555?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I055a60476e4a37bf74940802157bb9cd30bac3c4 Gerrit-Change-Number: 86555 Gerrit-PatchSet: 3 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 24 Feb 2025 09:07:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: soc/amd/glinda: Always split PSP binary
by Patrick Rudolph (Code Review) 24 Feb '25

24 Feb '25

Patrick Rudolph has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86036?usp=email ) Change subject: soc/amd/glinda: Always split PSP binary ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86036?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I88488bfdca7ef8f848ffbab9c68670d8f375e90d Gerrit-Change-Number: 86036 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 24 Feb 2025 09:07:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2025