coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Decrease trace length of USB-A phy to s...
by Amanda Hwang (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Paul Menzel, Pranava Y N, Subrata Banik. Amanda Hwang has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/86285?usp=email ) Change subject: mb/google/fatcat/var/francka: Decrease trace length of USB-A phy to short ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86285/comment/4faa0c0b_8645213a?us… : PS2, Line 7: Modify USB-A phy configuration > Please be more specific. No idea if my terminology is correct: […] Done https://review.coreboot.org/c/coreboot/+/86285/comment/c79817ae_bbaf9e59?us… : PS2, Line 9: To resolve the issue of not being able to boot from USB on Francka > Any error in the logs? Refer to issue ID 394206896. https://review.coreboot.org/c/coreboot/+/86285/comment/e56da8bf_6d56c366?us… : PS2, Line 9: the USB PHY settings need to be modified > Please be more specific, and also mention the source for this. […] Refer to issue ID 394206896. -- To view, visit https://review.coreboot.org/c/coreboot/+/86285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I140b8a2047768d3aeb0d5919aad998bd9dcd099f Gerrit-Change-Number: 86285 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 02:14:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Decrease trace length of USB-A phy to s...
by Amanda Hwang (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Amanda Hwang, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Hello Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86285?usp=email to look at the new patch set (#3). Change subject: mb/google/fatcat/var/francka: Decrease trace length of USB-A phy to short ...................................................................... mb/google/fatcat/var/francka: Decrease trace length of USB-A phy to short To resolve the issue of not being able to boot from USB on Francka, the USB PHY settings need to be modified. BUG=b:394206896 TEST=Build and test Type-A port function works fine Change-Id: I140b8a2047768d3aeb0d5919aad998bd9dcd099f Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/fatcat/variants/francka/overridetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/86285/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86285?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I140b8a2047768d3aeb0d5919aad998bd9dcd099f Gerrit-Change-Number: 86285 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: drivers/soundwire: Support Realtek ALC712 codec
by Weimin Wu (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Mac Chiang, Naveen M, Pranava Y N, Subrata Banik, Tongtong Pan, Varun Upadhyay. Weimin Wu has posted comments on this change by Weimin Wu. ( https://review.coreboot.org/c/coreboot/+/85571?usp=email ) Change subject: drivers/soundwire: Support Realtek ALC712 codec ...................................................................... Patch Set 3: (1 comment) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85571/comment/0515daac_30930ec0?us… : PS2, Line 130: { > you can avoid braces for single line statement? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib79896a9fe23f2f66d6ee3a24f5a62bfa0f7a649 Gerrit-Change-Number: 85571 Gerrit-PatchSet: 3 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 02:09:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: mb/google/trulo/var/uldrenite: Add fw_config probe for Cellular
by Dtrain Hsu (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro. Dtrain Hsu has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86255?usp=email ) Change subject: mb/google/trulo/var/uldrenite: Add fw_config probe for Cellular ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brya/variants/uldrenite/variant.c: https://review.coreboot.org/c/coreboot/+/86255/comment/dadbaba7_c250ac75?us… : PS2, Line 67: { The "{" and "}" will make no WWAN power sequence when fw_config is CELLULAR_RW350R. -- To view, visit https://review.coreboot.org/c/coreboot/+/86255?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib664f543c6012b44a0a604d0943416519d92a057 Gerrit-Change-Number: 86255 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 06 Feb 2025 01:43:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Fix ACPI GPIO number
by Cliff Huang (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Hello Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86290?usp=email to look at the new patch set (#2). Change subject: soc/intel/pantherlake: Fix ACPI GPIO number ...................................................................... soc/intel/pantherlake: Fix ACPI GPIO number When using SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES, ACPI GPIO number is the number from its community. In Panther Lake, each GPIO community is an individual pincntrl device. When GPIO number is provided, the offset from its community should be used rather than the number from the first GPIO pad. For instance, using vGPIO_3_11 ( i.e. GPP_VGPIO3_THC1) in community 3: from GPIO community3, INTC10BC:02/pins: ... pin 82 (vGPIO_3_11) 82:INTC10BC:02 GPIO 0x40100102 0x0000003f 0x00000000 [ACPI] -> 82 is the value the pin number/offset GPP_VGPI3_THC1 in the SSDT: Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, "\\_SB.PCI0.GPI3", 0x00, ResourceConsumer, , ) { // Pin list 0x0052 } } Where "\\_SB.PCI0.GPI3 is GPIO community 3. Where 0x0052 is 82 (decimal), the offset used as ACPI GPIO number. BUG=none TEST=Check the number from _CRS GpinInt and GpIo objects from the SSDT and the GPIO number used should match with the community offset. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/86290/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 Gerrit-Change-Number: 86290 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Fix ACPI GPIO number
by Cliff Huang (Code Review) 05 Feb '25

05 Feb '25

Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86290?usp=email ) Change subject: soc/intel/pantherlake: Fix ACPI GPIO number ...................................................................... soc/intel/pantherlake: Fix ACPI GPIO number When using SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES, ACPI GPIO number is the number from its community. In Panther Lake, each GPIO community is an individual pincntrl device. When GPIO number is provided, the offset from its community should be used rather than the number from the first GPIO pad. For instance, using vGPIO_3_11 ( i.e. GPP_VGPIO3_THC1) in community 3: from GPIO community3, INTC10BC:02/pins: ... pin 82 (vGPIO_3_11) 82:INTC10BC:02 GPIO 0x40100102 0x0000003f 0x00000000 [ACPI] -> 82 is the value the pin number/offset GPP_VGPI3_THC1 in the SSDT: Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, "\\_SB.PCI0.GPI3", 0x00, ResourceConsumer, , ) { // Pin list 0x0052 } } Where "\\_SB.PCI0.GPI3 is GPIO community 3. Where 0x0052 is 82 (decimal), the offset used as ACPI GPIO number. BUG=none TEST=Check the number from _CRS GpinInt and GpIo objects from the SSDT and the GPIO number used should match with the community offset. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/86290/1 diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index dde401b..6fb87f9 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -75,6 +75,7 @@ select SOC_INTEL_COMMON_BLOCK_IPU select SOC_INTEL_COMMON_BLOCK_IRQ select SOC_INTEL_COMMON_BLOCK_ME_SPEC_21 + select SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES select SOC_INTEL_COMMON_BLOCK_MEMINIT select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3 select SOC_INTEL_COMMON_BLOCK_PMC_EPOC -- To view, visit https://review.coreboot.org/c/coreboot/+/86290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 Gerrit-Change-Number: 86290 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Set frequency and gears for SaGv work points
by Bora Guvendik (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Subrata Banik. Bora Guvendik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/86274?usp=email ) Change subject: mb/google/fatcat: Set frequency and gears for SaGv work points ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86274/comment/386883f2_4b735c3e?us… : PS4, Line 37: register "sagv_gear[0]" = "4" > can you please chip.h enum for defining the Gear selection SAGV points ? […] Done. I believe Gear 3 is not used. I will follow up on FSP side to get FspmUpd.h updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/86274?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I315fcac387680df9312880120b7e6d33bded38e0 Gerrit-Change-Number: 86274 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 05 Feb 2025 23:12:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Set frequency and gears for SaGv work points
by Bora Guvendik (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Bora Guvendik, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N. Hello Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86274?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Jérémy Compostella, Verified+1 by build bot (Jenkins) Change subject: mb/google/fatcat: Set frequency and gears for SaGv work points ...................................................................... mb/google/fatcat: Set frequency and gears for SaGv work points Update sagv gears and frequency values as per recommendation from power and performance team. BUG=none TEST=Boot to OS. Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: I315fcac387680df9312880120b7e6d33bded38e0 --- M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/86274/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86274?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I315fcac387680df9312880120b7e6d33bded38e0 Gerrit-Change-Number: 86274 Gerrit-PatchSet: 5 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: soc/intel/pantherlake: Add ability to set SaGv work points
by Bora Guvendik (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Bora Guvendik, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N. Hello Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86277?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+2 by Jérémy Compostella, Verified+1 by build bot (Jenkins) Change subject: soc/intel/pantherlake: Add ability to set SaGv work points ...................................................................... soc/intel/pantherlake: Add ability to set SaGv work points Hook up SaGv work point UPDs. BUG=none TEST=Boot to OS. Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: Ie38d007edc293727066f2bc9f67037e6fbe77aa5 --- M src/soc/intel/pantherlake/chip.h M src/soc/intel/pantherlake/romstage/fsp_params.c 2 files changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/86277/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86277?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie38d007edc293727066f2bc9f67037e6fbe77aa5 Gerrit-Change-Number: 86277 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[L] Change in coreboot[main]: lib/{fit,fit_payload}.c: Enhance support for FIT images
by Benjamin Doron (Code Review) 05 Feb '25

05 Feb '25

Attention is currently required from: Felix Held, Julius Werner, Lean Sheng Tan, Matt DeVillier, Maximilian Brune, Philipp Hug, ron minnich. Benjamin Doron has posted comments on this change by Benjamin Doron. ( https://review.coreboot.org/c/coreboot/+/84796?usp=email ) Change subject: lib/{fit,fit_payload}.c: Enhance support for FIT images ...................................................................... Patch Set 13: (7 comments) Patchset: PS13: Thank you for all the reviews, Julius, and for helping me fix up EDK2's bugs/quirks by showing me coreboot's implementation and view on FITs! File payloads/Kconfig: https://review.coreboot.org/c/coreboot/+/84796/comment/1b29e6fa_14449ad9?us… : PS11, Line 33: depends on ARCH_ARM64 || ARCH_RISCV || ARCH_ARM || ARCH_X86 > Actually, does this line still make sense at all? You aren't adding any x86-specific code in this pa […] Done File src/lib/fit.c: https://review.coreboot.org/c/coreboot/+/84796/comment/1cec744d_52948c87?us… : PS11, Line 512: strcmp(config->name, default_config_name) > I thought I pushed that, it's in my local copy. It might've gotten lost in my git stashes. […] Ugh, no, this was a rebase error: it landed in the follow-up instead. Fixed now. File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/ea4e4e35_75d9ca09?us… : PS6, Line 271: code.size += image_chain->image->size; > In the kernel case `fit_payload_arch()` determines the uncompressed size and and modifies the `kerne […] UefiPayload doesn't support compressing FIT image nodes yet (it's my belief that EDK2-based Platform Init treats the whole .FIT file as a raw file inside a UEFI FV, and applies compression/decompression at that level), so I hadn't gotten around to this earlier, because we wouldn't encounter it yet anyways. However, since we decided that "firmware" can refer to UPL at the moment, because we don't have another project/ABI to support at the moment, I'm decoding `uncomp-size` if present and we'll allocate that much memory instead. File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/c439952e_434e62fe?us… : PS9, Line 22: printk(BIOS_CRIT, "WEAK: Generic code called to load a FIT kernel!\n"); > Right, like in the other comment, I think I answered some of these before pushing my work on new yea […] Accidentally slipped into the follow-up instead. https://review.coreboot.org/c/coreboot/+/84796/comment/2f1f61e2_eba42b72?us… : PS9, Line 401: bool status = false; > FWIW, the use of a boolean to report the result of an "action" type function here was always wrong a […] I'd rather not continue to expand the scope of this patch by changing function prototypes both here and elsewhere in the tree, this was about 50 lines once. Granted, that's because I imported a bug + an assumption that a bootloader/Platform Init doesn't have adequate FIT support from EDK2 (and so I wrote code that copied the FIT header into memory too), so this was necessary and I agree that the patch is better this as it is than before. Genuinely, thank you for the help, and the help in finding EDK2's bugs through showing me coreboot's perspective on FITs! At this point, I'd rather prioritise bigger issues and then get this in, if that's alright File src/lib/fit_payload.c: https://review.coreboot.org/c/coreboot/+/84796/comment/9ca65f1a_ec858121?us… : PS11, Line 181: /* Collect info for fit_linux_arch_quirks */ > This is totally off-topic to your patch (already a bug in the existing code), but I think there shou […] Oh, it's as good a time as any, and it's not a big deal. Done. -- To view, visit https://review.coreboot.org/c/coreboot/+/84796?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6a21954c0dc5fd820d135e8cd0599ce87903a1c0 Gerrit-Change-Number: 84796 Gerrit-PatchSet: 13 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <tanleansheng(a)outlook.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 05 Feb 2025 22:52:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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coreboot-gerrit February 2025