coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: mb/google/rauru: Deassert PCIe PERST# earlier in romstage
by Yu-Ping Wu (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86311?usp=email ) Change subject: mb/google/rauru: Deassert PCIe PERST# earlier in romstage ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24b254ff3a3cbe6d9a60a8e6afea2c621e0a07e2 Gerrit-Change-Number: 86311 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:03:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/rauru: Deassert PCIe PERST# earlier in romstage
by Jarried Lin (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86311?usp=email to look at the new patch set (#2). Change subject: mb/google/rauru: Deassert PCIe PERST# earlier in romstage ...................................................................... mb/google/rauru: Deassert PCIe PERST# earlier in romstage Reorder the PCIe reset before mtk_dram_init to overlap the de-assert time with the DRAM initialization process. This change helps to optimize the initialization sequence and reduce overall boot time. BRANCH=rauru TEST=Build pass BUG=b:391333055 Change-Id: I24b254ff3a3cbe6d9a60a8e6afea2c621e0a07e2 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/mainboard/google/rauru/romstage.c 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/86311/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24b254ff3a3cbe6d9a60a8e6afea2c621e0a07e2 Gerrit-Change-Number: 86311 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v4.0
by Yu-Ping Wu (Code Review) 07 Feb '25

07 Feb '25

Yu-Ping Wu has submitted this change. ( https://review.coreboot.org/c/blobs/+/86293?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v4.0 ...................................................................... soc/mediatek/mt8196: Update SSPM firmware to v4.0 Update sspm.bin to fix EMI unmap register issue and make system fully sleep to meet power consumption. BRANCH=rauru TEST=Build pass BUG=b:394704589 Change-Id: Ic717aba8ec18c55659cb3197c19984718646bfec Signed-off-by: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/sspm.bin M soc/mediatek/mt8196/sspm.bin.md5 M soc/mediatek/mt8196/sspm_release_notes.txt 3 files changed, 4 insertions(+), 1 deletion(-) Approvals: Yu-Ping Wu: Verified; Looks good to me, approved Yidi Lin: Looks good to me, approved Kenji Yu: Looks good to me, but someone else must approve Jarried Lin: Looks good to me, but someone else must approve diff --git a/soc/mediatek/mt8196/sspm.bin b/soc/mediatek/mt8196/sspm.bin index 2e7d54f..09cd109 100644 --- a/soc/mediatek/mt8196/sspm.bin +++ b/soc/mediatek/mt8196/sspm.bin Binary files differ diff --git a/soc/mediatek/mt8196/sspm.bin.md5 b/soc/mediatek/mt8196/sspm.bin.md5 index 9663b03..4c26a59 100644 --- a/soc/mediatek/mt8196/sspm.bin.md5 +++ b/soc/mediatek/mt8196/sspm.bin.md5 @@ -1 +1 @@ -f6cd83a73a4e633ab8d531622e765d98 *sspm.bin +1cf19f35ed264ad1331309c33c49ff25 *sspm.bin diff --git a/soc/mediatek/mt8196/sspm_release_notes.txt b/soc/mediatek/mt8196/sspm_release_notes.txt index 15b2635..460db02 100644 --- a/soc/mediatek/mt8196/sspm_release_notes.txt +++ b/soc/mediatek/mt8196/sspm_release_notes.txt @@ -1,5 +1,8 @@ ** Build from MediaTek Internal ** +# Version 4.0 +1. Update sspm.bin to fix EMI unmap register issue and make syetem fully sleep. + # Version 3.0 1. Update sspm.bin to disable waking up SPM function. -- To view, visit https://review.coreboot.org/c/blobs/+/86293?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic717aba8ec18c55659cb3197c19984718646bfec Gerrit-Change-Number: 86293 Gerrit-PatchSet: 3 Gerrit-Owner: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: ec/starlabs/merlin: Add an option to disabled the lid switch
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86305?usp=email ) Change subject: ec/starlabs/merlin: Add an option to disabled the lid switch ...................................................................... ec/starlabs/merlin: Add an option to disabled the lid switch Previously, the lid switch could be set to not wake the system. Add another option to ignore the switch entirely. Change-Id: I1dd666a44b332ffbbef4420799eeffd746fd1664 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86305 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/cfr.c M src/mainboard/starlabs/starfighter/cfr.c M src/mainboard/starlabs/starlite_adl/cfr.c 3 files changed, 12 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/cfr.c b/src/mainboard/starlabs/starbook/cfr.c index 9b47f483..bf0e4b0 100644 --- a/src/mainboard/starlabs/starbook/cfr.c +++ b/src/mainboard/starlabs/starbook/cfr.c @@ -126,11 +126,12 @@ static const struct sm_object lid_switch = SM_DECLARE_ENUM({ .opt_name = "lid_switch", .ui_name = "Lid Switch", - .ui_helptext = "Enable or disable the lid switch.", + .ui_helptext = "Configure what opening or closing the lid will do.", .default_value = 0, .values = (const struct sm_enum_value[]) { - { "Enabled", 0 }, - { "Disabled", 1 }, + { "Normal", 0 }, + { "Sleep Only", 1 }, + { "Disabled", 2 }, SM_ENUM_VALUE_END }, }); #endif diff --git a/src/mainboard/starlabs/starfighter/cfr.c b/src/mainboard/starlabs/starfighter/cfr.c index 7c8a123..f310f86 100644 --- a/src/mainboard/starlabs/starfighter/cfr.c +++ b/src/mainboard/starlabs/starfighter/cfr.c @@ -108,11 +108,12 @@ static const struct sm_object lid_switch = SM_DECLARE_ENUM({ .opt_name = "lid_switch", .ui_name = "Lid Switch", - .ui_helptext = "Enable or disable the lid switch.", + .ui_helptext = "Configure what opening or closing the lid will do.", .default_value = 0, .values = (const struct sm_enum_value[]) { - { "Enabled", 0 }, - { "Disabled", 1 }, + { "Normal", 0 }, + { "Sleep Only", 1 }, + { "Disabled", 2 }, SM_ENUM_VALUE_END }, }); #endif diff --git a/src/mainboard/starlabs/starlite_adl/cfr.c b/src/mainboard/starlabs/starlite_adl/cfr.c index 58a09a3..a8e44fa 100644 --- a/src/mainboard/starlabs/starlite_adl/cfr.c +++ b/src/mainboard/starlabs/starlite_adl/cfr.c @@ -73,11 +73,12 @@ static const struct sm_object lid_switch = SM_DECLARE_ENUM({ .opt_name = "lid_switch", .ui_name = "Lid Switch", - .ui_helptext = "Enable or disable the lid switch.", + .ui_helptext = "Configure what opening or closing the lid will do.", .default_value = 0, .values = (const struct sm_enum_value[]) { - { "Enabled", 0 }, - { "Disabled", 1 }, + { "Normal", 0 }, + { "Sleep Only", 1 }, + { "Disabled", 2 }, SM_ENUM_VALUE_END }, }); #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/86305?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1dd666a44b332ffbbef4420799eeffd746fd1664 Gerrit-Change-Number: 86305 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: ec/starlabs/merlin: Add an option to disable the fan
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86304?usp=email ) Change subject: ec/starlabs/merlin: Add an option to disable the fan ...................................................................... ec/starlabs/merlin: Add an option to disable the fan Add an option alongside the three existing curves to just turn off the fan. Change-Id: I39f6599056fe0116abbd7e2eb4084f77a7c395d3 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86304 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/ec/starlabs/merlin/ec.h M src/ec/starlabs/merlin/ite.c M src/mainboard/starlabs/starbook/cfr.c M src/mainboard/starlabs/starfighter/cfr.c 4 files changed, 6 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/ec/starlabs/merlin/ec.h b/src/ec/starlabs/merlin/ec.h index d5e1788..82572bd 100644 --- a/src/ec/starlabs/merlin/ec.h +++ b/src/ec/starlabs/merlin/ec.h @@ -79,6 +79,7 @@ #define FAN_NORMAL 0x00 #define FAN_AGGRESSIVE 0xbb #define FAN_QUIET 0xaa +#define FAN_DISABLED 0xcc /* Fn Lock State */ #define UNLOCKED 0x00 diff --git a/src/ec/starlabs/merlin/ite.c b/src/ec/starlabs/merlin/ite.c index 1dd83a8..6eaa3e9 100644 --- a/src/ec/starlabs/merlin/ite.c +++ b/src/ec/starlabs/merlin/ite.c @@ -175,14 +175,15 @@ * * Setting: fan_mode * - * Values: Quiet, Normal, Aggressive + * Values: Disabled, Quiet, Normal, Aggressive * Default: Normal * */ const uint8_t fan_mode[] = { FAN_NORMAL, FAN_AGGRESSIVE, - FAN_QUIET + FAN_QUIET, + FAN_DISABLED }; if (CONFIG(EC_STARLABS_FAN)) diff --git a/src/mainboard/starlabs/starbook/cfr.c b/src/mainboard/starlabs/starbook/cfr.c index 82488fe..9b47f483 100644 --- a/src/mainboard/starlabs/starbook/cfr.c +++ b/src/mainboard/starlabs/starbook/cfr.c @@ -69,6 +69,7 @@ { "Normal", 0 }, { "Aggressive", 1 }, { "Quiet", 2 }, + { "Disabled", 3 }, SM_ENUM_VALUE_END }, }); diff --git a/src/mainboard/starlabs/starfighter/cfr.c b/src/mainboard/starlabs/starfighter/cfr.c index 6802b75..7c8a123 100644 --- a/src/mainboard/starlabs/starfighter/cfr.c +++ b/src/mainboard/starlabs/starfighter/cfr.c @@ -62,6 +62,7 @@ { "Normal", 0 }, { "Aggressive", 1 }, { "Quiet", 2 }, + { "Disabled", 3 }, SM_ENUM_VALUE_END }, }); -- To view, visit https://review.coreboot.org/c/coreboot/+/86304?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I39f6599056fe0116abbd7e2eb4084f77a7c395d3 Gerrit-Change-Number: 86304 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/rauru: Reorder PCIe reset in romstage
by Yu-Ping Wu (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86311?usp=email ) Change subject: mb/google/rauru: Reorder PCIe reset in romstage ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86311/comment/a85736cb_eec37786?us… : PS1, Line 7: Reorder PCIe reset in romstage Deassert PCIe PERST# earlier in romstage https://review.coreboot.org/c/coreboot/+/86311/comment/ce25d5c9_a8f49e80?us… : PS1, Line 9: Reorder the PCIe reset before mtk_dram_init to overlap the de-assert You didn't mention the reason: reducing boot time. -- To view, visit https://review.coreboot.org/c/coreboot/+/86311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24b254ff3a3cbe6d9a60a8e6afea2c621e0a07e2 Gerrit-Change-Number: 86311 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 08:52:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Add rcomp configuration
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86307?usp=email ) Change subject: mb/starlabs/starbook/mtl: Add rcomp configuration ...................................................................... mb/starlabs/starbook/mtl: Add rcomp configuration Add rcomp configuration values taken from the AMI CRB. This fixes failed memory training for certain memory modules. Change-Id: If7a29bbd015d45eac178480ba6cae42912e25195 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86307 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/mtl/romstage.c 1 file changed, 4 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c index 14b2664..26a4e5e 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c @@ -13,6 +13,10 @@ .UserBd = BOARD_TYPE_MOBILE, .ddr_config = { .dq_pins_interleaved = false, + }, + .rcomp = { + .resistor = 100, + .targets = {70, 30, 25, 25, 25}, } }; -- To view, visit https://review.coreboot.org/c/coreboot/+/86307?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7a29bbd015d45eac178480ba6cae42912e25195 Gerrit-Change-Number: 86307 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Correct DIMM Speed Size
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86306?usp=email ) Change subject: mb/starlabs/starbook/mtl: Correct DIMM Speed Size ...................................................................... mb/starlabs/starbook/mtl: Correct DIMM Speed Size The DDR5 modules have a speed size of 1024 bytes, not 512. Update Kconfig to reflect this. Change-Id: Ic7b691104ff8b0061a485f01709a2f53046cc94a Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86306 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index b7e1c63..1565f88 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -139,6 +139,7 @@ default "variants/\$(CONFIG_VARIANT_DIR)/devicetree.cb" config DIMM_SPD_SIZE + default 1024 if BOARD_STARLABS_STARBOOK_MTL default 512 config DRIVER_TPM_SPI_CHIP -- To view, visit https://review.coreboot.org/c/coreboot/+/86306?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7b691104ff8b0061a485f01709a2f53046cc94a Gerrit-Change-Number: 86306 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Change the user board type
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86310?usp=email ) Change subject: mb/starlabs/starbook/mtl: Change the user board type ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86310?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I951387fcfc0be8fb931b4c5ac0b5f022e057b371 Gerrit-Change-Number: 86310 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 08:51:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Enable Early Command Training
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86308?usp=email ) Change subject: mb/starlabs/starbook/mtl: Enable Early Command Training ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86308?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18d94537ec662e11ef09065569e1695403490012 Gerrit-Change-Number: 86308 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 07 Feb 2025 08:51:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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