coreboot-gerrit February 2025

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[S] Change in coreboot[main]: soc/intel/adl: Handle critical low battery early in romstage
by Subrata Banik (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Julius Werner, Jérémy Compostella, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro. Hello Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Nick Vaccaro, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86227?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/adl: Handle critical low battery early in romstage ...................................................................... soc/intel/adl: Handle critical low battery early in romstage This commit implements early handling of critical low battery conditions in the romstage for Alder Lake platforms. A message is displayed to the user via ux_inform_user_of_poweroff_operation. A short delay is introduced to allow the user to see the message. A low battery event is logged. The system is shut down via the Chrome EC. This early handling prevents the system from proceeding with boot (while performing firmware update) if the battery is critically low and ensures a clean shutdown. This is particularly important for ChromeOS devices. BUG=b:339673254 TEST=Verified low battery boot event logging and controlled shutdown. Change-Id: Ib4be86ed17818ee05b7bec0337a90f80017183c2 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/alderlake/romstage/fsp_params.c 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/86227/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86227?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4be86ed17818ee05b7bec0337a90f80017183c2 Gerrit-Change-Number: 86227 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[M] Change in coreboot[main]: vc/google/chromeos: Implement platform callback for critical shutdown
by Subrata Banik (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Julius Werner, Karthik Ramasubramanian. Hello Julius Werner, Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86228?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: vc/google/chromeos: Implement platform callback for critical shutdown ...................................................................... vc/google/chromeos: Implement platform callback for critical shutdown This commit implements `platform_is_low_battery_shutdown_needed` and `platform_issue_low_battery_shutdown` callbacks for ChromeOS. - platform_is_low_battery_shutdown_needed: API to check if low battery shutdown is needed. - platform_issue_low_battery_shutdown: API to issue a shutdown due to low battery. BUG=b:339673254 TEST=Verified low battery boot event logging and controlled shutdown. Change-Id: I119f80a45c045a6095cae98f179c755a2e948e9c Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/vendorcode/google/chromeos/Makefile.mk A src/vendorcode/google/chromeos/battery.c 2 files changed, 63 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/86228/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I119f80a45c045a6095cae98f179c755a2e948e9c Gerrit-Change-Number: 86228 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[M] Change in coreboot[main]: vc/google/chromeos: Implement platform callback for critical shutdown
by Subrata Banik (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Julius Werner, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86228?usp=email ) Change subject: vc/google/chromeos: Implement platform callback for critical shutdown ...................................................................... Patch Set 4: (2 comments) File src/vendorcode/google/chromeos/battery.c: https://review.coreboot.org/c/coreboot/+/86228/comment/f9d53f82_67745965?us… : PS4, Line 35: checked = true; > No, this needs to be outside the inner `if`. […] Acknowledged https://review.coreboot.org/c/coreboot/+/86228/comment/1e8f7d43_69ae4257?us… : PS4, Line 50: * 3. If in romstage and Chrome EC is supported, sends a shutdown command to the EC. > Why the romstage/ramstage difference? You're saying what the code does but you're not explaining _wh […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/86228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I119f80a45c045a6095cae98f179c755a2e948e9c Gerrit-Change-Number: 86228 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:53:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL
by Subrata Banik (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/86314?usp=email ) Change subject: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86314/comment/5a5cb13a_c595ca0a?us… : PS1, Line 9: Disable ESOL for PTL until the feature is ready and tested. nit ? This patch disables eSOL Kconfig until the feature is ready in PTL FSP-uGOP binary https://review.coreboot.org/c/coreboot/+/86314/comment/32bd9b68_830dc181?us… : PS1, Line 11: BUG=none not needed https://review.coreboot.org/c/coreboot/+/86314/comment/bbe6bb4b_3c94493b?us… : PS1, Line 12: emerge-fatcat coreboot Able to built and boot google/fatcat to OS. https://review.coreboot.org/c/coreboot/+/86314/comment/9c8109bf_01c14a14?us… : PS1, Line 13: BRANCH=none not needed -- To view, visit https://review.coreboot.org/c/coreboot/+/86314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99dd516816995b6cdfdcec618c06c7dbe061718a Gerrit-Change-Number: 86314 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:52:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: ec/starlabs/merlin: Only include virtual button driver for detachables
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86315?usp=email ) Change subject: ec/starlabs/merlin: Only include virtual button driver for detachables ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86315?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc2076c400524744836e2f52124ccb8502622b04 Gerrit-Change-Number: 86315 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:40:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL
by Jayvik Desai (Code Review) 07 Feb '25

07 Feb '25

Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86314?usp=email ) Change subject: soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL ...................................................................... soc/intel/ptl: Disable FSP_UGOP_EARLY_SIGN_OF_LIFE for PTL Disable ESOL for PTL until the feature is ready and tested. BUG=none TEST=emerge-fatcat coreboot BRANCH=none Change-Id: I99dd516816995b6cdfdcec618c06c7dbe061718a Signed-off-by: Jayvik Desai <jayvik(a)google.com> --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/86314/1 diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig index dde401b..5326020 100644 --- a/src/soc/intel/pantherlake/Kconfig +++ b/src/soc/intel/pantherlake/Kconfig @@ -17,7 +17,6 @@ select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP - select FSP_UGOP_EARLY_SIGN_OF_LIFE select FSP_USES_CB_DEBUG_EVENT_HANDLER select FSPS_HAS_ARCH_UPD select GENERIC_GPIO_LIB -- To view, visit https://review.coreboot.org/c/coreboot/+/86314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99dd516816995b6cdfdcec618c06c7dbe061718a Gerrit-Change-Number: 86314 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com>

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[XS] Change in coreboot[main]: payloads/edk2: Disable Bus Enumeration
by Sean Rhodes (Code Review) 07 Feb '25

07 Feb '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86313?usp=email ) Change subject: payloads/edk2: Disable Bus Enumeration ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86313?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib982d6bedf09559c414b0e8a7db5614a02c4724f Gerrit-Change-Number: 86313 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:21:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: tests/data/lib/lzma-test/data: Fix cast of type 'nullptr_t' to 'uintp...
by Elyes Haouas (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Jakub "Kuba" Czapiga. Hello Jakub "Kuba" Czapiga, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84907?usp=email to look at the new patch set (#2). Change subject: tests/data/lib/lzma-test/data: Fix cast of type 'nullptr_t' to 'uintptr_t' error ...................................................................... tests/data/lib/lzma-test/data: Fix cast of type 'nullptr_t' to 'uintptr_t' error Fix remaining cast error of a 'nullptr_t' to 'uintptr_t' when using C23 Change-Id: Ifd6c8537d546aa957929396e7e3e9e82d79b5df0 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M tests/data/lib/lzma-test/data.3.bin 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/84907/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84907?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd6c8537d546aa957929396e7e3e9e82d79b5df0 Gerrit-Change-Number: 84907 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub "Kuba" Czapiga <czapiga(a)google.com>

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[S] Change in coreboot[main]: soc/intel/cmn/blk: Remove boot partition check for forced cse sync
by Dinesh Gehlot (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Martin L Roth. Hello Intel coreboot Reviewers, Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86153?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/intel/cmn/blk: Remove boot partition check for forced cse sync ...................................................................... soc/intel/cmn/blk: Remove boot partition check for forced cse sync This patch enhances the forced CSE sync mechanism by eliminating the boot partition check for RO. It utilizes the current CSE mechanism to determine if the system has undergone a cold boot. Please note, this is a proof of concept to address forced CSE sync constraint in the presence of a pre-CPU reset. The change is currently WIP and the final implementation might vary. BUG=b:380220737 TEST=Verified forced CSE sync on google/rex. Change-Id: If1e4180cb5fec3990fdee2b0e412173b1c8c6ded Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/soc/intel/common/block/cse/cse_lite.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/86153/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/86153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If1e4180cb5fec3990fdee2b0e412173b1c8c6ded Gerrit-Change-Number: 86153 Gerrit-PatchSet: 9 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Deassert PCIe PERST# earlier in romstage
by Jarried Lin (Code Review) 07 Feb '25

07 Feb '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86311?usp=email ) Change subject: mb/google/rauru: Deassert PCIe PERST# earlier in romstage ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86311/comment/5f0f4d77_1f702ad4?us… : PS1, Line 7: Reorder PCIe reset in romstage > Deassert PCIe PERST# earlier in romstage Done https://review.coreboot.org/c/coreboot/+/86311/comment/7c5ae5ac_59ae79a1?us… : PS1, Line 9: Reorder the PCIe reset before mtk_dram_init to overlap the de-assert > You didn't mention the reason: reducing boot time. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86311?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24b254ff3a3cbe6d9a60a8e6afea2c621e0a07e2 Gerrit-Change-Number: 86311 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 07 Feb 2025 09:03:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit February 2025