coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

1 participants
2886 discussions

[S] Change in coreboot[main]: src/cpu/intel/car/romstage: Refactor stack guard code in romstage
by Name of user not set (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jérémy Compostella, Patrick Rudolph, Paul Menzel, Shuo Liu. Name of user not set #1005756 has posted comments on this change by Name of user not set #1005756. ( https://review.coreboot.org/c/coreboot/+/86562?usp=email ) Change subject: src/cpu/intel/car/romstage: Refactor stack guard code in romstage ...................................................................... Patch Set 5: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86562/comment/fc69adce_7885cc09?us… : PS2, Line 7: src/cpu/intel/car/romstage.c > I suggest: cpu/intel/car/romstage thank u for your opinion! 😊 Done. https://review.coreboot.org/c/coreboot/+/86562/comment/33121651_9a6f94e7?us… : PS2, Line 9: Refactor stack guard code in romstage. > Madybe more specific: Factor out stack_guard_set() and …() for improving readability. thank u for your opinion! 😊 Done. File src/cpu/intel/car/romstage.c: https://review.coreboot.org/c/coreboot/+/86562/comment/efdcbbf0_893a3f33?us… : PS3, Line 48: int i; > Shouldn't we use `size_t` for an iteration index variable ? Thank u for your good opinion. Done https://review.coreboot.org/c/coreboot/+/86562/comment/130419d3_e8ae9a00?us… : PS3, Line 50: if (stack_base == NULL) { > How can `stack_base` be `NULL` ? it seems that you're right. stack_base cannot be NULL. Delete this condition. thx. Done https://review.coreboot.org/c/coreboot/+/86562/comment/d237bbea_824c44b5?us… : PS3, Line 58: printk(BIOS_DEBUG, "Smashed stack detected in romstage!\n"); > Is there a reason to keep executing the loop when an issue has been detected ? Thank u for your effort to improve my commit! 😊 It's just original logic.(no 'break' when detect smashed stack.) In fact, I don't know why don't break exactly, So I just factor it out with it as is. Is it fine that I add "break;" when smashed stack? Can i ask for you to give me good idea? if you have any opinions, I'll be glad to accept! Thx. -- To view, visit https://review.coreboot.org/c/coreboot/+/86562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I754e422c0023cd7824dd6109f031239756acff4b Gerrit-Change-Number: 86562 Gerrit-PatchSet: 5 Gerrit-Owner: Name of user not set #1005756 Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Patrick Rudolph Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Patrick Rudolph Gerrit-Comment-Date: Thu, 27 Feb 2025 11:30:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in blobs[main]: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0
by Yidi Lin (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86614?usp=email ) Change subject: soc/mediatek/mt8196: update mtk_fsp_ramstage to 16174.45.0 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/blobs/+/86614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I0df03cdded80449a6e64ea88e3d1f93deb84eec7 Gerrit-Change-Number: 86614 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 27 Feb 2025 11:06:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: mb/google/nissa/var/guren: Add initial override devicetree
by Brian Hsu (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Brian Hsu has posted comments on this change by Brian Hsu. ( https://review.coreboot.org/c/coreboot/+/86602?usp=email ) Change subject: mb/google/nissa/var/guren: Add initial override devicetree ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Dear All, if no concern, please kindly help to submit the CL. Thanks for the support. -- To view, visit https://review.coreboot.org/c/coreboot/+/86602?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia43a78c340426069571172319be1675b3d94eba4 Gerrit-Change-Number: 86602 Gerrit-PatchSet: 1 Gerrit-Owner: Brian Hsu <brian_hsu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-CC: David Li <david_li(a)pegatron.corp-partner.google.com> Gerrit-CC: Samuel Chen <samuel_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 27 Feb 2025 10:47:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mb/hp: Add Pro 3400
by Angel Pons (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Václav Straka. Angel Pons has posted comments on this change by Václav Straka. ( https://review.coreboot.org/c/coreboot/+/85825?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/hp: Add Pro 3400 ...................................................................... Patch Set 11: Code-Review+1 (4 comments) File Documentation/mainboard/hp/pro_3500_series.md: https://review.coreboot.org/c/coreboot/+/85825/comment/b62934de_f8708df8?us… : PS11, Line 51: (although it reports as : "N25Q064..3E", it works fine). : That probably means some mainboards used non-Winbond flash chips, which is quite common (BOM variations). AIUI, this is to have a backup plan in case a certain chip is not available (or too expensive) for some reason. File src/mainboard/hp/pro_3x00_series/Kconfig: https://review.coreboot.org/c/coreboot/+/85825/comment/7a6b83ed_04c8f2ed?us… : PS11, Line 46: config DRAM_RESET_GATE_GPIO : default 60 That's the default and could be removed File src/mainboard/hp/pro_3x00_series/variants/pro_3400_series/board_info.txt: https://review.coreboot.org/c/coreboot/+/85825/comment/0474c603_9178e0d8?us… : PS11, Line 2: ROM IC: W25Q32BVSIG I wouldn't list the chip model, not all boards have the same chip model File src/mainboard/hp/pro_3x00_series/variants/pro_3500_series/board_info.txt: https://review.coreboot.org/c/coreboot/+/85825/comment/f3c159f6_1dd88af1?us… : PS11, Line 2: ROM IC: W25Q64FVSIG Same, especially if the docs said something about a different chip model -- To view, visit https://review.coreboot.org/c/coreboot/+/85825?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I833996f6eddcaac91fb0ad0cd95fcc2a99447387 Gerrit-Change-Number: 85825 Gerrit-PatchSet: 11 Gerrit-Owner: Václav Straka <venda.straka(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Václav Straka <venda.straka(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Feb 2025 10:39:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/hp/pro_3x00_series: Remove unused ACPI brightness control
by Angel Pons (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Václav Straka. Angel Pons has posted comments on this change by Václav Straka. ( https://review.coreboot.org/c/coreboot/+/85847?usp=email ) Change subject: mb/hp/pro_3x00_series: Remove unused ACPI brightness control ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85847?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id39cd18713cc596eb2c92e028dad480fe7de8ef2 Gerrit-Change-Number: 85847 Gerrit-PatchSet: 4 Gerrit-Owner: Václav Straka <venda.straka(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Václav Straka <venda.straka(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Feb 2025 10:27:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Doc/mb/hp: Rename pro_3500_series to pro_3x00 series
by Angel Pons (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Václav Straka. Angel Pons has posted comments on this change by Václav Straka. ( https://review.coreboot.org/c/coreboot/+/85846?usp=email ) Change subject: Doc/mb/hp: Rename pro_3500_series to pro_3x00 series ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Patchset: PS3: > Never mind, this was done intentionally to make it easier to see the changes to the file across the […] Yes, I asked for it since I couldn't make sense of the diff otherwise -- To view, visit https://review.coreboot.org/c/coreboot/+/85846?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5977f223d6f004a801e163397d1c97febd7ee1d4 Gerrit-Change-Number: 85846 Gerrit-PatchSet: 4 Gerrit-Owner: Václav Straka <venda.straka(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Václav Straka <venda.straka(a)gmail.com> Gerrit-Comment-Date: Thu, 27 Feb 2025 10:26:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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[S] Change in coreboot[main]: util/cbfstool: Place XIP components and FIT at high flash addresses
by Angel Pons (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Andrey Petrov, Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Intel coreboot Reviewers, Johnny Lin, Jonathan Zhang, Julius Werner, Ronak Kanabar, Shuo Liu, Tim Chu, Yu-Ping Wu. Angel Pons has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/86570?usp=email ) Change subject: util/cbfstool: Place XIP components and FIT at high flash addresses ...................................................................... Patch Set 8: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86570/comment/0944b8d6_fd33c19e?us… : PS8, Line 9: CACHE_ROM_SIZE > I don't get the problem. Of course it can be grown arbitrarily. […] Does GNR not support caching more than 16 MiB of flash? https://review.coreboot.org/c/coreboot/+/86570/comment/57c7dabc_798accd8?us… : PS8, Line 17: Select XIP_AT_HIGH_ADDR for intel Granite Rapids SoC. What is the impact of this change? Faster boot times? -- To view, visit https://review.coreboot.org/c/coreboot/+/86570?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8eb469fdcd18d01652979f28049fe1ea3b59311c Gerrit-Change-Number: 86570 Gerrit-PatchSet: 8 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 27 Feb 2025 10:26:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[XS] Change in coreboot[main]: mb/trulo: Add host event EC_HOST_EVENT_BODY_DETECT_CHANGE
by John Su (Code Review) 27 Feb '25

27 Feb '25

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86615?usp=email ) Change subject: mb/trulo: Add host event EC_HOST_EVENT_BODY_DETECT_CHANGE ...................................................................... mb/trulo: Add host event EC_HOST_EVENT_BODY_DETECT_CHANGE Add host event EC_HOST_EVENT_BODY_DETECT_CHANGE for trulo. BRANCH=firmware-trulo-15217.771.B BUG=b:394177292 TEST=bodydetectmode on|off, verify host event is received Change-Id: Ifac0460e0e8feb33ad0085d250928adb593bb8ca Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/86615/1 diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h index 3d2fc5a..5bf2995 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h @@ -22,7 +22,8 @@ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\ EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ - EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BODY_DETECT_CHANGE)) #define MAINBOARD_EC_SMI_EVENTS \ (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) -- To view, visit https://review.coreboot.org/c/coreboot/+/86615?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifac0460e0e8feb33ad0085d250928adb593bb8ca Gerrit-Change-Number: 86615 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com>

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[S] Change in coreboot[main]: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization
by Eric Lai (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro. Eric Lai has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86514?usp=email ) Change subject: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie01019eca7eaa4bbb34dd80aeb65b9b6b08587fd Gerrit-Change-Number: 86514 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 27 Feb 2025 09:00:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization
by Subrata Banik (Code Review) 27 Feb '25

27 Feb '25

Attention is currently required from: Dinesh Gehlot, Dtrain Hsu, Eric Lai, Jayvik Desai, John Su, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by John Su. ( https://review.coreboot.org/c/coreboot/+/86514?usp=email ) Change subject: mb/trulo/var/uldrenite: Fix boot time caused by WWAN initialization ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86514?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie01019eca7eaa4bbb34dd80aeb65b9b6b08587fd Gerrit-Change-Number: 86514 Gerrit-PatchSet: 8 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 27 Feb 2025 08:55:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit February 2025