coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

1 participants
2886 discussions

[XS] Change in coreboot[main]: mb/google/brox: Enable early power off support
by Subrata Banik (Code Review) 11 Feb '25

11 Feb '25

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86357?usp=email ) Change subject: mb/google/brox: Enable early power off support ...................................................................... mb/google/brox: Enable early power off support Enable the PLATFORM_SUPPORTS_EARLY_POWEROFF Kconfig option for the Brox board. This allows the platform to perform early power off procedures, which are often required on Intel platforms to implement eSOL (early Sign-Of-Life) during low-battery boot. Change-Id: I68c8ed7e060655cd049f51942cc04ff5b668aea8 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brox/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/86357/1 diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig index 1731d51..f59bac4 100644 --- a/src/mainboard/google/brox/Kconfig +++ b/src/mainboard/google/brox/Kconfig @@ -26,6 +26,7 @@ select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_TPM2 + select PLATFORM_SUPPORTS_EARLY_POWEROFF select PMC_IPC_ACPI_INTERFACE select SOC_INTEL_CSE_LITE_SKU select SOC_INTEL_CSE_SEND_EOP_ASYNC -- To view, visit https://review.coreboot.org/c/coreboot/+/86357?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I68c8ed7e060655cd049f51942cc04ff5b668aea8 Gerrit-Change-Number: 86357 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>

1 0

[XS] Change in coreboot[main]: soc/intel/alderlake: Add early power off support
by Subrata Banik (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86356?usp=email ) Change subject: soc/intel/alderlake: Add early power off support ...................................................................... soc/intel/alderlake: Add early power off support This commit adds support for early power off on Alder Lake platforms. It introduces a platform_do_early_poweroff() function which, when PLATFORM_SUPPORTS_EARLY_POWEROFF is enabled, calls the EC's early power off function (google_chromeec_do_early_poweroff()) if the Chrome EC is present. This allows for early power off scenarios on platforms that require it. BUG=b:339673254 TEST=Able to build and boot google/brox. Change-Id: Ib748cb4d540c631afd0f6bd5bff23ec17601f3ed Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/alderlake/reset.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/86356/1 diff --git a/src/soc/intel/alderlake/reset.c b/src/soc/intel/alderlake/reset.c index bc5815a..039dba6 100644 --- a/src/soc/intel/alderlake/reset.c +++ b/src/soc/intel/alderlake/reset.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <cf9_reset.h> +#include <ec/google/chromeec/ec.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> #include <soc/intel/common/reset.h> @@ -15,3 +16,11 @@ pmc_global_reset_enable(1); do_full_reset(); } + +#if CONFIG(PLATFORM_SUPPORTS_EARLY_POWEROFF) +void platform_do_early_poweroff(void) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + google_chromeec_do_early_poweroff(); +} +#endif -- To view, visit https://review.coreboot.org/c/coreboot/+/86356?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib748cb4d540c631afd0f6bd5bff23ec17601f3ed Gerrit-Change-Number: 86356 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

1 0

[M] Change in coreboot[main]: soc/intel/cmn/pmc: Add support for early power off
by Subrata Banik (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Angel Pons, Intel coreboot Reviewers, Karthik Ramasubramanian, Subrata Banik. Hello Angel Pons, Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86336?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: soc/intel/cmn/pmc: Add support for early power off ...................................................................... soc/intel/cmn/pmc: Add support for early power off This commit adds support for early power off on Intel platforms along with existing PMC based implementation to support power off at later stage (like ramsatge). A new function, `platform_do_early_poweroff`, is added to the pmclib to handle platform-specific early power off procedures. This function is called before memory initialization (in romstage or earlier). Platform that supports early power off (using PLATFORM_SUPPORTS_EARLY_POWEROFF Kconfig) needs to implement `platform_do_early_poweroff()` to power off the platform. BUG=b:339673254 TEST=Able to build and boot google/brox. Change-Id: I39f516640b3f75ab4c6a09826922289c0533f79b Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/include/intelblocks/pmclib.h M src/soc/intel/common/block/pmc/Kconfig M src/soc/intel/common/block/pmc/pmclib.c 3 files changed, 51 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/86336/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86336?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I39f516640b3f75ab4c6a09826922289c0533f79b Gerrit-Change-Number: 86336 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

1 0

[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL
by Yidi Lin (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86353?usp=email ) Change subject: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86353?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea44f13af030f24c02993dd43a35a9d8b4f72179 Gerrit-Change-Number: 86353 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 11 Feb 2025 08:14:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL
by Jarried Lin (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86353?usp=email ) Change subject: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL ...................................................................... Patch Set 2: (8 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86353/comment/a10199cb_e177d923?us… : PS1, Line 7: issue of RTC recovery failed > RTC recovery by disabling external XTAL Done https://review.coreboot.org/c/coreboot/+/86353/comment/255f0256_b384072a?us… : PS1, Line 9: decide whether > decides whether to Done https://review.coreboot.org/c/coreboot/+/86353/comment/3516b8f8_e0475c07?us… : PS1, Line 9: Config > Configure Done https://review.coreboot.org/c/coreboot/+/86353/comment/7c2aa11e_4b6abcef?us… : PS1, Line 9: pmic > PMIC Done https://review.coreboot.org/c/coreboot/+/86353/comment/c5380f91_193b142f?us… : PS1, Line 9: , : t > . T Done https://review.coreboot.org/c/coreboot/+/86353/comment/7aa3e538_d1b45f0f?us… : PS1, Line 10: , which means without external : xtal. > to disable external xtal. Done https://review.coreboot.org/c/coreboot/+/86353/comment/a8214d86_11c9d48b?us… : PS1, Line 16: rtc will boot normally > RTC boots normally. Done https://review.coreboot.org/c/coreboot/+/86353/comment/aabf0a8d_3061e688?us… : PS1, Line 16: charge > charger ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86353?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea44f13af030f24c02993dd43a35a9d8b4f72179 Gerrit-Change-Number: 86353 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 11 Feb 2025 08:11:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

1 0

[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Use a separate ec.h for dirks
by Subrata Banik (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Ivy Jian. ( https://review.coreboot.org/c/coreboot/+/86354?usp=email ) Change subject: mb/google/nissa/var/dirks: Use a separate ec.h for dirks ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8089a2aff3032a4271212765f65881a09f42c1ae Gerrit-Change-Number: 86354 Gerrit-PatchSet: 1 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 11 Feb 2025 08:10:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL
by Jarried Lin (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86353?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL ...................................................................... soc/mediatek/mt8196: Fix RTC recovery by disabling external XTAL Configure PMIC register 0x50c bit0 which decides whether to use external xtal. This bit of mt6685 should be set to 1, to disable external xtal. BRANCH=rauru BUG=b:395485005 TEST=emerge-rauru coreboot chromeos-bootimage, remove battery and charger, then insert battery and charge, RTC boots normally. Signed-off-by: Shunxi Zhang <ot_shunxi.zhang(a)mediatek.com> Change-Id: Iea44f13af030f24c02993dd43a35a9d8b4f72179 --- M src/soc/mediatek/mt8196/mt6685_rtc.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/86353/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86353?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea44f13af030f24c02993dd43a35a9d8b4f72179 Gerrit-Change-Number: 86353 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

1 0

[XS] Change in coreboot[main]: soc/mediatek/mt8196: Require mtk_fsp_*.elf to exist
by Yidi Lin (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/86355?usp=email ) Change subject: soc/mediatek/mt8196: Require mtk_fsp_*.elf to exist ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86355?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I668319ae1f63818e324002e7ae4d888479edb9cf Gerrit-Change-Number: 86355 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 11 Feb 2025 08:10:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: mb/google/nissa/var/dirks: Update GPIO table
by Subrata Banik (Code Review) 11 Feb '25

11 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Ivy Jian. ( https://review.coreboot.org/c/coreboot/+/86351?usp=email ) Change subject: mb/google/nissa/var/dirks: Update GPIO table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86351?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefc6aefeae0a3a05ba04fb2718c6c3a3058de5f8 Gerrit-Change-Number: 86351 Gerrit-PatchSet: 2 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 11 Feb 2025 08:10:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: soc/mediatek/mt8196: Require mtk_fsp_*.elf to exist
by Yu-Ping Wu (Code Review) 11 Feb '25

11 Feb '25

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86355?usp=email ) Change subject: soc/mediatek/mt8196: Require mtk_fsp_*.elf to exist ...................................................................... soc/mediatek/mt8196: Require mtk_fsp_*.elf to exist As MT8196 won't be able to boot up without mtk_fsp_romstage.elf and mtk_fsp_ramstage.elf, ensure their presence in build time. Change-Id: I668319ae1f63818e324002e7ae4d888479edb9cf Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8196/Makefile.mk 1 file changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86355/1 diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index a67da6b..f0f71d0 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -132,17 +132,13 @@ $(FSP_ROMSTAGE_CBFS)-file := $(MT8196_BLOB_DIR)/mtk_fsp_romstage.elf $(FSP_ROMSTAGE_CBFS)-type := stage $(FSP_ROMSTAGE_CBFS)-compression := $(CBFS_PRERAM_COMPRESS_FLAG) -ifneq ($(wildcard $($(FSP_ROMSTAGE_CBFS)-file)),) cbfs-files-y += $(FSP_ROMSTAGE_CBFS) -endif FSP_RAMSTAGE_CBFS := $(CONFIG_CBFS_PREFIX)/mtk_fsp_ramstage $(FSP_RAMSTAGE_CBFS)-file := $(MT8196_BLOB_DIR)/mtk_fsp_ramstage.elf $(FSP_RAMSTAGE_CBFS)-type := stage $(FSP_RAMSTAGE_CBFS)-compression := $(CBFS_COMPRESS_FLAG) -ifneq ($(wildcard $($(FSP_RAMSTAGE_CBFS)-file)),) cbfs-files-y += $(FSP_RAMSTAGE_CBFS) -endif $(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin ./util/mtkheader/gen-bl-img.py mt8196 sf $< $@ -- To view, visit https://review.coreboot.org/c/coreboot/+/86355?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I668319ae1f63818e324002e7ae4d888479edb9cf Gerrit-Change-Number: 86355 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit February 2025