coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

1 participants
2886 discussions

[S] Change in coreboot[main]: soc/amd/common/acp: Add host bridge interface for CZN
by Matt DeVillier (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/77703?usp=email ) Change subject: soc/amd/common/acp: Add host bridge interface for CZN ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/block/acp/acp.c: https://review.coreboot.org/c/coreboot/+/77703/comment/fac14cac_12858082?us… : PS2, Line 55: NotSerialized > is it intended that this isn't serialized? since the two functions access an index/data register pai […] I agree, not sure why it was originally written this way -- To view, visit https://review.coreboot.org/c/coreboot/+/77703?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I282f1fa2898f76659700450ee1f4b11f79d2d030 Gerrit-Change-Number: 77703 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 14 Feb 2025 18:06:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Johannes Hahn (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86424?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization Process the single SPD data file which resides in cbfs. Add KConfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additional to load the memory confiugration FSP-M parameters for the romstage are set. Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c A src/mainboard/siemens/fa_ehl/spd/Makefile.mk R src/mainboard/siemens/fa_ehl/spd/Nanya_NT6AP512T32BV-J1I.spd.hex A src/mainboard/siemens/fa_ehl/spd/spd.h M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c 9 files changed, 29 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 4 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[S] Change in coreboot[main]: soc/amd/common/acp: Add host bridge interface for CZN
by Felix Held (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, Matt DeVillier. Felix Held has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/77703?usp=email ) Change subject: soc/amd/common/acp: Add host bridge interface for CZN ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/block/acp/acp.c: https://review.coreboot.org/c/coreboot/+/77703/comment/cd3cf325_30a4c5d5?us… : PS2, Line 55: NotSerialized is it intended that this isn't serialized? since the two functions access an index/data register pair, i'd make sure to have those access function calls being serialized -- To view, visit https://review.coreboot.org/c/coreboot/+/77703?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I282f1fa2898f76659700450ee1f4b11f79d2d030 Gerrit-Change-Number: 77703 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 14 Feb 2025 18:01:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/common: Add low battery shutdown function
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Angel Pons, Intel coreboot Reviewers, Julius Werner, Jérémy Compostella, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86361?usp=email ) Change subject: soc/intel/common: Add low battery shutdown function ...................................................................... Patch Set 7: (1 comment) File src/soc/intel/common/reset.c: https://review.coreboot.org/c/coreboot/+/86361/comment/c259effe_e609e6c5?us… : PS4, Line 27: poweroff(); > Is there a reason you can't squash those two CLs? It's easier to review the full implementation righ […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/86361?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92e9003c70c2608770972f1a302f954ebdf17bc4 Gerrit-Change-Number: 86361 Gerrit-PatchSet: 7 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 14 Feb 2025 17:58:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[main]: soc/intel/common: Add low battery shutdown function
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Angel Pons, Intel coreboot Reviewers, Jérémy Compostella, Karthik Ramasubramanian, Subrata Banik. Hello Angel Pons, Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86361?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/common: Add low battery shutdown function ...................................................................... soc/intel/common: Add low battery shutdown function This commit adds a `do_low_battery_poweroff()` function to handle platform power off due to critically low battery levels. This provides a standardized way to handle low battery shutdowns across platforms. Additionally, the delay to the `do_low_battery_poweroff()` function, allowing time for the low battery indicator to be displayed before powering off. The delay is configurable through the `PLATFORM_LOW_BATTERY_SHUTDOWN_DELAY_SEC` Kconfig option. Finally, a low battery indicator event is logged using `elog` before the delay. This functionality (elog and delay) is enabled when the `PLATFORM_HAS_LOW_BATTERY_INDICATOR` Kconfig option is selected. BUG=b:339673254 TEST=Able to build and boot google/brox. Change-Id: I92e9003c70c2608770972f1a302f954ebdf17bc4 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/reset.c M src/soc/intel/common/reset.h 2 files changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/86361/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/86361?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92e9003c70c2608770972f1a302f954ebdf17bc4 Gerrit-Change-Number: 86361 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: ec/google/chromeec: Implement early power off support
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Julius Werner, Karthik Ramasubramanian. Hello Boris Mittelberg, Caveh Jalali, Julius Werner, Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86379?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+2 by Julius Werner, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: ec/google/chromeec: Implement early power off support ...................................................................... ec/google/chromeec: Implement early power off support This commit renames the `google_chromeec_do_early_poweroff()` function to `platform_do_early_poweroff()`, aligning it with the API that adds early power off support using the Chrome EC. It selects the `HAVE_EARLY_POWEROFF_SUPPORT` Kconfig option for platform to perform early power off procedures. Change-Id: I0c634d69de36fe8bdb6a61c121e321d3626ac3ff Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/ec/google/chromeec/Kconfig M src/ec/google/chromeec/ec.c M src/ec/google/chromeec/ec.h 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/86379/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86379?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0c634d69de36fe8bdb6a61c121e321d3626ac3ff Gerrit-Change-Number: 86379 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com>

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[XS] Change in coreboot[main]: ec/google/chromeec: Implement early power off support
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86379?usp=email ) Change subject: ec/google/chromeec: Implement early power off support ...................................................................... Patch Set 4: (1 comment) File src/ec/google/chromeec/ec.c: https://review.coreboot.org/c/coreboot/+/86379/comment/07b30ec4_48e69b53?us… : PS4, Line 1675: void google_chromeec_do_early_poweroff(void) > Just rename this function to `platform_do_early_poweroff()`, it's otherwise unneeded. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/86379?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0c634d69de36fe8bdb6a61c121e321d3626ac3ff Gerrit-Change-Number: 86379 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Fri, 14 Feb 2025 17:57:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[M] Change in coreboot[main]: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization
by Johannes Hahn (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Johannes Hahn, Mario Scheithauer, Uwe Poeche, Werner Zeh. Hello Mario Scheithauer, Uwe Poeche, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86424?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization ...................................................................... src/mainboard/siemens/fa_ehl: Configure LPDDR4 initialization Process the single SPD data file which resides in cbfs. Add KConfig switch for SPD data in cbfs and include Nanya_NT6AP512T32BV-J1I.spd.hex into the build by adding a correspondig Makefile.mk in the spd folder. Additional to load the memory confiugration FSP-M parameters for the romstage are set. Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/mainboard/siemens/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/romstage_fsp_params.c A src/mainboard/siemens/fa_ehl/spd/Makefile.mk R src/mainboard/siemens/fa_ehl/spd/Nanya_NT6AP512T32BV-J1I.spd.hex A src/mainboard/siemens/fa_ehl/spd/spd.h M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Kconfig M src/mainboard/siemens/fa_ehl/variants/fa_ehl/Makefile.mk M src/mainboard/siemens/fa_ehl/variants/fa_ehl/memory.c 9 files changed, 32 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86424/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86424?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If84373dfbc1ecbf916489af6e964f8a7541f5e7b Gerrit-Change-Number: 86424 Gerrit-PatchSet: 3 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Uwe Poeche <uwe.poeche(a)siemens.com> Gerrit-Attention: Johannes Hahn <johannes-hahn(a)siemens.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>

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[XS] Change in coreboot[main]: soc/intel/common/reset: Add low battery indicator delay
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Subrata Banik has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/86419?usp=email ) Change subject: soc/intel/common/reset: Add low battery indicator delay ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/86419?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I56bff7af8c9ddd9b34d19d2c0b6a76172eff3f31 Gerrit-Change-Number: 86419 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: soc/intel/common/reset: Add low battery indicator delay
by Subrata Banik (Code Review) 14 Feb '25

14 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86419?usp=email ) Change subject: soc/intel/common/reset: Add low battery indicator delay ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/reset.c: https://review.coreboot.org/c/coreboot/+/86419/comment/8372c39d_3602f262?us… : PS1, Line 29: if (CONFIG(PLATFORM_HAS_LOW_BATTERY_INDICATOR)) { > > I don't think this needs to be checked here? This function is only called by code belonging to that feature anyway. > > This function can be called by others in future (in case) so just intended to avoid a case when `do_low_battery_poweroff` might end up logging elog event and add delay. > > WDYT ? I have suashed this CL with CB:86361 -- To view, visit https://review.coreboot.org/c/coreboot/+/86419?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I56bff7af8c9ddd9b34d19d2c0b6a76172eff3f31 Gerrit-Change-Number: 86419 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 14 Feb 2025 17:53:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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