coreboot-gerrit January 2025

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[M] Change in coreboot[main]: mb/amd/birman_plus: Update PCIe Slot configurations
by Felix Held (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Ana Carolina Cabral. Felix Held has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/85493?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: mb/amd/birman_plus: Update PCIe Slot configurations ...................................................................... Patch Set 22: Code-Review+1 (1 comment) File src/mainboard/amd/birman_plus/port_descriptors_glinda.c: PS22: we're likely missing the ssd1 dxio descriptor here which should be covering lanes 8-11 -- To view, visit https://review.coreboot.org/c/coreboot/+/85493?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia310ea616006479b9a052afb99d08df6a11431f4 Gerrit-Change-Number: 85493 Gerrit-PatchSet: 22 Gerrit-Owner: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 09:49:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/fatcat/variants/fatcat: Enable BT audio offload
by Subrata Banik (Code Review) 31 Jan '25

31 Jan '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86121?usp=email ) Change subject: mb/google/fatcat/variants/fatcat: Enable BT audio offload ...................................................................... mb/google/fatcat/variants/fatcat: Enable BT audio offload vGPIO configs are configured to enable SSP2 for BT audio offload. BUG=b:391771159 Test=Verified BT offload with I2S and soundwire configuration Change-Id: Id68667d674386cf9e6abc066a4637ee055a967f3 Signed-off-by: Uday M Bhat <uday.m.bhat(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86121 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Pranava Y N <pranavayn(a)google.com> --- M src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/variant.c 2 files changed, 62 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Pranava Y N: Looks good to me, approved Subrata Banik: Looks good to me, approved Jamie Ryu: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c index ad14c66..9419caf 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c +++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c @@ -85,6 +85,44 @@ PAD_CFG_GPO(GPP_D13, 1, PLTRST), }; +static const struct pad_config bt_i2s_enable_pads[] = { + /* GPP_V30 : [] ==> BT_I2S_BCLK - SSP2 */ + PAD_CFG_NF(GPP_VGPIO30, NONE, DEEP, NF3), + /* GPP_V31 : [] ==> BT_I2S_SYNC - SSP2 */ + PAD_CFG_NF(GPP_VGPIO31, NONE, DEEP, NF3), + /* GPP_V32 : [] ==> BT_I2S_SDO - SSP2 */ + PAD_CFG_NF(GPP_VGPIO32, NONE, DEEP, NF3), + /* GPP_V33 : [] ==> BT_I2S_SDI - SSP2 */ + PAD_CFG_NF(GPP_VGPIO33, NONE, DEEP, NF3), + /* GPP_V34 : [] ==> SSP_SCLK */ + PAD_CFG_NF(GPP_VGPIO34, NONE, DEEP, NF1), + /* GPP_V35 : [] ==> SSP_SFRM */ + PAD_CFG_NF(GPP_VGPIO35, NONE, DEEP, NF1), + /* GPP_V36 : [] ==> SSP_TXD */ + PAD_CFG_NF(GPP_VGPIO36, NONE, DEEP, NF1), + /* GPP_V37 : [] ==> SSP_RXD */ + PAD_CFG_NF(GPP_VGPIO37, NONE, DEEP, NF1), +}; + +static const struct pad_config bt_i2s_disable_pads[] = { + /* GPP_V30 : [] ==> BT_I2S_BCLK */ + PAD_NC(GPP_VGPIO30, NONE), + /* GPP_V31 : [] ==> BT_I2S_SYNC */ + PAD_NC(GPP_VGPIO31, NONE), + /* GPP_V32 : [] ==> BT_I2S_SDO */ + PAD_NC(GPP_VGPIO32, NONE), + /* GPP_V33 : [] ==> BT_I2S_SDI */ + PAD_NC(GPP_VGPIO33, NONE), + /* GPP_V34 : [] ==> SSP2_SCLK */ + PAD_NC(GPP_VGPIO34, NONE), + /* GPP_V35 : [] ==> SSP2_SFRM */ + PAD_NC(GPP_VGPIO35, NONE), + /* GPP_V36 : [] ==> SSP_TXD */ + PAD_NC(GPP_VGPIO36, NONE), + /* GPP_V37 : [] ==> SSP_RXD */ + PAD_NC(GPP_VGPIO37, NONE), +}; + static const struct pad_config sndw_alc722_enable_pads[] = { /* SNDW3_CLK */ PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1), @@ -535,17 +573,28 @@ GPIO_PADBASED_OVERRIDE(padbased_table, ufs_enable_pads); } - if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_NONE))) + if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_NONE))) { GPIO_PADBASED_OVERRIDE(padbased_table, audio_disable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98360_ALC5682I_I2S))) + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_disable_pads); + } else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98360_ALC5682I_I2S))) { + printk(BIOS_INFO, "Configure GPIOs for I2S MAX98360 ALC5682 audio.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, i2s_enable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98373_ALC5682_SNDW))) + printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads); + } else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98373_ALC5682_SNDW))) { GPIO_PADBASED_OVERRIDE(padbased_table, sndw_external_codec_enable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC722_SNDW)) || - fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC721_SNDW))) + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_disable_pads); + } else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC722_SNDW)) || + fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC721_SNDW))) { + printk(BIOS_INFO, "Configure GPIOs for Soundwire audio.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, sndw_alc722_enable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256_HDA))) + printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads); + } else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256_HDA))) { + printk(BIOS_INFO, "Configure GPIOs for HDA ALC 256 mode.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, hda_enable_pads); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_disable_pads); + } if (fw_config_probe(FW_CONFIG(WIFI, WIFI_PCIE_6)) || fw_config_probe(FW_CONFIG(WIFI, WIFI_PCIE_7))) { diff --git a/src/mainboard/google/fatcat/variants/fatcat/variant.c b/src/mainboard/google/fatcat/variants/fatcat/variant.c index 086f709..c7aa7aa 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/variant.c +++ b/src/mainboard/google/fatcat/variants/fatcat/variant.c @@ -19,5 +19,12 @@ fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_7))) { config->cnvi_wifi_core = true; config->cnvi_bt_core = true; + + if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98360_ALC5682I_I2S)) || + fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC722_SNDW)) || + fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC721_SNDW))) { + printk(BIOS_INFO, "BT audio offload configured.\n"); + config->cnvi_bt_audio_offload = true; + } } } -- To view, visit https://review.coreboot.org/c/coreboot/+/86121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id68667d674386cf9e6abc066a4637ee055a967f3 Gerrit-Change-Number: 86121 Gerrit-PatchSet: 3 Gerrit-Owner: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XL] Change in coreboot[main]: drivers/intel/touch: Add Intel Touch Controller driver
by Paul Menzel (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Bora Guvendik, Cliff Huang, Intel coreboot Reviewers, Jérémy Compostella, Kyoung Il Kim, Subrata Banik. Paul Menzel has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/85198?usp=email ) Change subject: drivers/intel/touch: Add Intel Touch Controller driver ...................................................................... Patch Set 12: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85198/comment/3639e1a3_d29d7f07?us… : PS12, Line 26: Does the driver log something? Any hints how to debug the driver? File src/drivers/intel/touch/chip.h: https://review.coreboot.org/c/coreboot/+/85198/comment/237027dc_e0a3cce3?us… : PS12, Line 15: uint64_t connection_speed; What is the unit? https://review.coreboot.org/c/coreboot/+/85198/comment/ac0400ea_566e83d1?us… : PS12, Line 18: Period What is the unit? https://review.coreboot.org/c/coreboot/+/85198/comment/6f566e3f_dba70fe0?us… : PS12, Line 183: /* Delay to be inserted after device is taken out of reset. */ No dot at the end (also above and below). File src/drivers/intel/touch/elan.h: https://review.coreboot.org/c/coreboot/+/85198/comment/4d454ef3_37114114?us… : PS12, Line 17: #define ELAN_RST_SEQ_DLY 300 Please add the unit to the name. https://review.coreboot.org/c/coreboot/+/85198/comment/d8d7beba_2d5df427?us… : PS12, Line 45: 2C Fast Missing I? -- To view, visit https://review.coreboot.org/c/coreboot/+/85198?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcd2a75a41460dee67aebdc61ee9e85fa98b71bf Gerrit-Change-Number: 85198 Gerrit-PatchSet: 12 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 08:30:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/denverton_ns:Remove unused memcpy_s function
by Paul Menzel (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Elyes Haouas. Paul Menzel has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/86233?usp=email ) Change subject: soc/intel/denverton_ns:Remove unused memcpy_s function ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86233/comment/7af33ccb_83530781?us… : PS5, Line 7: soc/intel/denverton_ns:Remove Please add a space. https://review.coreboot.org/c/coreboot/+/86233/comment/b5593cef_bfa0c184?us… : PS5, Line 8: Please add to the commit message, since when they are unused. -- To view, visit https://review.coreboot.org/c/coreboot/+/86233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Gerrit-Change-Number: 86233 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 31 Jan 2025 08:23:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/fatcat/variants/fatcat: Enable BT audio offload
by Pranava Y N (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Naveen M, Uday Bhat. Pranava Y N has posted comments on this change by Uday Bhat. ( https://review.coreboot.org/c/coreboot/+/86121?usp=email ) Change subject: mb/google/fatcat/variants/fatcat: Enable BT audio offload ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id68667d674386cf9e6abc066a4637ee055a967f3 Gerrit-Change-Number: 86121 Gerrit-PatchSet: 2 Gerrit-Owner: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Uday Bhat <uday.m.bhat(a)intel.com> Gerrit-Attention: Naveen M <naveen.m(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 07:28:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Keith Hui (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Angel Pons, Bill XIE, Nicholas Chin. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > The last revision will already fail to boot Linux kernel (will try rebooting and fail from bootblock […] Since which patch set did it start to fail? -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 06:14:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[XS] Change in coreboot[main]: payloads/external/Makefile.mk: Update linuxboot warning
by Elyes Haouas (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Martin L Roth, Maximilian Brune. Elyes Haouas has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/85957?usp=email ) Change subject: payloads/external/Makefile.mk: Update linuxboot warning ...................................................................... Patch Set 1: (1 comment) File payloads/external/Makefile.mk: https://review.coreboot.org/c/coreboot/+/85957/comment/e6e2592f_53e864e5?us… : PS1, Line 393: ifeq ($(CONFIG_LINUXBOOT_CROSS_COMPILE),y) : ifeq ($(CONFIG_LINUXBOOT_CROSS_COMPILE_PATH),"") : # use coreboots cross toolchain : CONFIG_LINUXBOOT_CROSS_COMPILE_PATH=$(CROSS_COMPILE_$(LINUXBOOT_CROSS_COMPILE_ARCH-y)) : endif # CONFIG_LINUXBOOT_CROSS_COMPILE_PATH : else # CONFIG_LINUXBOOT_CROSS_COMPILE : ifeq ($(CONFIG_PAYLOAD_LINUXBOOT),y) : # only print warning when Linuxboot payload is actually selected : $(warning "Using host toolchain to build Linuxboot") : endif # CONFIG_PAYLOAD_LINUXBOOT : endif # CONFIG_LINUXBOOT_CROSS_COMPILE > It looks definitely more readable, but I noticed that you changed: […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5008d685c52c1d4e0d7eba44c964c51a2a6f99c3 Gerrit-Change-Number: 85957 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 05:28:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[M] Change in coreboot[main]: include/string.h: Add memcpy_s function
by Elyes Haouas (Code Review) 31 Jan '25

31 Jan '25

Elyes Haouas has restored this change. ( https://review.coreboot.org/c/coreboot/+/86233?usp=email ) Change subject: include/string.h: Add memcpy_s function ...................................................................... Restored -- To view, visit https://review.coreboot.org/c/coreboot/+/86233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: restore Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Gerrit-Change-Number: 86233 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com>

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Bill XIE (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Angel Pons, Keith Hui, Nicholas Chin. Bill XIE has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 6: (1 comment) Patchset: PS6: > Bill, since I also removed the PP/OD setting around GPIO bank 7 which overlaps with the 3 reset outp […] The last revision will already fail to boot Linux kernel (will try rebooting and fail from bootblock) occasionally, but now it always fails here. On grub, the card on PCIEX1_2 remains not well detected. -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 05:08:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[L] Change in coreboot[main]: mb/asus/p8x7x-series: Add SABERTOOTH Z77 as a variant
by Keith Hui (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Keith Hui. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85768?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/asus/p8x7x-series: Add SABERTOOTH Z77 as a variant ...................................................................... mb/asus/p8x7x-series: Add SABERTOOTH Z77 as a variant Based on p8z77-v, with adjusted overridetree, GPIO, GMA, HDA verbs and USB port config based on boardview and vendor firmware image. It builds, but not hardware tested. Unlike most other variants, this one allows use of MRC raminit, if for testing. It has no serial port, but the code describes a possible hardware hack to get one working to receive console output. A debug port allows access to LPC bus. Change-Id: I1c26e751a224491c5aa1ce1035c55955ef0ee83c Signed-off-by: Keith Hui <buurin(a)gmail.com> --- A Documentation/mainboard/asus/sabertooth_z77.md M Documentation/mainboard/index.md A configs/config.asus_sabertooth_z77_mrc_bin M src/mainboard/asus/p8x7x-series/Kconfig M src/mainboard/asus/p8x7x-series/Kconfig.name A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/board_info.txt A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/cmos.default A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/cmos.layout A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/data.vbt A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/early_init.c A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/gma-mainboard.ads A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/gpio.c A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/hda_verb.c A src/mainboard/asus/p8x7x-series/variants/sabertooth_z77/overridetree.cb 14 files changed, 828 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/85768/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/85768?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c26e751a224491c5aa1ce1035c55955ef0ee83c Gerrit-Change-Number: 85768 Gerrit-PatchSet: 9 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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coreboot-gerrit January 2025