coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: 3rdparty/fsp: Update submodule to upstream master
by Michał Żygowski (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Felix Singer. Michał Żygowski has posted comments on this change by Felix Singer. ( https://review.coreboot.org/c/coreboot/+/85851?usp=email ) Change subject: 3rdparty/fsp: Update submodule to upstream master ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > For those who use ADL-N boards, you may need to update VBTs, because the format of VBT changed since […] Knowing the issue causes bricks I am somewhat reluctant to give +2. But on the other hand, the submodule would need to be bumped, sooner or later. -- To view, visit https://review.coreboot.org/c/coreboot/+/85851?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d04308773ccc99983275355c928cd01b034da26 Gerrit-Change-Number: 85851 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Comment-Date: Fri, 31 Jan 2025 13:02:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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[XS] Change in coreboot[main]: arch/x86/cpu: Add element id to struct cpu_cache_info
by Felix Held (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Jérémy Compostella, Naresh Solanki. Felix Held has posted comments on this change by Naresh Solanki. ( https://review.coreboot.org/c/coreboot/+/85639?usp=email ) Change subject: arch/x86/cpu: Add element id to struct cpu_cache_info ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/include/arch/cpu.h: https://review.coreboot.org/c/coreboot/+/85639/comment/503f27b4_19d332ca?us… : PS1, Line 280: uint8_t > I was thinking of `unique_id`, but I'm okay with `cache_id` too. […] 'unique_id' sounds good to me; that's probably even a bit more descriptive. also agree on the changed placement of the struct member within the struct -- To view, visit https://review.coreboot.org/c/coreboot/+/85639?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29002931b559a05756419e0c4ec5c78586d3c3a5 Gerrit-Change-Number: 85639 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 12:51:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Comment-In-Reply-To: Naresh Solanki <naresh.solanki(a)9elements.com>

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[XS] Change in coreboot[main]: mb/erying/tgl: Drop specifying which timers to use
by Alicja Michalska (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Angel Pons, Jérémy Compostella, Matt DeVillier. Alicja Michalska has posted comments on this change by Alicja Michalska. ( https://review.coreboot.org/c/coreboot/+/86093?usp=email ) Change subject: mb/erying/tgl: Drop specifying which timers to use ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86093/comment/1433d7a7_18e29827?us… : PS2, Line 1: Parent: 9dee482a (mb/google/nissa/var/telith: Configure Acoustic noise mitigation) > Ah, I see. […] Sure thing! -- To view, visit https://review.coreboot.org/c/coreboot/+/86093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If6e0ac1d289447c292a49111251d321c951078e2 Gerrit-Change-Number: 86093 Gerrit-PatchSet: 2 Gerrit-Owner: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 11:36:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Alicja Michalska <ahplka19(a)gmail.com> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: device/Kconfig: Make option to allocate above 4G appear in Kconfig
by Alicja Michalska (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held. Alicja Michalska has posted comments on this change by Alicja Michalska. ( https://review.coreboot.org/c/coreboot/+/86131?usp=email ) Change subject: device/Kconfig: Make option to allocate above 4G appear in Kconfig ...................................................................... Patch Set 4: (1 comment) File src/device/Kconfig: https://review.coreboot.org/c/coreboot/+/86131/comment/9a901afc_7f37e88a?us… : PS4, Line 1015: default y > I don't think it is According to Arthur Heymans, it should be on for non-x86. Not sure if it would have any negative impact, but I didn't see any problematic code in the tree other than Intel's Braswell/ApolloLake and blocks like crashlog (which obviously is x86) -- To view, visit https://review.coreboot.org/c/coreboot/+/86131?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia17b3312016409d8fd6bcce4321481a7b7e35ce5 Gerrit-Change-Number: 86131 Gerrit-PatchSet: 4 Gerrit-Owner: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 31 Jan 2025 11:35:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: mb/amd/birman_plus/ec: Rectify ECRAM register bits
by Felix Held (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Ana Carolina Cabral. Felix Held has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/86084?usp=email ) Change subject: mb/amd/birman_plus/ec: Rectify ECRAM register bits ...................................................................... Patch Set 13: (9 comments) File src/mainboard/amd/birman_plus/ec.c: https://review.coreboot.org/c/coreboot/+/86084/comment/3caf17fa_3392af72?us… : PS13, Line 11: #define EC_GPIO_0_ADDR 0xA0 the defines are added, but not used in the code; is this intended? https://review.coreboot.org/c/coreboot/+/86084/comment/cf2bbc92_32e445e2?us… : PS13, Line 33: #define EC_GPIO_7_ADDR 0xA7 do we also need to bring BIT(6) of this one into a defined state? https://review.coreboot.org/c/coreboot/+/86084/comment/81e140ab_c14c9beb?us… : PS13, Line 36: _N i don't think that this one is inverted. sure, the signal on the m.2 slot is inverted, but there's an n-channel fet driving that one which converts the noninverted signal from the ec to an inverted open drain signal to the card https://review.coreboot.org/c/coreboot/+/86084/comment/827604dc_bd7fac63?us… : PS13, Line 38: #define EC_GPIO_8_ADDR 0xA8 is it intended that this register isn't written to? https://review.coreboot.org/c/coreboot/+/86084/comment/b4092d96_e23ed2ad?us… : PS13, Line 79: #define EC_GPIO_F_ADDR 0xAF i wonder if we'll need some of the other bits in this register too or does the EC drive those by itself? only looked at the schematics, not the reference code https://review.coreboot.org/c/coreboot/+/86084/comment/a30ff7f5_70e99160?us… : PS13, Line 127: EC7_WL_RADIO_DIS_N see my comment on the register bit; i'd expect this one needing to be cleared, not set https://review.coreboot.org/c/coreboot/+/86084/comment/7c5e275e_0c35ff78?us… : PS13, Line 138: tmp = ECA_MUX1_S0 | ECA_SMBUS1_EN | ECA_SMBUS0_EN; would probably be good to configure the other muxes here too https://review.coreboot.org/c/coreboot/+/86084/comment/8ee97103_2a809053?us… : PS13, Line 142: tmp = ec_read(EC_GPIO_6_ADDR); : tmp |= EC6_TPNL_BUF_EN | EC6_TPAD_BUF_EN; : printk(BIOS_SPEW, "Write reg [0x%02x] = 0x%02x\n", EC_GPIO_6_ADDR, tmp); : ec_write(EC_GPIO_6_ADDR, tmp); i'd move this block between the ones for EC_GPIO_3_ADDR and EC_GPIO_7_ADDR https://review.coreboot.org/c/coreboot/+/86084/comment/0b6d0692_7375a7fa?us… : PS13, Line 156: if (CONFIG(DISABLE_WWAN_GBE_BIRMANPLUS)) { // no WWAN, turn off WWAN power i'd find it a bit easier to read when doing the bit clear/bit set in the if/else branches and not have a default and override it in one case. same thing about the 3 if(CONFIG(...)) statements below -- To view, visit https://review.coreboot.org/c/coreboot/+/86084?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a13d99a55a4aa02a5cb0e67ffa4ed555f91a471 Gerrit-Change-Number: 86084 Gerrit-PatchSet: 13 Gerrit-Owner: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 10:49:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: vc/google/chromeos: Refactor Makefile to use a macro for CBFS logo
by Subrata Banik (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Jérémy Compostella. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/86237?usp=email ) Change subject: vc/google/chromeos: Refactor Makefile to use a macro for CBFS logo ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86237?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I827451da79931c09768965c3ad071ecdd918d367 Gerrit-Change-Number: 86237 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Fri, 31 Jan 2025 10:05:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/denverton_ns: Remove unused memcpy_s function
by Elyes Haouas (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Julius Werner, Paul Menzel. Hello Intel coreboot Reviewers, Jeff Daly, Julius Werner, Maximilian Brune, Philipp Hug, Vanessa Eusebio, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86233?usp=email to look at the new patch set (#7). Change subject: soc/intel/denverton_ns: Remove unused memcpy_s function ...................................................................... soc/intel/denverton_ns: Remove unused memcpy_s function Remove the memcpy_s function as it is not used. Additionally, the function did not return the expected values: 0: If the memory copy is successful. EINVAL: If dest or src is a null pointer, or if count is greater than RSIZE_MAX. ERANGE: If count is greater than destsz. Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/include/soc/soc_util.h M src/soc/intel/denverton_ns/soc_util.c 2 files changed, 0 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/86233/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/86233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Gerrit-Change-Number: 86233 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>

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[M] Change in coreboot[main]: soc/intel/denverton_ns: Remove unused memcpy_s function
by Elyes Haouas (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Julius Werner, Paul Menzel. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/86233?usp=email ) Change subject: soc/intel/denverton_ns: Remove unused memcpy_s function ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86233/comment/a1a8bde9_777ac9a3?us… : PS5, Line 7: soc/intel/denverton_ns:Remove > Please add a space. Done https://review.coreboot.org/c/coreboot/+/86233/comment/d73da533_b2c5b73b?us… : PS5, Line 8: > Please add to the commit message, since when they are unused. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Gerrit-Change-Number: 86233 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 31 Jan 2025 09:58:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: soc/intel/denverton_ns: Remove unused memcpy_s function
by Elyes Haouas (Code Review) 31 Jan '25

31 Jan '25

Attention is currently required from: Elyes Haouas. Hello Intel coreboot Reviewers, Jeff Daly, Maximilian Brune, Philipp Hug, Vanessa Eusebio, build bot (Jenkins), ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86233?usp=email to look at the new patch set (#6). Change subject: soc/intel/denverton_ns: Remove unused memcpy_s function ...................................................................... soc/intel/denverton_ns: Remove unused memcpy_s function Remove the memcpy_s function as it is not used in the project. Additionally, the function did not return the expected values: 0: If the memory copy is successful. EINVAL: If dest or src is a null pointer, or if count is greater than RSIZE_MAX. ERANGE: If count is greater than destsz. Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/include/soc/soc_util.h M src/soc/intel/denverton_ns/soc_util.c 2 files changed, 0 insertions(+), 54 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/86233/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/86233?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0d32c838e94ae760907efe55ed00bab3faaaa8c5 Gerrit-Change-Number: 86233 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[S] Change in coreboot[main]: mb/amd/birman_plus: Update phoenix port descriptors
by Felix Held (Code Review) 31 Jan '25

31 Jan '25

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coreboot-gerrit January 2025