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Change subject: mb/starlabs/starfighter: Enable TBT GPIOs
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/starlabs/starfighter: Disable EC SCI and SMI GPIOs
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Patch Set 4: Code-Review+2
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Change subject: mb/starlabs/starbook/rpl: Disconnect unused GPIO
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Patch Set 4: Code-Review+2
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Change subject: mb/starlabs/*: Enhance RTD3 configuration
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Patch Set 5: Code-Review+2
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Change subject: mb/starlabs/*: Set ASPM and L1SS in devicetree
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Patch Set 5: Code-Review+2
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Matt DeVillier has uploaded a new patch set (#18) to the change originally created by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84633?usp=email )
The following approvals got outdated and were removed:
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Change subject: ec/starlabs/merlin: Add support for setting the charging speed
......................................................................
ec/starlabs/merlin: Add support for setting the charging speed
Allow boards that use the merlin EC to configure the charging speed,
as all versions of the merlin EC support this.
All coreboot does it write a value to the EC RAM and the EC will
handle the rest.
Change-Id: I46faa540530c5bd7f5473021561380213158152e
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
---
M src/ec/starlabs/merlin/Kconfig
M src/ec/starlabs/merlin/ec.h
M src/ec/starlabs/merlin/ite.c
M src/ec/starlabs/merlin/variants/apl/ecdefs.h
M src/ec/starlabs/merlin/variants/cezanne/ecdefs.h
M src/ec/starlabs/merlin/variants/glk/ecdefs.h
M src/ec/starlabs/merlin/variants/glkr/ecdefs.h
M src/ec/starlabs/merlin/variants/kbl/ecdefs.h
M src/ec/starlabs/merlin/variants/merlin/ecdefs.h
M src/mainboard/starlabs/starbook/Kconfig
M src/mainboard/starlabs/starbook/cmos.default
M src/mainboard/starlabs/starbook/cmos.layout
M src/mainboard/starlabs/starfighter/Kconfig
M src/mainboard/starlabs/starfighter/cmos.default
M src/mainboard/starlabs/starfighter/cmos.layout
M src/mainboard/starlabs/starlite_adl/Kconfig
M src/mainboard/starlabs/starlite_adl/cmos.default
M src/mainboard/starlabs/starlite_adl/cmos.layout
18 files changed, 64 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/84633/18
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Change subject: drivers/usb/acpi: Don't add GPIOs to _CRS for Intel Bluetooth
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
Applying this patch and diffing the resulting ACPI, this will drop the _CRS and _DSD entirely for the Intel BT device. Is that the intention here?
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Change subject: soc/intel/pantherlake: Add core scaling factors read support
......................................................................
Patch Set 10:
(1 comment)
File src/soc/intel/common/block/include/intelblocks/acpi.h:
https://review.coreboot.org/c/coreboot/+/85554/comment/d40d3b2a_c9916509?us… :
PS10, Line 21: /* CPU Performance Type */
> I am not quite sure the enum is here whereas no ACPI related changes.
Because it is used in https://review.coreboot.org/c/coreboot/+/85554/10/src/soc/intel/pantherlake….
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