coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

1 participants
643 discussions

[S] Change in coreboot[main]: util/chromeos/crosfirmware: Add special handling for REEF board
by Felix Singer (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Matt DeVillier. Felix Singer has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/85873?usp=email ) Change subject: util/chromeos/crosfirmware: Add special handling for REEF board ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Gerrit-Change-Number: 85873 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 02:27:10 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: util/chromeos/crosfirmware: Add special handling for REEF board
by Matt DeVillier (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Felix Singer. Hello Felix Singer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85873?usp=email to look at the new patch set (#3). Change subject: util/chromeos/crosfirmware: Add special handling for REEF board ...................................................................... util/chromeos/crosfirmware: Add special handling for REEF board The layout of an extracted REEF shellball doesn't conform to the usual ones used by other boards, so add a special-case handler for it. TEST= run `bash croshfirmware.sh reef` and receive the correct firmware image for the board. Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M util/chromeos/crosfirmware.sh 1 file changed, 8 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/85873/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Gerrit-Change-Number: 85873 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

1 0

[XS] Change in coreboot[main]: util/chromeos/crosfirmware: Add special handling for REEF board
by Matt DeVillier (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Felix Singer. Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/85873?usp=email ) Change subject: util/chromeos/crosfirmware: Add special handling for REEF board ...................................................................... Patch Set 2: (1 comment) File util/chromeos/crosfirmware.sh: https://review.coreboot.org/c/coreboot/+/85873/comment/6f5602eb_dc239c1f?us… : PS1, Line 110: \ > While on it, maybe put it in between single quotation marks? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Gerrit-Change-Number: 85873 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Comment-Date: Tue, 07 Jan 2025 02:23:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

1 0

[XS] Change in coreboot[main]: util/chromeos/crosfirmware: Add special handling for REEF board
by Matt DeVillier (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Felix Singer, Matt DeVillier. Hello Felix Singer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85873?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Felix Singer, Verified+1 by build bot (Jenkins) Change subject: util/chromeos/crosfirmware: Add special handling for REEF board ...................................................................... util/chromeos/crosfirmware: Add special handling for REEF board The layout of an extracted REEF shellball doesn't conform to the usual ones used by other boards, so add a special-case handler for it. TEST= run `bash croshfirmware.sh reef` and receive the correct firmware image for the board. Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M util/chromeos/crosfirmware.sh 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/85873/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Gerrit-Change-Number: 85873 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

1 0

[XL] Change in coreboot[main]: soc/mediatek/common/dp: Move common functions to dptx_hal_common.c
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85861?usp=email ) Change subject: soc/mediatek/common/dp: Move common functions to dptx_hal_common.c ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/common/dp/dptx_hal_common.c: https://review.coreboot.org/c/coreboot/+/85861/comment/ece6cf49_15ee11fb?us… : PS3, Line 115: DP_CLRSETBITS(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1, val, 0x7); > I define `DP_CLRSETBITS` on mt8196 like this. […] Okay, then that will also work. However, to determine whether to use your `DP_CLRSETBITS` solution or my suggestion about `mtk_dp_write_byte`, I think we need to understand why MT8196 doesn't need those `DP_TX_TOP_APB_WSTRB` writes (I see no references to `mtk_dp_write_byte` in MT8196's code). - If the original `mtk_dp_write_byte` flow (containing `DP_TX_TOP_APB_WSTRB` writes) makes sense for MT8196 and MT8196 happens to not need that function, then I'm fine with using `DP_CLRSETBITS`. - Otherwise, if `mtk_dp_write_byte` doesn't make sense for MT8196, then we should define a separate `mtk_dp_write_byte` (without `DP_TX_TOP_APB_WSTRB`), as I suggested above. -- To view, visit https://review.coreboot.org/c/coreboot/+/85861?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9e151bc766c312eaf81b4220782775ef1c9d2297 Gerrit-Change-Number: 85861 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 01:55:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

[XL] Change in coreboot[main]: soc/mediatek/common/dp: Move common functions to dptx_common.c
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85860?usp=email ) Change subject: soc/mediatek/common/dp: Move common functions to dptx_common.c ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/common/dp/dptx_common.c: https://review.coreboot.org/c/coreboot/+/85860/comment/d70e8801_d91fe81b?us… : PS4, Line 281: union misc_t dptx_misc; > Do you suggest fixing it in a separate patch or in the same patch ? Separate patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/85860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic5074feee9efa62f27c118eaf7adb25875ba4c16 Gerrit-Change-Number: 85860 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 01:32:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

[S] Change in coreboot[main]: util/chromeos/crosfirmware: Add special handling for REEF board
by Felix Singer (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Matt DeVillier. Felix Singer has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/85873?usp=email ) Change subject: util/chromeos/crosfirmware: Add special handling for REEF board ...................................................................... Patch Set 1: Code-Review+2 (2 comments) File util/chromeos/crosfirmware.sh: https://review.coreboot.org/c/coreboot/+/85873/comment/c0aa50af_e4714795?us… : PS1, Line 109: | I would have assumed that a line continuation (`\`) is needed at the end, but other lines don't have one as well. https://review.coreboot.org/c/coreboot/+/85873/comment/dc74ab22_2cc581fb?us… : PS1, Line 110: \ While on it, maybe put it in between single quotation marks? -- To view, visit https://review.coreboot.org/c/coreboot/+/85873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib391f30a77b6aa75aa130ffb525e6e1d1239a588 Gerrit-Change-Number: 85873 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 01:32:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

[XL] Change in coreboot[main]: soc/mediatek/common/dp: Move common functions to dptx_hal_common.c
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85861?usp=email ) Change subject: soc/mediatek/common/dp: Move common functions to dptx_hal_common.c ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/common/dp/dptx_hal_common.c: https://review.coreboot.org/c/coreboot/+/85861/comment/5d7977e5_be50d977?us… : PS3, Line 115: DP_CLRSETBITS(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1, val, 0x7); > This would be wrong for mt8196, where its code is `mtk_dp_mask(mtk_dp, REG_303C_DP_ENCODER0_P0, val […] I define `DP_CLRSETBITS` on mt8196 like this. ``` #define DP_CLRSETBITS(mtk_dp, reg, var, mask) \ mtk_dp_mask(mtk_dp, (reg) - (reg) % 2, \ (var) << (8 * ((reg) % 2)), (mask) << (8 * ((reg) % 2))) ``` `mtk_dp_mask(mtk_dp, REG_303C_DP_ENCODER0_P0, val << 8, 0x7 << 8)` is converted to `DP_CLRSETBITS(mtk_dp, REG_303C_DP_ENCODER0_P0 + 1, val, 0x7)`. -- To view, visit https://review.coreboot.org/c/coreboot/+/85861?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9e151bc766c312eaf81b4220782775ef1c9d2297 Gerrit-Change-Number: 85861 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 01:31:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

[XL] Change in coreboot[main]: soc/mediatek/common/dp: Move common functions to dptx_common.c
by Yidi Lin (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/85860?usp=email ) Change subject: soc/mediatek/common/dp: Move common functions to dptx_common.c ...................................................................... Patch Set 4: (1 comment) File src/soc/mediatek/common/dp/dptx_common.c: https://review.coreboot.org/c/coreboot/+/85860/comment/68f0eb51_853172c0?us… : PS4, Line 281: union misc_t dptx_misc; > Not related to this patch, but some fields are not initialized. We should write `dptx_misc = { . […] Do you suggest fixing it in a separate patch or in the same patch ? -- To view, visit https://review.coreboot.org/c/coreboot/+/85860?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic5074feee9efa62f27c118eaf7adb25875ba4c16 Gerrit-Change-Number: 85860 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 01:22:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

[L] Change in coreboot[main]: soc/mediatek/mt8196: Add srclken_rc drivers
by Yu-Ping Wu (Code Review) 07 Jan '25

07 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85842?usp=email ) Change subject: soc/mediatek/mt8196: Add srclken_rc drivers ...................................................................... Patch Set 2: (17 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85842/comment/72696bda_a32e63b4?us… : PS1, Line 9: Mt8196 > MT8196 Done https://review.coreboot.org/c/coreboot/+/85842/comment/e3dbfd83_3ea81fe1?us… : PS1, Line 8: : Mt8196 use new RC mode with clk_buf driver, and need srclken_rc to send : cmd. > Can you elaborate more ? What is RC mode ? What is this driver for ? Done Commit Message: https://review.coreboot.org/c/coreboot/+/85842/comment/3a69a782_245958e4?us… : PS2, Line 9: need needs https://review.coreboot.org/c/coreboot/+/85842/comment/e805b473_e0829b53?us… : PS2, Line 9: use uses https://review.coreboot.org/c/coreboot/+/85842/comment/7d85315e_465177dd?us… : PS2, Line 10: , remove https://review.coreboot.org/c/coreboot/+/85842/comment/37af66a6_86b00513?us… : PS2, Line 11: , and so on remove File src/soc/mediatek/mt8196/include/soc/srclken_rc.h: https://review.coreboot.org/c/coreboot/+/85842/comment/2357ed62_9d4f469e?us… : PS1, Line 192: > remove one tab Done https://review.coreboot.org/c/coreboot/+/85842/comment/0d3e8481_88b18fce?us… : PS1, Line 202: > Remove 2 tabs Done File src/soc/mediatek/mt8196/srclken_rc.c: https://review.coreboot.org/c/coreboot/+/85842/comment/a490502b_db541195?us… : PS1, Line 69: #define SW_BBLPM_HIGH 1 : #define SW_BBLPM_LOW 0 : #define SW_FPM_HIGH 1 : #define SW_FPM_LOW 0 > use enum ? Done https://review.coreboot.org/c/coreboot/+/85842/comment/fe997c5e_e0ffc1a9?us… : PS1, Line 149: | > move `|` to above line Done https://review.coreboot.org/c/coreboot/+/85842/comment/86b32352_486e34a0?us… : PS1, Line 278: DCXO_SETTLE_BLK_EN > align with first param Done https://review.coreboot.org/c/coreboot/+/85842/comment/c13dcb73_76ff75d3?us… : PS1, Line 318: id, read32(&rc_regs->rc_mxx_srclken_cfg[id])); > move to above line Done https://review.coreboot.org/c/coreboot/+/85842/comment/fb6aa213_e78d0bd1?us… : PS1, Line 320: > remove one blank line Done https://review.coreboot.org/c/coreboot/+/85842/comment/117e53dd_9ce99ae9?us… : PS1, Line 359: retry(ACK_DELAY_TIMES, (read32(&rc_status_regs->rc_mxx_req_sta_0[chn]) & 0xa) == state, udelay(ACK_DELAY_US)) > ``` […] Done https://review.coreboot.org/c/coreboot/+/85842/comment/87f493f6_9f6bbeb1?us… : PS1, Line 360: 0x%x > %#x Done https://review.coreboot.org/c/coreboot/+/85842/comment/76acfe36_d6ad0191?us… : PS1, Line 362: chn, > move to the above line Done https://review.coreboot.org/c/coreboot/+/85842/comment/9b14fb0b_80986355?us… : PS1, Line 385: dsb > I have the same question. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85842?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40f8d2b12027955e6bd57b666e9f04c0116a0a93 Gerrit-Change-Number: 85842 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Tue, 07 Jan 2025 00:09:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

← Newer
1
...
21
22
23
24
25
26
27
...
65
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2025