coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: spd_bin.h: Deduplicate SPD definitions
by Elyes Haouas (Code Review) 10 Jan '25

10 Jan '25

Attention is currently required from: Boris Mittelberg, Caveh Jalali, Eric Lai, Felix Singer, Subrata Banik. Hello Boris Mittelberg, Caveh Jalali, Eric Lai, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82314?usp=email to look at the new patch set (#15). The following approvals got outdated and were removed: Code-Review+1 by Eric Lai, Verified+1 by build bot (Jenkins) Change subject: spd_bin.h: Deduplicate SPD definitions ...................................................................... spd_bin.h: Deduplicate SPD definitions Use already defined macros in `spd.h`, ddr3.h`and `ddr4.h`. Change-Id: I727aa38236ad97f9c529389fdb7d7d11c1db08d0 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/include/spd_bin.h M src/lib/spd_bin.c M src/lib/spd_cache.c M src/mainboard/google/cyan/spd/spd.c M src/soc/intel/common/block/smbus/smbuslib.c 5 files changed, 67 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/82314/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/82314?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I727aa38236ad97f9c529389fdb7d7d11c1db08d0 Gerrit-Change-Number: 82314 Gerrit-PatchSet: 15 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com>

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[XS] Change in coreboot[main]: soc/amd/common/block: Remove space after a cast
by Elyes Haouas (Code Review) 10 Jan '25

10 Jan '25

Attention is currently required from: Felix Held, Felix Singer, Fred Reitberger, Jason Glenesk, Matt DeVillier. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77736?usp=email ) Change subject: soc/amd/common/block: Remove space after a cast ...................................................................... Patch Set 3: (1 comment) File src/soc/amd/common/block/xhci/elog.c: https://review.coreboot.org/c/coreboot/+/77736/comment/429ac322_cdd52f28?us… : PS2, Line 106: (const struct resource *)&res_store[i_slot].resources[0] > Same as in CB:77732. Maybe: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/77736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icccfbc535e005648e45156fc6810210d0ec86a98 Gerrit-Change-Number: 77736 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 10 Jan 2025 09:20:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

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[XS] Change in coreboot[main]: lint/checkpatch: Do not require an empty line before error injection
by Elyes Haouas (Code Review) 10 Jan '25

10 Jan '25

Attention is currently required from: Felix Singer, Martin L Roth. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/81950?usp=email ) Change subject: lint/checkpatch: Do not require an empty line before error injection ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81950/comment/439b98ea_67a718c0?us… : PS2, Line 9: This updates the script to upsteam version 6.8 > > `'upsteam' may be misspelled - perhaps 'upstream'?` […] Done https://review.coreboot.org/c/coreboot/+/81950/comment/5b5748a8_79f0e541?us… : PS2, Line 10: 2f9dadba5ba02e1510a04ce57ebfb9e08fd872a8 > Seems like it's the wrong commit id Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81950?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40708185df4036f7aaa1dcb419663c9e54aad44a Gerrit-Change-Number: 81950 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Fri, 10 Jan 2025 09:11:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

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[XS] Change in coreboot[main]: lint/checkpatch: Do not require an empty line before error injection
by Elyes Haouas (Code Review) 10 Jan '25

10 Jan '25

Attention is currently required from: Elyes Haouas, Martin L Roth. Hello Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81950?usp=email to look at the new patch set (#3). Change subject: lint/checkpatch: Do not require an empty line before error injection ...................................................................... lint/checkpatch: Do not require an empty line before error injection This updates the script to upstream version 6.8 https://github.com/torvalds/linux/commit/71aa3419e98f6e23bddc3aca9ec4ac3688… Change-Id: I40708185df4036f7aaa1dcb419663c9e54aad44a Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/lint/checkpatch.pl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/81950/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81950?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40708185df4036f7aaa1dcb419663c9e54aad44a Gerrit-Change-Number: 81950 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[XS] Change in coreboot[main]: Documentation/drivers/smmstore: Fix dead link
by Felix Singer (Code Review) 10 Jan '25

10 Jan '25

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85916?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: Documentation/drivers/smmstore: Fix dead link ...................................................................... Documentation/drivers/smmstore: Fix dead link The link to the document 'A Tour Beyond BIOS - Implementing UEFI Authenticated Variables in SMM with EDK II' is currently pointing to a dead location at Intel's website. Fix it by changing it to point at tianocore's github site and hope that this one will be more reliable over time. Change-Id: Ic6ba341cbd37edec142f8868ffe9ef677736b3dd Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85916 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M Documentation/drivers/smmstore.md M Documentation/drivers/smmstorev2.md 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/Documentation/drivers/smmstore.md b/Documentation/drivers/smmstore.md index c9f0060..717beee 100644 --- a/Documentation/drivers/smmstore.md +++ b/Documentation/drivers/smmstore.md @@ -128,7 +128,7 @@ ## External links -* [A Tour Beyond BIOS Implementing UEFI Authenticated Variables in SMM with EDKI](https://software.intel.com/sites/default/files/managed/cf/ea/a_tour_b… +* [A Tour Beyond BIOS Implementing UEFI Authenticated Variables in SMM with EDK II](https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_B… Note, this differs significantly from coreboot's implementation. diff --git a/Documentation/drivers/smmstorev2.md b/Documentation/drivers/smmstorev2.md index 6956cd4..af6e0ce 100644 --- a/Documentation/drivers/smmstorev2.md +++ b/Documentation/drivers/smmstorev2.md @@ -199,7 +199,7 @@ ## External links -* [A Tour Beyond BIOS Implementing UEFI Authenticated Variables in SMM with EDKI](https://software.intel.com/sites/default/files/managed/cf/ea/a_tour_b… +* [A Tour Beyond BIOS Implementing UEFI Authenticated Variables in SMM with EDK II](https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_B… Note that this differs significantly from coreboot's implementation. -- To view, visit https://review.coreboot.org/c/coreboot/+/85916?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic6ba341cbd37edec142f8868ffe9ef677736b3dd Gerrit-Change-Number: 85916 Gerrit-PatchSet: 3 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add srclken_rc drivers
by Yu-Ping Wu (Code Review) 10 Jan '25

10 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, ot_song fan. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85842?usp=email ) Change subject: soc/mediatek/mt8196: Add srclken_rc drivers ...................................................................... Patch Set 6: (1 comment) File src/soc/mediatek/mt8196/srclken_rc.c: https://review.coreboot.org/c/coreboot/+/85842/comment/a364d3f8_637d0268?us… : PS1, Line 265: code flow ASSERT already > Thanks for your reply. […] Then I don't think we need to keep the comment. Can we remove it? -- To view, visit https://review.coreboot.org/c/coreboot/+/85842?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40f8d2b12027955e6bd57b666e9f04c0116a0a93 Gerrit-Change-Number: 85842 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Fri, 10 Jan 2025 08:29:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add srclken_rc drivers
by ot_song fan (Code Review) 09 Jan '25

09 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. ot_song fan has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85842?usp=email ) Change subject: soc/mediatek/mt8196: Add srclken_rc drivers ...................................................................... Patch Set 6: (2 comments) File src/soc/mediatek/mt8196/include/soc/srclken_rc.h: https://review.coreboot.org/c/coreboot/+/85842/comment/d1c81e68_9ffbafc8?us… : PS5, Line 190: #define REQ_TO_SPMI_P_MASK_SHFT 0 > Remove Done File src/soc/mediatek/mt8196/srclken_rc.c: https://review.coreboot.org/c/coreboot/+/85842/comment/93c706f4_e70a9e52?us… : PS1, Line 265: code flow ASSERT already > Okay, so you're saying the rc_mxx_req_sta_0 value will be determined by rc_mxx_srclken_cfg writes. […] Thanks for your reply. We don't need to dump the rc_mxx_req_sta_0 values here, because we're confident that the values will be correct -- To view, visit https://review.coreboot.org/c/coreboot/+/85842?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I40f8d2b12027955e6bd57b666e9f04c0116a0a93 Gerrit-Change-Number: 85842 Gerrit-PatchSet: 6 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Fri, 10 Jan 2025 07:52:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: ot_song fan <ot_song.fan(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: mb/google/nissa/var/rull: eMMC DLL tuning
by Rui Zhou (Code Review) 09 Jan '25

09 Jan '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85933?usp=email to look at the new patch set (#2). Change subject: mb/google/nissa/var/rull: eMMC DLL tuning ...................................................................... mb/google/nissa/var/rull: eMMC DLL tuning According to the Intel emmc tuning results, we modify the relevant register values recommended in b:386317255/comment16 to ensure good emmc performance. BUG=b:386317255 TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ibdbb96f9623612a8eb5e01818859c4844ca4de13 Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/rull/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/85933/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85933?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibdbb96f9623612a8eb5e01818859c4844ca4de13 Gerrit-Change-Number: 85933 Gerrit-PatchSet: 2 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[XS] Change in coreboot[main]: mb/google/nissa/var/rull: eMMC DLL tuning
by Rui Zhou (Code Review) 09 Jan '25

09 Jan '25

Rui Zhou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85933?usp=email ) Change subject: mb/google/nissa/var/rull: eMMC DLL tuning ...................................................................... mb/google/nissa/var/rull: eMMC DLL tuning According to the Intel emmc tuning results, we modify the relevant register values recommended in b:386317255/comment16 to ensure good emmc performance. BUG=b:386317255 TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ibdbb96f9623612a8eb5e01818859c4844ca4de13 Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/rull/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/85933/1 diff --git a/src/mainboard/google/brya/variants/rull/overridetree.cb b/src/mainboard/google/brya/variants/rull/overridetree.cb index 6e7c2c2..e1d94f9 100644 --- a/src/mainboard/google/brya/variants/rull/overridetree.cb +++ b/src/mainboard/google/brya/variants/rull/overridetree.cb @@ -58,7 +58,7 @@ # 11: Reserved # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. - register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1004C" + register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x10023" # EMMC Rx Strobe Delay # Refer to EDS-Vol2-42.3.11. -- To view, visit https://review.coreboot.org/c/coreboot/+/85933?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibdbb96f9623612a8eb5e01818859c4844ca4de13 Gerrit-Change-Number: 85933 Gerrit-PatchSet: 1 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/trulo/var/uldrenite: Change ROM size to 32MB
by Dtrain Hsu (Code Review) 09 Jan '25

09 Jan '25

Dtrain Hsu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85932?usp=email ) Change subject: mb/trulo/var/uldrenite: Change ROM size to 32MB ...................................................................... mb/trulo/var/uldrenite: Change ROM size to 32MB Modify Uldrenite ROM size from 16MB to 32MB. BUG=b:388426787 TEST=emerge-nissa coreboot and check rom size is 32MB Change-Id: I39f50415e093eb82342462f03cf50e89bce8cd93 Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/85932/1 diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 84c15a9..e4f563e 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -622,6 +622,7 @@ config BOARD_GOOGLE_ULDRENITE select BOARD_GOOGLE_BASEBOARD_TRULO + select BOARD_ROMSIZE_KB_32768 select SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION select HAVE_PCIE_WWAN select HAVE_WWAN_POWER_SEQUENCE -- To view, visit https://review.coreboot.org/c/coreboot/+/85932?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I39f50415e093eb82342462f03cf50e89bce8cd93 Gerrit-Change-Number: 85932 Gerrit-PatchSet: 1 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com>

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coreboot-gerrit January 2025