coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin
by Subrata Banik (Code Review) 30 Jan '25

30 Jan '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86005?usp=email ) Change subject: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin ...................................................................... mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin On PTL RVP, ISH shares UART with FPS, we can enable either ISH UART or FPS UART, or disable both UART by changing the DIP switch settings. When DIP switch is not set for ISH, ISH RX signal is disconnected, causing ISH low power mode failure. Therefore, NC ISH RX pin mux to minimize the impact on ISH PM. As a result, ISH console won't accept input since this pin is not connected. TEST=PTL RVP H1 DB, DIP SW1317 3-6, 4-5 ON to enable FPS UART, ISH main firmware boots up and runs successfully. SW1317 all switches OFF to disable both FPS and ISH UART, ISH main firmware boots up and runs successfully. Change-Id: Ic84f8ead6a1fd056e649edbb1471bcb913a0a09a Signed-off-by: Li Feng <li1.feng(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86005 Reviewed-by: Jayvik Desai <jayvik(a)google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-by: Pranava Y N <pranavayn(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/gpio.c 2 files changed, 2 insertions(+), 4 deletions(-) Approvals: Kapil Porwal: Looks good to me, approved Jayvik Desai: Looks good to me, approved build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Pranava Y N: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c index 3e6a192..ad14c66 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c +++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c @@ -418,8 +418,6 @@ }; static const struct pad_config ish_disable_pads[] = { - /* GPP_D05: NC */ - PAD_NC(GPP_D05, NONE), /* GPP_D06: NC */ PAD_NC(GPP_D06, NONE), /* GPP_E05: NC */ @@ -429,8 +427,6 @@ }; static const struct pad_config ish_enable_pads[] = { - /* GPP_D05: ISH_UART0_RXD */ - PAD_CFG_NF(GPP_D05, NONE, DEEP, NF2), /* GPP_D06: ISH_UART0_TXD */ PAD_CFG_NF(GPP_D06, NONE, DEEP, NF2), /* GPP_E05: ISH_GP_7_SNSR_HDR */ diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c index cf1e040..75c674c 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c +++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c @@ -149,6 +149,8 @@ PAD_CFG_GPO(GPP_D03, 1, PLTRST), /* GPP_D04: IMGCLKOUT_0 */ PAD_CFG_NF(GPP_D04, NONE, DEEP, NF1), + /* GPP_D05: disable ISH_UART0_RXD */ + PAD_NC(GPP_D05, NONE), /* GPP_D07: NC */ PAD_NC(GPP_D07, NONE), /* GPP_D08: NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86005?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic84f8ead6a1fd056e649edbb1471bcb913a0a09a Gerrit-Change-Number: 86005 Gerrit-PatchSet: 6 Gerrit-Owner: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Bill XIE (Code Review) 30 Jan '25

30 Jan '25

Attention is currently required from: Angel Pons, Keith Hui, Nicholas Chin. Bill XIE has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 5: (1 comment) File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c: https://review.coreboot.org/c/coreboot/+/85413/comment/2983057c_6eb406f8?us… : PS2, Line 77: {7, 34, 20, -1} > Wow, all these went under my nose unnoticed! And to think that I should have a bit of an idea what P […] Sadly this can still not get the card on PCIEX1_2 work. The corresponding autoport dump is on https://send.aslaets.be/download/ea2b109004b9166f/#yfOQWYApacFStaRZcqqMgA , downloadable 10 times in 10 days. -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Thu, 30 Jan 2025 05:07:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin
by Pranava Y N (Code Review) 30 Jan '25

30 Jan '25

Attention is currently required from: Bora Guvendik, Jérémy Compostella, Li1 Feng, Paul Menzel. Pranava Y N has posted comments on this change by Li1 Feng. ( https://review.coreboot.org/c/coreboot/+/86005?usp=email ) Change subject: mb/google/fatcat/var/fatcat: disable ISH UART0 RX pin ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86005?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic84f8ead6a1fd056e649edbb1471bcb913a0a09a Gerrit-Change-Number: 86005 Gerrit-PatchSet: 5 Gerrit-Owner: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 30 Jan 2025 04:59:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/alderlake/romstage: Update UFS disable sequence
by Karthik Ramasubramanian (Code Review) 30 Jan '25

30 Jan '25

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86170?usp=email ) Change subject: soc/intel/alderlake/romstage: Update UFS disable sequence ...................................................................... soc/intel/alderlake/romstage: Update UFS disable sequence Currently after UFS is disabled, if the device is coming out of S5 sleep state then a warm reset is triggered such that PMC samples the UFS function disable bit and disables the UFS controller accordingly. Sometimes during the boot flow, an additional kind of reset gets triggered - Power cycle Reset through CMoff. Hence initiate a warm reset when the host comes out of S5 sleep state or Power cycle Reset through CMoff. BUG=b:391449110 TEST=Build Brox BIOS image and boot to OS. Ensure that when the device switches from normal mode to developer mode an extra warm reset is triggered such that the UFS controller is disabled. Change-Id: I85cad1a1eb00a2a7f520a57cda789ad6737fcb97 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86170 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/soc/intel/alderlake/romstage/romstage.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: Subrata Banik: Looks good to me, approved Dinesh Gehlot: Looks good to me, but someone else must approve Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index daf2b76..b1ac1ca 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -197,7 +197,8 @@ /* Program to Disable UFS Controllers */ if (!is_devfn_enabled(PCH_DEVFN_UFS) && (CONFIG(USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS))) { - if (ps->prev_sleep_state == ACPI_S5 && !mainboard_expects_another_reset()) { + if ((ps->prev_sleep_state == ACPI_S5 || cse_check_host_cold_reset()) && + !mainboard_expects_another_reset()) { printk(BIOS_INFO, "Disabling UFS controllers\n"); disable_ufs(); printk(BIOS_INFO, "Warm Reset after disabling UFS controllers\n"); -- To view, visit https://review.coreboot.org/c/coreboot/+/86170?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I85cad1a1eb00a2a7f520a57cda789ad6737fcb97 Gerrit-Change-Number: 86170 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: soc/intel/common/block/cse: Add API to match current PM event
by Karthik Ramasubramanian (Code Review) 30 Jan '25

30 Jan '25

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86169?usp=email ) Change subject: soc/intel/common/block/cse: Add API to match current PM event ...................................................................... soc/intel/common/block/cse: Add API to match current PM event Introduce an API to read the Converged Security and Management Engine (CSME) host firmware status register to obtain the current Power Management event and compare it with a specified input event. BUG=b:391449110 TEST=Build Brox BIOS image and boot to OS. Change-Id: Ie9a49382ee2c1a8f59da6233e510cf2e38ac32ad Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86169 Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> --- M src/soc/intel/common/block/cse/cse.c M src/soc/intel/common/block/include/intelblocks/cse.h 2 files changed, 33 insertions(+), 0 deletions(-) Approvals: Dinesh Gehlot: Looks good to me, approved build bot (Jenkins): Verified Kapil Porwal: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 6389044..53c5fe1 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -298,6 +298,28 @@ return !hfs1.fields.mfg_mode; } +#define ME_HFSTS2_CUR_PM_EVENT_SHIFT 24 +#define ME_HFSTS2_CUR_PM_EVENT_MASK (0xf << ME_HFSTS2_CUR_PM_EVENT_SHIFT) + +static uint8_t cse_get_hfs2_current_pm_event(void) +{ + uint32_t data = me_read_config32(PCI_ME_HFSTS2); + return (uint8_t)((data & ME_HFSTS2_CUR_PM_EVENT_MASK) >> + ME_HFSTS2_CUR_PM_EVENT_SHIFT); +} + +bool cse_check_host_cold_reset(void) +{ + uint8_t event = cse_get_hfs2_current_pm_event(); + + switch (event) { + case PWR_CYCLE_RESET_CMOFF: + return true; + default: + return false; + } +} + bool cse_is_hfs3_fw_sku_lite(void) { union me_hfsts3 hfs3; diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index c97e4ec..99dd7d5 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -383,6 +383,10 @@ CSE_RESET_ONLY = 3, }; +enum cse_fw_sts_current_pm_event { + PWR_CYCLE_RESET_CMOFF = 0xb, +}; + /* * Sends GLOBAL_RESET_REQ cmd to CSE with reset type GLOBAL_RESET. * Returns 0 on failure and 1 on success. @@ -618,4 +622,11 @@ */ bool is_cse_boot_to_rw(void); +/* + * Check if the CSE FW Status Current Power Management Event indicates that the + * host came out of cold reset. + * Returns true if the host came out of a cold reset, false otherwise. + */ +bool cse_check_host_cold_reset(void); + #endif // SOC_INTEL_COMMON_CSE_H -- To view, visit https://review.coreboot.org/c/coreboot/+/86169?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9a49382ee2c1a8f59da6233e510cf2e38ac32ad Gerrit-Change-Number: 86169 Gerrit-PatchSet: 5 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: toolchain: Print CC command and output when CC invocation fails
by Jon Murphy (Code Review) 30 Jan '25

30 Jan '25

Attention is currently required from: Raul Rangel. Jon Murphy has posted comments on this change by Raul Rangel. ( https://review.coreboot.org/c/coreboot/+/86220?usp=email ) Change subject: toolchain: Print CC command and output when CC invocation fails ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86220?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c7352c7254c21deb3e4a03106b841ec9f111ba4 Gerrit-Change-Number: 86220 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Wed, 29 Jan 2025 23:25:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: [WIP] mb/*/*/*.fmd: Start flash at 0
by Maximilian Brune (Code Review) 30 Jan '25

30 Jan '25

Attention is currently required from: Alexander Couzens, Angel Pons, Arthur Heymans, Christian Walter, Felix Held, Fred Reitberger, Hung-Te Lin, Jason Glenesk, Jason Nien, Marshall Dawson, Martin L Roth, Martin Roth, Matt DeVillier, Maximilian Brune, Michał Żygowski, Nick Vaccaro, Nico Huber, Patrick Rudolph, Philipp Hug, Piotr Król, Raul Rangel, Subrata Banik, Tim Wawrzynczak, Yidi Lin, ron minnich, yuchi.chen(a)intel.com. Maximilian Brune has uploaded a new patch set (#14) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63771?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: [WIP] mb/*/*/*.fmd: Start flash at 0 ...................................................................... [WIP] mb/*/*/*.fmd: Start flash at 0 FMAP should not contain information about the memory map. Done with the following command: "find -name \*.fmd -exec sed -i 's/$FLASH$.* $.*$ /\1 \2 /' {} \;" Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> --- M Makefile.mk M src/mainboard/amd/bilby/board.fmd M src/mainboard/amd/birman/board_glinda.fmd M src/mainboard/amd/birman/board_phoenix.fmd M src/mainboard/amd/birman/chromeos_glinda.fmd M src/mainboard/amd/birman/chromeos_phoenix.fmd M src/mainboard/amd/birman_plus/board_glinda.fmd M src/mainboard/amd/birman_plus/board_phoenix.fmd M src/mainboard/amd/birman_plus/chromeos_glinda.fmd M src/mainboard/amd/birman_plus/chromeos_phoenix.fmd M src/mainboard/amd/chausie/board.fmd M src/mainboard/amd/chausie/chromeos.fmd M src/mainboard/amd/crater/board_renoir.fmd M src/mainboard/amd/crater/chromeos_renoir.fmd M src/mainboard/amd/majolica/board.fmd M src/mainboard/amd/majolica/chromeos.fmd M src/mainboard/amd/mandolin/variants/cereme/board.fmd M src/mainboard/amd/mandolin/variants/mandolin/board.fmd M src/mainboard/amd/mayan/board.fmd M src/mainboard/amd/mayan/chromeos.fmd M src/mainboard/arm/rdn2/flash.fmd M src/mainboard/bytedance/bd_egs/board.fmd M src/mainboard/cavium/cn8100_sff_evb/board.fmd M src/mainboard/emulation/qemu-i440fx/vboot-rwa-8M.fmd M src/mainboard/emulation/qemu-q35/vboot-rwa-8M.fmd M src/mainboard/emulation/qemu-q35/vboot-rwab-8M.fmd M src/mainboard/emulation/qemu-sbsa/flash.fmd M src/mainboard/facebook/fbg1701/vboot-rw.fmd M src/mainboard/framework/azalea/coreboot.fmd M src/mainboard/google/asurada/chromeos.fmd M src/mainboard/google/auron/chromeos.fmd M src/mainboard/google/beltino/chromeos.fmd M src/mainboard/google/butterfly/chromeos.fmd M src/mainboard/google/cherry/chromeos.fmd M src/mainboard/google/corsola/chromeos.fmd M src/mainboard/google/cyan/chromeos.fmd M src/mainboard/google/daisy/chromeos.fmd M src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd M src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd M src/mainboard/google/drallion/chromeos.fmd M src/mainboard/google/drallion/default.fmd M src/mainboard/google/eve/chromeos.fmd M src/mainboard/google/fizz/chromeos.fmd M src/mainboard/google/foster/chromeos.fmd M src/mainboard/google/gale/chromeos.fmd M src/mainboard/google/geralt/chromeos.fmd M src/mainboard/google/glados/chromeos.fmd M src/mainboard/google/gru/chromeos.fmd M src/mainboard/google/guybrush/chromeos.fmd M src/mainboard/google/hatch/chromeos-16MiB.fmd M src/mainboard/google/hatch/chromeos-32MiB.fmd M src/mainboard/google/herobrine/chromeos.fmd M src/mainboard/google/jecht/chromeos.fmd M src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd M src/mainboard/google/kukui/chromeos.fmd M src/mainboard/google/link/chromeos.fmd M src/mainboard/google/mistral/chromeos.fmd M src/mainboard/google/myst/chromeos.fmd M src/mainboard/google/nyan/chromeos.fmd M src/mainboard/google/nyan_big/chromeos.fmd M src/mainboard/google/nyan_blaze/chromeos.fmd M src/mainboard/google/oak/chromeos.fmd M src/mainboard/google/parrot/chromeos.fmd M src/mainboard/google/peach_pit/chromeos.fmd M src/mainboard/google/poppy/chromeos.fmd M src/mainboard/google/puff/chromeos-16MiB.fmd M src/mainboard/google/puff/chromeos-32MiB.fmd M src/mainboard/google/rambi/chromeos.fmd M src/mainboard/google/rauru/chromeos.fmd M src/mainboard/google/sarien/chromeos.fmd M src/mainboard/google/sarien/default.fmd M src/mainboard/google/skyrim/chromeos.fmd M src/mainboard/google/skywalker/chromeos.fmd M src/mainboard/google/slippy/chromeos.fmd M src/mainboard/google/smaug/chromeos.fmd M src/mainboard/google/storm/chromeos.fmd M src/mainboard/google/stout/chromeos.fmd M src/mainboard/google/trogdor/chromeos.fmd M src/mainboard/google/veyron/chromeos.fmd M src/mainboard/google/veyron_mickey/chromeos.fmd M src/mainboard/google/veyron_rialto/chromeos.fmd M src/mainboard/google/zork/chromeos.fmd M src/mainboard/ibm/sbp1/board.fmd M src/mainboard/intel/avenuecity_crb/board.fmd M src/mainboard/intel/baskingridge/chromeos.fmd M src/mainboard/intel/beechnutcity_crb/board.fmd M src/mainboard/intel/cedarisland_crb/board.fmd M src/mainboard/intel/coffeelake_rvp/chromeos.fmd M src/mainboard/intel/coffeelake_rvp/chromeos_32MB.fmd M src/mainboard/intel/frost_creek/board.fmd M src/mainboard/intel/jasperlake_rvp/chromeos.fmd M src/mainboard/intel/kblrvp/chromeos.fmd M src/mainboard/intel/kunimitsu/chromeos.fmd M src/mainboard/intel/shadowmountain/chromeos.fmd M src/mainboard/intel/strago/chromeos.fmd M src/mainboard/intel/tglrvp/chromeos.fmd M src/mainboard/intel/wtm2/chromeos.fmd M src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd M src/mainboard/lenovo/haswell/vboot-ro.fmd M src/mainboard/lenovo/haswell/vboot-rwab.fmd M src/mainboard/lenovo/t400/vboot-rwa.fmd M src/mainboard/lenovo/t410/vboot-rwa.fmd M src/mainboard/lenovo/t420/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420/vboot-ro.fmd M src/mainboard/lenovo/t420/vboot-rwa.fmd M src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420s/vboot-ro.fmd M src/mainboard/lenovo/t420s/vboot-rwa.fmd M src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430/vboot-ro.fmd M src/mainboard/lenovo/t430/vboot-rwab.fmd M src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430s/vboot-ro.fmd M src/mainboard/lenovo/t430s/vboot-rwab.fmd M src/mainboard/lenovo/t520/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t520/vboot-ro.fmd M src/mainboard/lenovo/t520/vboot-rwa.fmd M src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t530/vboot-ro.fmd M src/mainboard/lenovo/t530/vboot-rwab.fmd M src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x131e/vboot-ro.fmd M src/mainboard/lenovo/x131e/vboot-rwab.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-rwab.fmd M src/mainboard/lenovo/x200/vboot-rwa.fmd M src/mainboard/lenovo/x201/vboot-rwa.fmd M src/mainboard/lenovo/x220/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x220/vboot-ro.fmd M src/mainboard/lenovo/x220/vboot-rwa.fmd M src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x230/vboot-ro.fmd M src/mainboard/lenovo/x230/vboot-rwab.fmd M src/mainboard/lenovo/x60/vboot-rwa.fmd M src/mainboard/opencellular/elgon/board.fmd M src/mainboard/opencellular/elgon/vboot.fmd M src/mainboard/protectli/vault_adl_p/vboot-rwa.fmd M src/mainboard/protectli/vault_cml/board.fmd M src/mainboard/protectli/vault_cml/vboot-rwa.fmd M src/mainboard/samsung/lumpy/chromeos.fmd M src/mainboard/samsung/stumpy/chromeos.fmd M src/mainboard/siemens/fa_ehl/fa_ehl.fmd M src/mainboard/siemens/mc_ehl/mc_ehl.fmd M src/mainboard/ti/beaglebone/board.fmd M src/soc/amd/glinda/Makefile.mk M src/soc/amd/mendocino/Makefile.mk M src/soc/amd/phoenix/Makefile.mk M src/soc/amd/picasso/Makefile.mk M util/cbfstool/default-x86.fmd M util/cbfstool/default.fmd 151 files changed, 172 insertions(+), 159 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/63771/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/63771?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Gerrit-Change-Number: 63771 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert 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1 0

[XS] Change in coreboot[main]: toolchain: Print CC command and output when CC invocation fails
by Raul Rangel (Code Review) 30 Jan '25

30 Jan '25

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86220?usp=email ) Change subject: toolchain: Print CC command and output when CC invocation fails ...................................................................... toolchain: Print CC command and output when CC invocation fails We are gobbling up the `$(CC_$(arch))` stderr when testing the toolchain. This change makes it so we print the command we tried to invoke and the output from the command. ``` toolchain.mk:183: The coreboot toolchain for 'x86_32' architecture was not found. toolchain.mk:183: /build/guybrush/tmp/portage/sys-boot/coreboot-9999/files/reclient/ccache /build/guybrush/tmp/portage/sys-boot/coreboot-9999/work/coreboot-sdk/bin/i386-elf-gcc -v I AM STDERR toolchain.mk:183: I AM STDOUT toolchain.mk:219: toolchain.mk:220: Path to your toolchain is currently set to '/build/guybrush/tmp/portage/sys-boot/coreboot-9999/work/coreboot-sdk/bin' toolchain.mk:222: toolchain.mk:223: To build the entire coreboot toolchain: run 'make crossgcc' ``` BUG=b:392874252, b:389737339 TEST=USE_REMOTEEXEC=true BOARD=brya bazel run @portage//internal/packages/stage2/target/board/chromiumos/sys-boot/coreboot:9999_debug Change-Id: I7c7352c7254c21deb3e4a03106b841ec9f111ba4 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- M toolchain.mk 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/86220/1 diff --git a/toolchain.mk b/toolchain.mk index 77fb46e..8d6d449 100644 --- a/toolchain.mk +++ b/toolchain.mk @@ -187,7 +187,10 @@ echo not-coreboot; else echo not-coreboot; fi), \ $(eval COMPILERFAIL:=1)\ $(warning The coreboot toolchain for '$(arch)'\ - architecture was not found.))) + architecture was not found.)\ + $(if $(CC_$(arch)),\ + $(warning $(CC_$(arch)) -v)\ + $(warning $(shell $(CC_$(arch)) -v))))) # If iasl doesn't match the current coreboot version, fail the test # TODO: Figure out if iasl is even needed for the build. $(if $(shell if [ -n "$(IASL)" ]; then \ -- To view, visit https://review.coreboot.org/c/coreboot/+/86220?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c7352c7254c21deb3e4a03106b841ec9f111ba4 Gerrit-Change-Number: 86220 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

1 0

[XL] Change in coreboot[main]: [WIP] mb/*/*/*.fmd: Start flash at 0
by Maximilian Brune (Code Review) 30 Jan '25

30 Jan '25

Attention is currently required from: Alexander Couzens, Angel Pons, Christian Walter, Felix Held, Fred Reitberger, Hung-Te Lin, Jason Glenesk, Jason Nien, Marshall Dawson, Martin L Roth, Martin Roth, Matt DeVillier, Maximilian Brune, Nick Vaccaro, Nico Huber, Patrick Rudolph, Raul Rangel, Subrata Banik, Tim Wawrzynczak. Maximilian Brune has uploaded a new patch set (#13) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63771?usp=email ) Change subject: [WIP] mb/*/*/*.fmd: Start flash at 0 ...................................................................... [WIP] mb/*/*/*.fmd: Start flash at 0 FMAP should not contain information about the memory map. Done with the following command: "find -name \*.fmd -exec sed -i 's/$FLASH$.* $.*$ /\1 \2 /' {} \;" Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> --- M Makefile.mk A src/mainboard/adlink/alva/bootblock_custom.S.edk2.bak M src/mainboard/amd/bilby/board.fmd M src/mainboard/amd/birman/board_glinda.fmd M src/mainboard/amd/birman/board_phoenix.fmd M src/mainboard/amd/birman/chromeos_glinda.fmd M src/mainboard/amd/birman/chromeos_phoenix.fmd M src/mainboard/amd/birman_plus/board_glinda.fmd M src/mainboard/amd/birman_plus/board_phoenix.fmd M src/mainboard/amd/birman_plus/chromeos_glinda.fmd M src/mainboard/amd/birman_plus/chromeos_phoenix.fmd M src/mainboard/amd/chausie/board.fmd M src/mainboard/amd/chausie/chromeos.fmd M src/mainboard/amd/crater/board_renoir.fmd M src/mainboard/amd/crater/chromeos_renoir.fmd M src/mainboard/amd/majolica/board.fmd M src/mainboard/amd/majolica/chromeos.fmd M src/mainboard/amd/mandolin/variants/cereme/board.fmd M src/mainboard/amd/mandolin/variants/mandolin/board.fmd M src/mainboard/amd/mayan/board.fmd M src/mainboard/amd/mayan/chromeos.fmd M src/mainboard/arm/rdn2/flash.fmd M src/mainboard/bytedance/bd_egs/board.fmd M src/mainboard/cavium/cn8100_sff_evb/board.fmd M src/mainboard/emulation/qemu-i440fx/vboot-rwa-8M.fmd A src/mainboard/emulation/qemu-q35/sot.c M src/mainboard/emulation/qemu-q35/vboot-rwa-8M.fmd M src/mainboard/emulation/qemu-q35/vboot-rwab-8M.fmd A src/mainboard/emulation/qemu-riscv/program-data.ld M src/mainboard/emulation/qemu-sbsa/flash.fmd M src/mainboard/facebook/fbg1701/vboot-rw.fmd M src/mainboard/framework/azalea/coreboot.fmd M src/mainboard/google/asurada/chromeos.fmd M src/mainboard/google/auron/chromeos.fmd M src/mainboard/google/beltino/chromeos.fmd M src/mainboard/google/butterfly/chromeos.fmd M src/mainboard/google/cherry/chromeos.fmd M src/mainboard/google/corsola/chromeos.fmd M src/mainboard/google/cyan/chromeos.fmd M src/mainboard/google/daisy/chromeos.fmd M src/mainboard/google/dedede/chromeos-dedede-16MiB.fmd M src/mainboard/google/dedede/chromeos-dedede-32MiB.fmd M src/mainboard/google/drallion/chromeos.fmd M src/mainboard/google/drallion/default.fmd M src/mainboard/google/eve/chromeos.fmd M src/mainboard/google/fizz/chromeos.fmd M src/mainboard/google/foster/chromeos.fmd M src/mainboard/google/gale/chromeos.fmd M src/mainboard/google/geralt/chromeos.fmd M src/mainboard/google/glados/chromeos.fmd M src/mainboard/google/gru/chromeos.fmd M src/mainboard/google/guybrush/chromeos.fmd M src/mainboard/google/hatch/chromeos-16MiB.fmd M src/mainboard/google/hatch/chromeos-32MiB.fmd M src/mainboard/google/herobrine/chromeos.fmd M src/mainboard/google/jecht/chromeos.fmd M src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd M src/mainboard/google/kukui/chromeos.fmd M src/mainboard/google/link/chromeos.fmd M src/mainboard/google/mistral/chromeos.fmd M src/mainboard/google/myst/chromeos.fmd M src/mainboard/google/nyan/chromeos.fmd M src/mainboard/google/nyan_big/chromeos.fmd M src/mainboard/google/nyan_blaze/chromeos.fmd M src/mainboard/google/oak/chromeos.fmd M src/mainboard/google/parrot/chromeos.fmd M src/mainboard/google/peach_pit/chromeos.fmd M src/mainboard/google/poppy/chromeos.fmd M src/mainboard/google/puff/chromeos-16MiB.fmd M src/mainboard/google/puff/chromeos-32MiB.fmd M src/mainboard/google/rambi/chromeos.fmd M src/mainboard/google/rauru/chromeos.fmd M src/mainboard/google/sarien/chromeos.fmd M src/mainboard/google/sarien/default.fmd M src/mainboard/google/skyrim/chromeos.fmd M src/mainboard/google/skywalker/chromeos.fmd M src/mainboard/google/slippy/chromeos.fmd M src/mainboard/google/smaug/chromeos.fmd M src/mainboard/google/storm/chromeos.fmd M src/mainboard/google/stout/chromeos.fmd M src/mainboard/google/trogdor/chromeos.fmd M src/mainboard/google/veyron/chromeos.fmd M src/mainboard/google/veyron_mickey/chromeos.fmd M src/mainboard/google/veyron_rialto/chromeos.fmd M src/mainboard/google/zork/chromeos.fmd M src/mainboard/ibm/sbp1/board.fmd A src/mainboard/intel/adlrvp/variants/adlrvp_rpl_s_ddr5_udimm_1dpc/data.vbt A src/mainboard/intel/adlrvp/variants/adlrvp_rpl_s_ddr5_udimm_1dpc/overridetree.cb M src/mainboard/intel/avenuecity_crb/board.fmd M src/mainboard/intel/baskingridge/chromeos.fmd M src/mainboard/intel/beechnutcity_crb/board.fmd M src/mainboard/intel/cedarisland_crb/board.fmd M src/mainboard/intel/coffeelake_rvp/chromeos.fmd M src/mainboard/intel/coffeelake_rvp/chromeos_32MB.fmd M src/mainboard/intel/frost_creek/board.fmd M src/mainboard/intel/jasperlake_rvp/chromeos.fmd M src/mainboard/intel/kblrvp/chromeos.fmd M src/mainboard/intel/kunimitsu/chromeos.fmd M src/mainboard/intel/shadowmountain/chromeos.fmd M src/mainboard/intel/strago/chromeos.fmd M src/mainboard/intel/tglrvp/chromeos.fmd M src/mainboard/intel/wtm2/chromeos.fmd M src/mainboard/lenovo/haswell/vboot-ro-me_clean.fmd M src/mainboard/lenovo/haswell/vboot-ro.fmd M src/mainboard/lenovo/haswell/vboot-rwab.fmd M src/mainboard/lenovo/t400/vboot-rwa.fmd M src/mainboard/lenovo/t410/vboot-rwa.fmd M src/mainboard/lenovo/t420/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420/vboot-ro.fmd M src/mainboard/lenovo/t420/vboot-rwa.fmd M src/mainboard/lenovo/t420s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t420s/vboot-ro.fmd M src/mainboard/lenovo/t420s/vboot-rwa.fmd M src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430/vboot-ro.fmd M src/mainboard/lenovo/t430/vboot-rwab.fmd M src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t430s/vboot-ro.fmd M src/mainboard/lenovo/t430s/vboot-rwab.fmd M src/mainboard/lenovo/t520/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t520/vboot-ro.fmd M src/mainboard/lenovo/t520/vboot-rwa.fmd M src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd M src/mainboard/lenovo/t530/vboot-ro.fmd M src/mainboard/lenovo/t530/vboot-rwab.fmd M src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x131e/vboot-ro.fmd M src/mainboard/lenovo/x131e/vboot-rwab.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-ro.fmd M src/mainboard/lenovo/x1_carbon_gen1/vboot-rwab.fmd M src/mainboard/lenovo/x200/vboot-rwa.fmd M src/mainboard/lenovo/x201/vboot-rwa.fmd M src/mainboard/lenovo/x220/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x220/vboot-ro.fmd M src/mainboard/lenovo/x220/vboot-rwa.fmd M src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd M src/mainboard/lenovo/x230/vboot-ro.fmd M src/mainboard/lenovo/x230/vboot-rwab.fmd M src/mainboard/lenovo/x60/vboot-rwa.fmd A src/mainboard/milkv/pioneer/boot-media.c M src/mainboard/opencellular/elgon/board.fmd M src/mainboard/opencellular/elgon/vboot.fmd A src/mainboard/prodrive/atlas/Kconfig.sot A src/mainboard/prodrive/atlas/hda_verb.c A src/mainboard/prodrive/atlas/sot.c M src/mainboard/protectli/vault_adl_p/vboot-rwa.fmd M src/mainboard/protectli/vault_cml/board.fmd M src/mainboard/protectli/vault_cml/vboot-rwa.fmd M src/mainboard/samsung/lumpy/chromeos.fmd M src/mainboard/samsung/stumpy/chromeos.fmd M src/mainboard/siemens/fa_ehl/fa_ehl.fmd M src/mainboard/siemens/mc_ehl/mc_ehl.fmd A src/mainboard/sifive/hifive-unleashed/dts/fu540-c000.dtsi A src/mainboard/sifive/hifive-unleashed/dts/gpio.h A src/mainboard/sifive/hifive-unleashed/dts/hifive-unleashed-a00.dts A src/mainboard/sifive/hifive-unleashed/dts/leds-common.h A src/mainboard/sifive/hifive-unleashed/dts/pwm.h A src/mainboard/sifive/hifive-unleashed/dts/sifive-fu540-prci.h A src/mainboard/sifive/hifive-unleashed/hifive-unleashed-a00-linux.dtb A src/mainboard/sifive/hifive-unmatched/board.fmd M src/mainboard/ti/beaglebone/board.fmd M src/soc/amd/glinda/Makefile.mk M src/soc/amd/mendocino/Makefile.mk M src/soc/amd/phoenix/Makefile.mk M src/soc/amd/picasso/Makefile.mk M util/cbfstool/default-x86.fmd M util/cbfstool/default.fmd 168 files changed, 1,508 insertions(+), 159 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/63771/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/63771?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac86ef9be6b14817a65bf3a7ccb624d205ca3f99 Gerrit-Change-Number: 63771 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> 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[S] Change in coreboot[main]: soc/amd/common: Support sbin ucode files
by Maximilian Brune (Code Review) 29 Jan '25

29 Jan '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin Roth, Matt DeVillier, Patrick Rudolph, Raul Rangel. Maximilian Brune has posted comments on this change by Fred Reitberger. ( https://review.coreboot.org/c/coreboot/+/68122?usp=email ) Change subject: soc/amd/common: Support sbin ucode files ...................................................................... Patch Set 7: (2 comments) This change is ready for review. File src/soc/amd/common/block/cpu/Makefile.mk: https://review.coreboot.org/c/coreboot/+/68122/comment/83344af2_c4c49bcf?us… : PS5, Line 20: ucode > Why add ucode.sh here? It's only like 5 lines of code. […] This kind of shell code (if else stuff) is arguable harder to read if directly included inside the Makefile. I get your point though. In patchset 7 I put it directly into the recipe. Let me know what you prefer. https://review.coreboot.org/c/coreboot/+/68122/comment/61ada4b0_147016e7?us… : PS5, Line 41: $(amd_microcode_bins) > You can add all patch files to `amd_microcode_bins` and then filter them: […] Doesn't that make it unnecessarily complicated? We would still need 2 loops to filter sbin and bin. We might as well separate them from the start. -- To view, visit https://review.coreboot.org/c/coreboot/+/68122?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I29768ea19543bdc76662e687f59bf31b76f555ae Gerrit-Change-Number: 68122 Gerrit-PatchSet: 7 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 29 Jan 2025 22:56:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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