coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

1 participants
2312 discussions

[XS] Change in coreboot[main]: soc/mediatek/common: Reduce eMMC clock frequency to 400kHz
by Yidi Lin (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Hung-Te Lin, Kiwi Liu, Mengqi Zhang, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Kiwi Liu. ( https://review.coreboot.org/c/coreboot/+/84298?usp=email ) Change subject: soc/mediatek/common: Reduce eMMC clock frequency to 400kHz ...................................................................... Patch Set 14: (7 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84298/comment/15705d62_525ec0ad?us… : PS14, Line 7: Reduce eMMC clock frequency to 400kHz Correct src clk frq to 400 MHz for eMMMC clk of 400 kHz https://review.coreboot.org/c/coreboot/+/84298/comment/b94600ed_64a40765?us… : PS14, Line 10: power-on. power-on due to wrong src_hz value. https://review.coreboot.org/c/coreboot/+/84298/comment/a08d7116_3e278368?us… : PS14, Line 11: When we need to set a clock output frequency, we actually set a leave one blank line above. https://review.coreboot.org/c/coreboot/+/84298/comment/21175769_63c5fd24?us… : PS14, Line 13: he frequency : division value to 125 and get the division value 125. https://review.coreboot.org/c/coreboot/+/84298/comment/7a3c8c8e_618f6ae4?us… : PS14, Line 16: So we correct source clock frequency to 400MHz for eMMC output clock of 400KHz. leave one blank line above. https://review.coreboot.org/c/coreboot/+/84298/comment/df3f8776_8cf2b6d2?us… : PS14, Line 16: 400KHz. move to next line. File src/soc/mediatek/common/msdc.c: https://review.coreboot.org/c/coreboot/+/84298/comment/a8e1b96a_62f137ff?us… : PS9, Line 432: host->src_hz = 400 * 1000 * 1000; > @yidilin@google.com […] According to depthcharge, MT8173's source clock is 200MHz. But we don't enable `mtk_emmc_early_init` on it. It should be fine to keep 400Mhz here. -- To view, visit https://review.coreboot.org/c/coreboot/+/84298?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9c8836b23fb21e9b0bdc80fbe85142ea0fa5e381 Gerrit-Change-Number: 84298 Gerrit-PatchSet: 14 Gerrit-Owner: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mengqi Zhang <mengqi.zhang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Mengqi Zhang <mengqi.zhang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 13 Sep 2024 04:27:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Kiwi Liu <kiwi.liu(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Mengqi Zhang <mengqi.zhang(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

1 0

[XS] Change in coreboot[main]: ec/google/chromeec: Ensure pre-CR50 devices use "short" battery strings
by Subrata Banik (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Matt DeVillier. Subrata Banik has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/84300?usp=email ) Change subject: ec/google/chromeec: Ensure pre-CR50 devices use "short" battery strings ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: Please hold on this change. I got to know that CB:82775 also regressed the resume time on many devices. I would like to refactor the enabling of this feature selectively on board that really wish to enable this feature (Yaviks, Yahiko etc.) -- To view, visit https://review.coreboot.org/c/coreboot/+/84300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If3686dc9b82b44202947081ec7e253317deb8fff Gerrit-Change-Number: 84300 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Fri, 13 Sep 2024 04:20:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

1 0

[M] Change in coreboot[main]: mb/google/brox/var/lotso: Update cpu power limits
by Jian Tong (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Dengwu Yu, Karthik Ramasubramanian, Kun Liu, Subrata Banik, wen zhang. Hello Dengwu Yu, Karthik Ramasubramanian, Kun Liu, Subrata Banik, build bot (Jenkins), wen zhang, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84202?usp=email to look at the new patch set (#5). Change subject: mb/google/brox/var/lotso: Update cpu power limits ...................................................................... mb/google/brox/var/lotso: Update cpu power limits When battery not persent, limit PL4 to 40. Base on: https://review.coreboot.org/c/coreboot/+/83752 AC+DC/DC: PL1=15W PL2=25W PL4=114 AC ONLY: PL1=15W PL2=25W PL4=40W BUG=b:355094551 TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage Change-Id: I5848c776399a1bdc455db604bb3b22d16f6b2928 Signed-off-by: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brox/Kconfig M src/mainboard/google/brox/variants/lotso/Makefile.mk M src/mainboard/google/brox/variants/lotso/overridetree.cb A src/mainboard/google/brox/variants/lotso/ramstage.c 4 files changed, 47 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/84202/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84202?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5848c776399a1bdc455db604bb3b22d16f6b2928 Gerrit-Change-Number: 84202 Gerrit-PatchSet: 5 Gerrit-Owner: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dengwu Yu <yudengwu(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wen zhang <zhangwen6(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-Attention: wen zhang <zhangwen6(a)huaqin.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dengwu Yu <yudengwu(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

1 0

[M] Change in coreboot[main]: mb/google/brox/var/lotso: Update cpu power limits
by Jian Tong (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Dengwu Yu, Karthik Ramasubramanian, Kun Liu, Subrata Banik, wen zhang. Jian Tong has posted comments on this change by Jian Tong. ( https://review.coreboot.org/c/coreboot/+/84202?usp=email ) Change subject: mb/google/brox/var/lotso: Update cpu power limits ...................................................................... Patch Set 4: (1 comment) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/84202/comment/f980e71f_1ce86164?us… : PS3, Line 9: When battery not persent, limit PL4 to 40. > We are working along with Intel on Brox regarding a common solution for this - CB:83752. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84202?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5848c776399a1bdc455db604bb3b22d16f6b2928 Gerrit-Change-Number: 84202 Gerrit-PatchSet: 4 Gerrit-Owner: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dengwu Yu <yudengwu(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: wen zhang <zhangwen6(a)huaqin.corp-partner.google.com> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-Attention: wen zhang <zhangwen6(a)huaqin.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dengwu Yu <yudengwu(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 13 Sep 2024 03:31:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com>

1 0

[M] Change in coreboot[main]: mb/google/volteer: Fix USB port definitions
by Elyes Haouas (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Felix Singer, Matt DeVillier, Nick Vaccaro. Elyes Haouas has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/84348?usp=email ) Change subject: mb/google/volteer: Fix USB port definitions ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652 Gerrit-Change-Number: 84348 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 13 Sep 2024 03:31:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[M] Change in coreboot[main]: OpenSBI: Get rid of a burden
by Elyes Haouas (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Maximilian Brune, Philipp Hug, ron minnich. Hello Maximilian Brune, Philipp Hug, ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84346?usp=email to look at the new patch set (#3). Change subject: OpenSBI: Get rid of a burden ...................................................................... OpenSBI: Get rid of a burden Change-Id: Id22f3d4ef9c6e1c90a2d25c06c982bbf289b1268 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M .gitmodules D 3rdparty/opensbi M Documentation/arch/riscv/index.md M configs/config.emulation_qemu_riscv_rv64 D configs/config.sifive_hifive-unleashed.opensbi M src/arch/riscv/Kconfig M src/arch/riscv/Makefile.mk M src/arch/riscv/boot.c M src/arch/riscv/include/arch/boot.h M src/arch/riscv/include/arch/memlayout.h D src/arch/riscv/opensbi.c M src/arch/riscv/payload.c M src/arch/riscv/tables.c M src/include/bootmem.h M src/include/program_loading.h M src/include/symbols.h M src/lib/bootmem.c M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/memlayout.ld M src/soc/sifive/fu540/Kconfig M src/soc/sifive/fu540/memlayout.ld M src/soc/sifive/fu740/Kconfig M src/soc/sifive/fu740/memlayout.ld 23 files changed, 1 insertion(+), 240 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/84346/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84346?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id22f3d4ef9c6e1c90a2d25c06c982bbf289b1268 Gerrit-Change-Number: 84346 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com>

1 0

[M] Change in coreboot[main]: OpenSBI is a pain
by Elyes Haouas (Code Review) 13 Sep '24

13 Sep '24

Elyes Haouas has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/84346?usp=email ) Change subject: OpenSBI is a pain ...................................................................... OpenSBI is a pain Change-Id: Id22f3d4ef9c6e1c90a2d25c06c982bbf289b1268 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M .gitmodules D 3rdparty/opensbi M Documentation/arch/riscv/index.md M configs/config.emulation_qemu_riscv_rv64 D configs/config.sifive_hifive-unleashed.opensbi M src/arch/riscv/Kconfig M src/arch/riscv/Makefile.mk M src/arch/riscv/boot.c M src/arch/riscv/include/arch/boot.h M src/arch/riscv/include/arch/memlayout.h D src/arch/riscv/opensbi.c M src/arch/riscv/payload.c M src/arch/riscv/tables.c M src/include/bootmem.h M src/include/program_loading.h M src/include/symbols.h M src/lib/bootmem.c M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/memlayout.ld M src/soc/sifive/fu540/Kconfig M src/soc/sifive/fu540/memlayout.ld M src/soc/sifive/fu740/Kconfig M src/soc/sifive/fu740/memlayout.ld 23 files changed, 1 insertion(+), 240 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/84346/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84346?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id22f3d4ef9c6e1c90a2d25c06c982bbf289b1268 Gerrit-Change-Number: 84346 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[M] Change in coreboot[main]: mb/google/volteer: Fix USB port definitions
by Matt DeVillier (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Felix Singer, Nick Vaccaro. Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/84348?usp=email ) Change subject: mb/google/volteer: Fix USB port definitions ...................................................................... Patch Set 5: (1 comment) File src/mainboard/google/volteer/variants/copano/overridetree.cb: https://review.coreboot.org/c/coreboot/+/84348/comment/99ef19a8_d16d9271?us… : PS4, Line 269: USB > missing double quotes here Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652 Gerrit-Change-Number: 84348 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 13 Sep 2024 02:50:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>

1 0

[M] Change in coreboot[main]: mb/google/volteer: Fix USB port definitions
by Matt DeVillier (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Felix Singer, Matt DeVillier, Nick Vaccaro. Hello Felix Singer, Nick Vaccaro, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84348?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+2 by Felix Singer Change subject: mb/google/volteer: Fix USB port definitions ...................................................................... mb/google/volteer: Fix USB port definitions Commit bc8f5405b542 ("tgl mainboards: Move usb{2,3}_ports settings into XHCI device scope") not only moved the USB port definitions under the XHCI device reference, but also combined multiple register definitions. In doing so, it broke the inheritance from the baseboard, since the variant overridetree registers now replaced the entire usb2_ports/ usb3_ports structs, rather than replacing individual array elements therein. This resulted in any USB ports inherited from the baseboard and not overridden by the variant being non-function as they were not included in the resulting combined devicetree. To fix this, return to overriding individual array elements in the usb2/3_ports structs. TEST=build/boot google/drobit. Verify all USB ports present and functional. Verify mainboard/static.c in built shows all ports. Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/chronicler/overridetree.cb M src/mainboard/google/volteer/variants/collis/overridetree.cb M src/mainboard/google/volteer/variants/copano/overridetree.cb M src/mainboard/google/volteer/variants/delbin/overridetree.cb M src/mainboard/google/volteer/variants/drobit/overridetree.cb M src/mainboard/google/volteer/variants/eldrid/overridetree.cb M src/mainboard/google/volteer/variants/elemi/overridetree.cb M src/mainboard/google/volteer/variants/halvor/overridetree.cb M src/mainboard/google/volteer/variants/lindar/overridetree.cb M src/mainboard/google/volteer/variants/malefor/overridetree.cb M src/mainboard/google/volteer/variants/terrador/overridetree.cb M src/mainboard/google/volteer/variants/todor/overridetree.cb M src/mainboard/google/volteer/variants/voema/overridetree.cb M src/mainboard/google/volteer/variants/volet/overridetree.cb M src/mainboard/google/volteer/variants/voxel/overridetree.cb 16 files changed, 99 insertions(+), 143 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/84348/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/84348?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I54921fa4ecf594a1ecbcfa7c45e5d745d4a95652 Gerrit-Change-Number: 84348 Gerrit-PatchSet: 5 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

1 0

[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Jérémy Compostella (Code Review) 13 Sep '24

13 Sep '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Saurabh Mishra, Subrata Banik. Jérémy Compostella has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/84332?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ...................................................................... Patch Set 11: Code-Review+2 (1 comment) Patchset: PS11: Putting +2 back after rebase, fixing some alphabetical minor issues and re-testing. Still good to go. -- To view, visit https://review.coreboot.org/c/coreboot/+/84332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I61930726ad0c765bfa1d72c5df893262be884834 Gerrit-Change-Number: 84332 Gerrit-PatchSet: 11 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 13 Sep 2024 02:38:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2024