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Change subject: stddef.h: Introduce nullptr constant
......................................................................
Patch Set 26:
(1 comment)
File src/include/stddef.h:
https://review.coreboot.org/c/coreboot/+/83459/comment/c994cd30_33870187?us… :
PS26, Line 25: #define nullptr ((void *)0)
Just checking, I thought we decided against using `nullptr`/`nullptr_t` in
the leadership meeting. So I'm wondering, why add the definition if we are
not going to use it?
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Change subject: stddef.h: Introduce nullptr constant
......................................................................
Patch Set 26:
(1 comment)
File src/include/stddef.h:
https://review.coreboot.org/c/coreboot/+/83459/comment/bdb69d26_7e11aa3e?us… :
PS25, Line 27:
> remove blank line
Thx
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Change subject: soc/intel/xeon_sp: Revise IIO domain ACPI name encoding
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I suppose it should be no problem? Since only the ACPI names are impacted, but the domain path encod […]
If the domain numbers are unpredictable (e.g. they get assigned by FSP) then I believe what needs to be done is to update the devicetree at runtime.
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Change subject: Documentation/soc/intel/xeon_sp: Update doc to use real FSP headers
......................................................................
Patch Set 3:
(1 comment)
File Documentation/soc/intel/xeon_sp/community_preview_guide.md:
https://review.coreboot.org/c/coreboot/+/84550/comment/8b2f362a_b2617c0b?us… :
PS2, Line 115: Other needed firmware ingredients includes microcode, intel flash descriptor and platform boot
: policy. The same flow to obtain and apply.
> It is weird that the in-site apply didn't work here and I made the fix in https://review.coreboot. […]
I haven't used this feature much, but I believe applying a fix enters "edit mode" (same as manually editing a change). You have to "publish" the changes in the edit for them to become a new patchset, otherwise they're disregarded.
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Change subject: Documentation/soc/intel/xeon_sp: Misc format updates
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84583/comment/a41163b7_09d586d9?us… :
PS1, Line 7: Documentation/soc/intel/xeon_sp: Misc format updates
How about:
```
Documentation/soc/intel/xeon_sp: Address review comments
Commit 5e0d370610c ("Documentation/soc/intel/xeon_sp: Update doc to
use real FSP headers") had some unresolved review comments after it
had been submitted. Take care of these comments in this follow-up.
```
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Change subject: util/lint/lint-000-license-headers: Add license
......................................................................
util/lint/lint-000-license-headers: Add license
This adds the "GPL-2.0 OR MIT" license combination.
It is used in subsequent patches that adds source files originally from
the linux kernel.
OR operator:
https://web.archive.org/web/20240730192545/https://spdx.github.io/spdx-spec…
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: I07c508aa6134b063801de36199af9a312a7d6bed
---
M util/lint/lint-000-license-headers
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/84584/1
diff --git a/util/lint/lint-000-license-headers b/util/lint/lint-000-license-headers
index 44657d2..bff8bb4 100755
--- a/util/lint/lint-000-license-headers
+++ b/util/lint/lint-000-license-headers
@@ -121,6 +121,7 @@
check_for_license 'ISC'
check_for_license 'MIT'
check_for_license 'X11'
+check_for_license 'GPL-2.0 OR MIT'
# This is 4 clause ("with advertising") but the University of Berkeley
# declared that 4th clause void, see
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Change subject: stddef.h: Introduce nullptr constant
......................................................................
Patch Set 25: Code-Review+2
(1 comment)
File src/include/stddef.h:
https://review.coreboot.org/c/coreboot/+/83459/comment/b6286648_f8e9bb63?us… :
PS25, Line 27:
remove blank line
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Change subject: arch/riscv: Allow adding OpenSBI as external blob
......................................................................
Patch Set 4:
(1 comment)
File src/arch/riscv/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/83284/comment/a47fe247_7f49a8e7?us… :
PS3, Line 175: OPENSBI_BLOB
> CONFIG_OPENSBI_BLOB?
Done
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Hello Philipp Hug, build bot (Jenkins), ron minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83284?usp=email
to look at the new patch set (#4).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: arch/riscv: Allow adding OpenSBI as external blob
......................................................................
arch/riscv: Allow adding OpenSBI as external blob
The reasoning is that even though vendors currently tend to open source
their OpenSBI implementation, they often do so in their own repository.
So instead of adding all possible source repositories as submodules, we
shall allow specifying a path to an already compiled OpenSBI ELF file.
This is similar of what we currently do on ARM64 with the BL31 binary.
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
Change-Id: I6592ad90a254ca4ac9a6cee89404ad49274f0dea
---
M src/arch/riscv/Kconfig
M src/arch/riscv/Makefile.mk
2 files changed, 24 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/83284/4
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Change subject: soc/intel/xeon_sp: Revise IIO domain ACPI name encoding
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> While it works for now it might break once we add domain devices != 0 to the devicetree.cb. […]
I suppose it should be no problem? Since only the ACPI names are impacted, but the domain path encoding is unchanged?
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