coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: util/crossgcc: Patch clang to enable linking x86 bare metal targets
by Felix Singer (Code Review) 28 Aug '24

28 Aug '24

Felix Singer has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84032?usp=email ) Change subject: util/crossgcc: Patch clang to enable linking x86 bare metal targets ...................................................................... Patch Set 9: (1 comment) Patchset: PS9: Rolling out new toolchain on the build servers later. -- To view, visit https://review.coreboot.org/c/coreboot/+/84032?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I943215c8714e392e52ea35667f2bf21e517c4255 Gerrit-Change-Number: 84032 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Aug 2024 07:04:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add EINT support
by Yu-Ping Wu (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84026?usp=email ) Change subject: soc/mediatek/mt8196: Add EINT support ...................................................................... Patch Set 8: (1 comment) File src/soc/mediatek/mt8196/eint.c: https://review.coreboot.org/c/coreboot/+/84026/comment/91a29fe7_d51c480a?us… : PS8, Line 11: [4] > The original struct is designed for kernel driver. […] If we're using `uint8_t` for `instance`, please define enum for its values (e.g., `EINT_E`, `EINT_S`). -- To view, visit https://review.coreboot.org/c/coreboot/+/84026?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Gerrit-Change-Number: 84026 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 07:03:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: util/crossgcc: Patch clang to enable linking x86 bare metal targets
by Felix Singer (Code Review) 28 Aug '24

28 Aug '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84032?usp=email ) Change subject: util/crossgcc: Patch clang to enable linking x86 bare metal targets ...................................................................... util/crossgcc: Patch clang to enable linking x86 bare metal targets This allows clang to link x86 bare metal targets. TESTED: Qemu i440fx and q35 boot to payload with both 32 and 64bit code compiled with clang and LTO enabled with updated linker script. Change-Id: I943215c8714e392e52ea35667f2bf21e517c4255 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84032 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> --- A util/crossgcc/patches/clang-18.1.8.src_x86_baremetal.patch 1 file changed, 29 insertions(+), 0 deletions(-) Approvals: Felix Singer: Looks good to me, approved build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/util/crossgcc/patches/clang-18.1.8.src_x86_baremetal.patch b/util/crossgcc/patches/clang-18.1.8.src_x86_baremetal.patch new file mode 100644 index 0000000..61c608c --- /dev/null +++ b/util/crossgcc/patches/clang-18.1.8.src_x86_baremetal.patch @@ -0,0 +1,29 @@ +diff --git a/lib/Driver/ToolChains/BareMetal.cpp b/lib/Driver/ToolChains/BareMetal.cpp +index 852e0442..eb84a785 100644 +--- a/lib/Driver/ToolChains/BareMetal.cpp ++++ b/lib/Driver/ToolChains/BareMetal.cpp +@@ -169,6 +169,12 @@ static bool isPPCBareMetal(const llvm::Triple &Triple) { + Triple.getEnvironment() == llvm::Triple::EABI; + } + ++/// Is the triple x86_32 or x86_64 -*-none-elf? ++static bool isX86BareMetal(const llvm::Triple &Triple) { ++ return Triple.isX86() && Triple.getOS() == llvm::Triple::UnknownOS && ++ Triple.getEnvironmentName() == "elf"; ++} ++ + static void findMultilibsFromYAML(const ToolChain &TC, const Driver &D, + StringRef MultilibPath, const ArgList &Args, + DetectedMultilibs &Result) { +@@ -234,9 +240,10 @@ void BareMetal::findMultilibs(const Driver &D, const llvm::Triple &Triple, + + bool BareMetal::handlesTarget(const llvm::Triple &Triple) { + return isARMBareMetal(Triple) || isAArch64BareMetal(Triple) || +- isRISCVBareMetal(Triple) || isPPCBareMetal(Triple); ++ isRISCVBareMetal(Triple) || isPPCBareMetal(Triple) || isX86BareMetal(Triple); + } + ++ + Tool *BareMetal::buildLinker() const { + return new tools::baremetal::Linker(*this); + } -- To view, visit https://review.coreboot.org/c/coreboot/+/84032?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I943215c8714e392e52ea35667f2bf21e517c4255 Gerrit-Change-Number: 84032 Gerrit-PatchSet: 9 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: util/crossgcc: Patch clang to enable linking x86 bare metal targets
by Felix Singer (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Arthur Heymans, Martin L Roth. Felix Singer has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84032?usp=email ) Change subject: util/crossgcc: Patch clang to enable linking x86 bare metal targets ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84032?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I943215c8714e392e52ea35667f2bf21e517c4255 Gerrit-Change-Number: 84032 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 28 Aug 2024 06:57:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Makefile: Finish switch to Makefile.mk from .inc
by Arthur Heymans (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Felix Singer, Martin L Roth. Arthur Heymans has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/80130?usp=email ) Change subject: Makefile: Finish switch to Makefile.mk from .inc ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80130?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If0dbc7ed204047b5575b303f57f6cf607f688ad9 Gerrit-Change-Number: 80130 Gerrit-PatchSet: 3 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 06:51:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add EINT support
by Yidi Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84026?usp=email ) Change subject: soc/mediatek/mt8196: Add EINT support ...................................................................... Patch Set 8: (1 comment) File src/soc/mediatek/mt8196/eint.c: https://review.coreboot.org/c/coreboot/+/84026/comment/ec388a73_94aed14e?us… : PS8, Line 11: uint32_t > Will this table be used in the boot block? […] We only use EINT to setup the IRQ pin from GSC. If code size is an issue, we can move it to verstage. -- To view, visit https://review.coreboot.org/c/coreboot/+/84026?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Gerrit-Change-Number: 84026 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 06:49:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org>

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[XL] Change in coreboot[main]: mb/asrock: Add Asrock Industrial IMB-1222 motherboard
by Maxim (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Elyes Haouas, Felix Singer. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83107?usp=email to look at the new patch set (#19). Change subject: mb/asrock: Add Asrock Industrial IMB-1222 motherboard ...................................................................... mb/asrock: Add Asrock Industrial IMB-1222 motherboard ASRock IMB-1222 Intel Comet Lake-S Q470E industrial thin mini-ITX motherboard [1]. Working: - Dual Channel DDR4 2933/2666/2400 MHz; - Intel UHD Graphics (VGA Option ROM, libgfxinit); - DP (both), HDMI; - PCIe x16 Slot (Gen3); - SATA ports; - USB 2.0 ports; - USB 3.0 ports; - M.2 Key-E 2230 slot for Wireless (PCIe x1, USB 2.0 and CNVi); - M.2 Key-B 3042/3052 slot for 4G/5G modem (PCIe x1); - M.2 Key-M 2242/2260/2280 for SSD/NVMe (PCIE x4, SATA3); - LAN1 Intel I225LM/I225V, 10/100/1000/2500 Mbps; - LAN2 Intel I219LM, 10/100/1000 Mbps; - Realtek ALC887 HD Audio (line-out, mic-in); - COM 1/2/3/4 ports; - onboard speaker; - HWM/FANs control (fintek f81966); - S3 suspend and wake; - TPM; - disabling ME (me_cleaner); - boots Ubuntu 22.04/24.04 (SeaBIOS, Linuxboot, edk2 [2]). Unknown/untested: - USB3.0 in M.2 Key-B 3042/3052 slot; - eDP/LVDS; - PCIe riser cards; - SPDIF. Known issues: - there is no video output in firmware with edk2 [2]. There is no schematic/boardview, reverse engineering only. This port is based on system76/bonw14 because it has a similar topology. [1] https://web.archive.org/web/20220924171403/https:// www.asrockind.com/en-gb/IMB-1222 [2] MrChromebox' edk2 fork, https://github.com/mrchromebox/edk2 uefipayload_202309 branch Change-Id: Id2b4c903546f9174b5e7dd26e54a0c5aaa09e1f8 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- A Documentation/mainboard/asrock/imb-1222.md M Documentation/mainboard/index.md A src/mainboard/asrock/imb-1222/Kconfig A src/mainboard/asrock/imb-1222/Kconfig.name A src/mainboard/asrock/imb-1222/Makefile.mk A src/mainboard/asrock/imb-1222/acpi/mainboard.asl A src/mainboard/asrock/imb-1222/acpi/sleep.asl A src/mainboard/asrock/imb-1222/board_info.txt A src/mainboard/asrock/imb-1222/bootblock.c A src/mainboard/asrock/imb-1222/cmos.default A src/mainboard/asrock/imb-1222/cmos.layout A src/mainboard/asrock/imb-1222/data.vbt A src/mainboard/asrock/imb-1222/devicetree.cb A src/mainboard/asrock/imb-1222/dsdt.asl A src/mainboard/asrock/imb-1222/gma-mainboard.ads A src/mainboard/asrock/imb-1222/gpio.c A src/mainboard/asrock/imb-1222/gpio_beep.c A src/mainboard/asrock/imb-1222/hda_verb.c A src/mainboard/asrock/imb-1222/include/mainboard/gpio.h A src/mainboard/asrock/imb-1222/include/mainboard/superio.h A src/mainboard/asrock/imb-1222/panic.c A src/mainboard/asrock/imb-1222/ramstage.c A src/mainboard/asrock/imb-1222/romstage.c A src/mainboard/asrock/imb-1222/superio.c 24 files changed, 1,307 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/83107/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/83107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id2b4c903546f9174b5e7dd26e54a0c5aaa09e1f8 Gerrit-Change-Number: 83107 Gerrit-PatchSet: 19 Gerrit-Owner: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[S] Change in coreboot[main]: mb/google/nissa/var/nivviks: Prevent camera LED blinking during boot
by Subrata Banik (Code Review) 28 Aug '24

28 Aug '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84019?usp=email ) Change subject: mb/google/nissa/var/nivviks: Prevent camera LED blinking during boot ...................................................................... mb/google/nissa/var/nivviks: Prevent camera LED blinking during boot Configure _DSC to ACPI_DEVICE_SLEEP_D3_COLD so that driver skips initial probe during kernel boot and prevent privacy LED blink. TEST=Build and boot nivviks. Monitor the camera LED blinking during boot. Change-Id: I979207d1b6d55f78dea20d3366ef4a833ee9c86d Signed-off-by: Sowmya V <v.sowmya(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84019 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Ronak Kanabar <ronak.kanabar(a)intel.com> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/nivviks/overridetree.cb 1 file changed, 18 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Ronak Kanabar: Looks good to me, approved Subrata Banik: Looks good to me, approved Dinesh Gehlot: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/nivviks/overridetree.cb b/src/mainboard/google/brya/variants/nivviks/overridetree.cb index 24c6d61..67c47346 100644 --- a/src/mainboard/google/brya/variants/nivviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/nivviks/overridetree.cb @@ -396,7 +396,9 @@ register "remote_name" = ""IPU0"" register "has_power_resource" = "1" - #Controls + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" + + # Controls register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ" @@ -404,7 +406,7 @@ register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" # EN_PP1800_PP1200_WCAM_X register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" # WCAM_RST_L - #_ON + # _ON register "on_seq.ops_cnt" = "5" register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" @@ -412,7 +414,7 @@ register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)" register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)" - #_OFF + # _OFF register "off_seq.ops_cnt" = "4" register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)" register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)" @@ -429,8 +431,20 @@ register "chip_name" = ""DW AF DAC"" register "device_type" = "INTEL_ACPI_CAMERA_VCM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" register "vcm_compat" = ""dongwoon,dw9714"" + register "has_power_resource" = "1" + register "max_dstate_for_probe" = "ACPI_DEVICE_SLEEP_D3_COLD" + + # Controls + register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" # EN_PP2800_WCAM_X + + # _ON + register "on_seq.ops_cnt" = "1" + register "on_seq.ops[0]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + + # _OFF + register "off_seq.ops_cnt" = "1" + register "off_seq.ops[0]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" device i2c 0C on probe WFC WFC_MIPI_OVTI5675 @@ -443,8 +457,6 @@ register "chip_name" = ""GT24C08"" register "device_type" = "INTEL_ACPI_CAMERA_NVM" - register "pr0" = ""\\_SB.PCI0.I2C2.CAM0.PRIC"" - register "nvm_size" = "0x2000" register "nvm_pagesize" = "1" register "nvm_readonly" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/84019?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I979207d1b6d55f78dea20d3366ef4a833ee9c86d Gerrit-Change-Number: 84019 Gerrit-PatchSet: 4 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/nissa/var/nivviks: Prevent camera LED blinking during boot
by Ronak Kanabar (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, V Sowmya. Ronak Kanabar has posted comments on this change by V Sowmya. ( https://review.coreboot.org/c/coreboot/+/84019?usp=email ) Change subject: mb/google/nissa/var/nivviks: Prevent camera LED blinking during boot ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84019?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I979207d1b6d55f78dea20d3366ef4a833ee9c86d Gerrit-Change-Number: 84019 Gerrit-PatchSet: 3 Gerrit-Owner: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Wed, 28 Aug 2024 06:45:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add EINT support
by Yidi Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84026?usp=email ) Change subject: soc/mediatek/mt8196: Add EINT support ...................................................................... Patch Set 8: (1 comment) File src/soc/mediatek/mt8196/eint.c: https://review.coreboot.org/c/coreboot/+/84026/comment/4196227d_117e768d?us… : PS8, Line 11: [4] > Use a struct: […] The original struct is designed for kernel driver. We can drop `eint_num` and `debounce` because we don't use them in FW. I prefer using `uint8_t` to save `instance` and `index` for smaller code size. -- To view, visit https://review.coreboot.org/c/coreboot/+/84026?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb2dafcd9909b4afbfa81728700718f01d3818f Gerrit-Change-Number: 84026 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 06:41:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit August 2024