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Change subject: soc/intel/skylake/Makefile.inc: Remove path to non-existent directories
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/skylake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/71585/comment/d6b22690_46344100?us… :
PS5, Line 112: ifeq ($(CONFIG_BOARD_STARLABS_STARBOOK_ADL) $(CONFIG_BOARD_STARLABS_LABTOP_CML) $(CONFIG_BOARD_STARLABS_STARBOOK_TGL) $(CONFIG_BOARD_OCP_TIOGAPASS),y)
How did this pass the review? All of these don't use a Skylake SoC.
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Hello Anil Kumar K, Bora Guvendik, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................
soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
Use CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPE1 to enable GPE1 block. This
will include GPE1 blocks to FADT with their info.
BUG=362310295
TEST=boot to OS and check that FADT table include GPE1.
FADT should have:
GPE1 Block Address : 00001810
GPE1 Block Length : 18
GPE1 Base Offset : 80
Signed-off-by: Cliff Huang <cliff.huang(a)intel.com>
Change-Id: Ia6928c35b86f4a2243d58597b17b2a3a5f54271e
---
M src/soc/intel/common/block/acpi/Kconfig
M src/soc/intel/common/block/acpi/acpi.c
2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/84103/5
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Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................
Patch Set 4:
(1 comment)
File src/soc/intel/common/block/acpi/acpi.c:
https://review.coreboot.org/c/coreboot/+/84103/comment/01e500f2_b5876d9d?us… :
PS3, Line 110: SOC_INTEL_COMMON_BLOCK_ACPI_GPE1
> > Hi Subrata, […]
Subrata,
I've renamed the Kconfig flag and added more description, as well as the code change not to use the flag. For the example of using the Kconfig to select GPE1_CNVI_PME_B0 over GPE0_PME_B0, we needs this flag to fallback to its GPE0 event. We are still in the process of making GPE1 events working.
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Hello Anil Kumar K, Bora Guvendik, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84103?usp=email
to look at the new patch set (#4).
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
......................................................................
soc/intel/common/block/acpi: Add GPE1 blocks to ACPI FADT table
Use CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPE1 to enable GPE1 block. This
will include GPE1 blocks to FADT with their info.
BUG=362310295
TEST=boot to OS and check that FADT table include GPE1.
FADT should have:
GPE1 Block Address : 00001810
GPE1 Block Length : 18
GPE1 Base Offset : 80
Signed-off-by: Cliff Huang <cliff.huang(a)intel.com>
Change-Id: Ia6928c35b86f4a2243d58597b17b2a3a5f54271e
---
M src/soc/intel/common/block/acpi/Kconfig
M src/soc/intel/common/block/acpi/acpi.c
2 files changed, 24 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/84103/4
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Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/83789?usp=email )
Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC
......................................................................
Patch Set 48:
(1 comment)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83789/comment/a7d648d6_c89e960f?us… :
PS17, Line 263: Since Lunarlake, OS pinctrl no long provides SOC GPIO pincntrl info.
: Rather, firmware is responsible for providing such info via APCI.
: Firmware can provide entire PADs or excluding those non GPP_[group]_[number]
: at the end of each community.
> Subrata, Can you download Panther Lake SOC I/O BIOS Specification 830617_PTL_SOC_BIOS_Spec_Rev0p4. […]
Subrata,
Can you also reference the changes on the kernel side?
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/d…
thx
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Change subject: mb/hp: Add HP Compaq 8300 Elite SFF
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Needs a rebase on the main branch too.
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Change subject: payloads/depthcharge: Add default 64-bit libpayload config
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Patch Set 5: Code-Review+1
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