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Change subject: vc/google/chromeos: Skip boot info logging if cse sync at payload
......................................................................
Patch Set 1:
(1 comment)
File src/vendorcode/google/chromeos/elog.c:
https://review.coreboot.org/c/coreboot/+/84120/comment/9cb04638_df197ec0?us… :
PS1, Line 14:
need one space more
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Change subject: soc/intel/skylake/Makefile.inc: Remove path to non-existent directories
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/skylake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/71585/comment/23c5886f_bf221866?us… :
PS5, Line 112: ifeq ($(CONFIG_BOARD_STARLABS_STARBOOK_ADL) $(CONFIG_BOARD_STARLABS_LABTOP_CML) $(CONFIG_BOARD_STARLABS_STARBOOK_TGL) $(CONFIG_BOARD_OCP_TIOGAPASS),y)
> Please be more careful. […]
out scope and topic.
please check the topic of current patch
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Change subject: soc/intel/meteorlake: Hook up microcode from repository
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/google/brox/jubilant: Update GPE0 routing
......................................................................
Patch Set 3: Code-Review+1
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Hello Caveh Jalali, Dinesh Gehlot, Eric Herrmann, Forest Mittelberg, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Keith Short, Krishna P Bhat D, Nick Vaccaro, Rishika Raj, Ronak Kanabar, Shelley Chen, Subrata Banik, build bot (Jenkins),
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Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
mb/google/brox: Fix booting to kernel without battery
When battery is disconnected and only adaptor is connected higher PL2
power draw causes cpu brown out and system does not boot to kernel. To
avoid this set Boot frequency UPD to 1. Reduce PL4 value to overcome
power spikes from SoC during boot. Remove Psys implementation as it
impacts active state platform performance. For boot with battery
increase PL1 min value to 15 watts.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on 3 different Brox proto2 SKU1
and SKU2 boards with 65W, 45W and 30W adaptors for 3
iterations of cold boot.
Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/romstage.c
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/brox/ramstage.c
M src/soc/intel/alderlake/chip.h
4 files changed, 83 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83752/18
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Hello Caveh Jalali, Dinesh Gehlot, Eric Herrmann, Forest Mittelberg, Jayvik Desai, Kapil Porwal, Karthik Ramasubramanian, Keith Short, Krishna P Bhat D, Nick Vaccaro, Rishika Raj, Ronak Kanabar, Shelley Chen, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/brox: Fix booting to kernel without battery
......................................................................
mb/google/brox: Fix booting to kernel without battery
When battery is disconnected and only adaptor is connected higher PL2
power draw causes cpu brown out and system does not boot to kernel. To
avoid this set Boot frequency UPD to 1. Reduce PL4 value to overcome
power spikes from SoC during boot. Remove Psys implementation as it
impacts active state platform performance. For boot with battery
increase PL1 min value to 15 watts.
BUG=b:335046538,b:329722827
BRANCH=None
TEST=Able to successfully boot on 3 different Brox proto2 SKU1
and SKU2 boards with 65W, 45W and 30W adaptors for 3
iterations of cold boot.
Change-Id: I58e136c607ea9290ecac0cee453d6632760a6433
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com>
---
M src/mainboard/google/brox/romstage.c
M src/mainboard/google/brox/variants/baseboard/brox/ramstage.c
M src/mainboard/google/brox/variants/brox/ramstage.c
M src/soc/intel/alderlake/chip.h
4 files changed, 83 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83752/17
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Felix Singer has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/71585?usp=email )
Change subject: soc/intel/skylake/Makefile.inc: Remove path to non-existent directories
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/skylake/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/71585/comment/db401955_21611c96?us… :
PS5, Line 112: ifeq ($(CONFIG_BOARD_STARLABS_STARBOOK_ADL) $(CONFIG_BOARD_STARLABS_LABTOP_CML) $(CONFIG_BOARD_STARLABS_STARBOOK_TGL) $(CONFIG_BOARD_OCP_TIOGAPASS),y)
> How did this pass the review? All of these don't use a Skylake SoC.
Please be more careful. CB:84127
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Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun.
Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: soc/intel/meteorlake: Hook up microcode from repository
......................................................................
soc/intel/meteorlake: Hook up microcode from repository
Change-Id: I46021accacbb911d7a7ecfdbb52973a7da78f36e
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/Makefile.mk
2 files changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/84125/4
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Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84125?usp=email
to look at the new patch set (#3).
Change subject: soc/intel/meteorlake: Hook up microcode from repository
......................................................................
soc/intel/meteorlake: Hook up microcode from repository
Change-Id: I46021accacbb911d7a7ecfdbb52973a7da78f36e
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/intel/meteorlake/Kconfig
M src/soc/intel/meteorlake/Makefile.mk
2 files changed, 4 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/84125/3
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