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Change subject: mb/google/nissa: Add Vccin Aux Imon Iccmax setting
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Patch Set 7:
(1 comment)
Patchset:
PS7:
After check DCL, the host device id does not change in TWL soc, the switch case doesn't need to update.
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Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
......................................................................
Patch Set 33:
(2 comments)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/83354/comment/9196ce03_bd686ca1?us… :
PS30, Line 141: 0xfe02c000
> > > We have matched with PTL FSP base address. […]
why would FSP even bother to initialise the UART when we are setting UPD to PchSerialIoSkipInit to ensure FSP is not reprogramming the UART again.
> We are setting PchSerialIopci in lpss uart0 same as previous platforms.
Looking at the FSP code imo is not the correct practice for below reasons
what if tomorrow FSP decides to change this address again, how to ensure FSP and coreboot status in sync?
not everyone has FSP source code to take a look.
It would be ideal if we could keep this minimal bootloader requirement in the FSP integration guide (if possible) or if FSP could publish its own memory map so that the BL knows which addresses to avoid. In my opinion, this is just another reserved range that belongs to PCH reserved memory, so there is no need to "align" to FSP. FSP and coreboot can have different addresses as long as FSP honors the UPD (PchSerialIoSkipInit) and does not touch the UART.
> Agree on that we started discussion to bring UPD in FSPM/S where we can pass the address which FSP should use no need to see the FSP code or align to FSP. currently this UPD is part of FSPT.
File src/soc/intel/pantherlake/include/soc/iomap.h:
https://review.coreboot.org/c/coreboot/+/83354/comment/bd31b66c_403896d9?us… :
PS32, Line 19: #define SAF_BASE_ADDRESS 0xfa000000
> Hi Subrata, the doc v1.1 is not released yet for external sharing. […]
Done
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Change subject: mb/google/nissa: Add Vccin Aux Imon Iccmax default value for nissa/trulo
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Patch Set 1:
This change is ready for review.
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Change subject: mb/google/nissa: Add Vccin Aux Imon Iccmax setting
......................................................................
Patch Set 7:
(2 comments)
This change is ready for review.
Patchset:
PS6:
> Please split this into two cls […]
done in https://review.coreboot.org/c/coreboot/+/83725
File src/mainboard/google/brya/variants/baseboard/nissa/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/82682/comment/cdb2dc13_89182367?us… :
PS4, Line 96: # Vccin Aux Imon Iccmax
: register "vccin_aux_imon_iccmax" = "27000" # 27A
> We also need this for trulo. […]
I have modified the code to ensure if we don't have vccin_aux_imon_iccmax configured in the device tree, the value will remain in 27000(27A)
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Hello Julius Werner, Martin L Roth, Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69747?usp=email
to look at the new patch set (#25).
Change subject: arch/arm: Add a few ARM targets as supported by CLANG
......................................................................
arch/arm: Add a few ARM targets as supported by CLANG
Some targets cannot be supported by clang as clang generates slightly
larger binaries which the hardware won't accept.
Change-Id: I88cf8ce16fb6c61c19d615e396f5871179b06fc8
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/arm/Kconfig
M src/soc/nvidia/tegra124/Kconfig
M src/soc/qualcomm/ipq40xx/Kconfig
M src/soc/qualcomm/ipq806x/Kconfig
M src/soc/rockchip/rk3288/Kconfig
5 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/69747/25
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Change subject: arch/arm: Add a few ARM targets as supported by CLANG
......................................................................
Patch Set 24:
(1 comment)
File src/soc/nvidia/tegra124/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/69747/comment/cdad275d_c43fb6d1?us… :
PS22, Line 25: endif
> Done
I can revisit this with LTO later.
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Change subject: Kconfig: Reverse ARCH_SUPPORTS_CLANG
......................................................................
Patch Set 2: Code-Review+1
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