coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag
by Dinesh Gehlot (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Paul Menzel, Subrata Banik, Yu-Ping Wu. Dinesh Gehlot has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/83686?usp=email ) Change subject: soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag ...................................................................... Patch Set 4: (1 comment) Patchset: PS1: > > there should be vboot dependency. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/83686?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I228bc8ebf58719776f6c39e0bfbb7ad53d9bfb7f Gerrit-Change-Number: 83686 Gerrit-PatchSet: 4 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 13:00:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: security/vboot: Include new gbb flag to enforce CSE sync
by Dinesh Gehlot (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Julius Werner. Dinesh Gehlot has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/83685?usp=email ) Change subject: security/vboot: Include new gbb flag to enforce CSE sync ...................................................................... Patch Set 3: (1 comment) Patchset: PS2: > Marking this open. Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/83685?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6352959e1e898a90b4c6e12a22f8d6513f90ded9 Gerrit-Change-Number: 83685 Gerrit-PatchSet: 3 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:59:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: vc/intel/fsp2_0: Add Skeleton FSP header for PTL
by Subrata Banik (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Saurabh Mishra. Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83732?usp=email ) Change subject: vc/intel/fsp2_0: Add Skeleton FSP header for PTL ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please run dos2unix Verify that files don't contain windows line endings (lint-stable-026-line-endings): src/vendorcode/intel/fsp/fsp2_0/pantherlake/FirmwareVersionInfo.h src/vendorcode/intel/fsp/fsp2_0/pantherlake/FspProducerDataHeader.h src/vendorcode/intel/fsp/fsp2_0/pantherlake/MemInfoHob.h test failed -- To view, visit https://review.coreboot.org/c/coreboot/+/83732?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c069ba64f487259ce746dc52296618d91209602 Gerrit-Change-Number: 83732 Gerrit-PatchSet: 1 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:59:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: Update vboot submodule to upstream main
by Dinesh Gehlot (Code Review) 01 Aug '24

01 Aug '24

Dinesh Gehlot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83733?usp=email ) Change subject: Update vboot submodule to upstream main ...................................................................... Update vboot submodule to upstream main Updating from commit id 4b12d392e5b1: scripts: Add a script to convert a vbprivk to a PEM to commit id f1f70f46dc54: 2lib: Add gbb flag to enforce CSE sync -Subproject commit 4b12d392e5b12de29c582df4e717b1228e9f1594 +Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2 Change-Id: I2c5b603ce5ea49e6c1aec293960184d84eedd1e7 Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> --- M 3rdparty/vboot 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/83733/1 diff --git a/3rdparty/vboot b/3rdparty/vboot index 4b12d39..f1f70f4 160000 --- a/3rdparty/vboot +++ b/3rdparty/vboot @@ -1 +1 @@ -Subproject commit 4b12d392e5b12de29c582df4e717b1228e9f1594 +Subproject commit f1f70f46dc5482bb7c654e53ed58d4001e386df2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83733?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c5b603ce5ea49e6c1aec293960184d84eedd1e7 Gerrit-Change-Number: 83733 Gerrit-PatchSet: 1 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com>

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[S] Change in coreboot[main]: mb/google/brya/var/orisa: Remove mux references from typec port
by Subrata Banik (Code Review) 01 Aug '24

01 Aug '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83722?usp=email ) Change subject: mb/google/brya/var/orisa: Remove mux references from typec port ...................................................................... mb/google/brya/var/orisa: Remove mux references from typec port The Type-C kernel driver no longer programs the AP mux. So remove device references to the TCSS Mux control device from the Type-C port driver. BUG=b:351117685 TEST=USB-C drive can be detected after system warm or cold reboot. Change-Id: I4a24fb69ebec87f65b679cde0e4a1a8827cd365d Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83722 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/orisa/overridetree.cb 1 file changed, 1 insertion(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Dinesh Gehlot: Looks good to me, approved Eric Lai: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/orisa/overridetree.cb b/src/mainboard/google/brya/variants/orisa/overridetree.cb index 0a58b3d..89d4d2f 100644 --- a/src/mainboard/google/brya/variants/orisa/overridetree.cb +++ b/src/mainboard/google/brya/variants/orisa/overridetree.cb @@ -519,21 +519,10 @@ device ref uart0 on end device ref pch_espi on chip ec/google/chromeec - use conn0 as mux_conn[0] device pnp 0c09.0 on end end end - device ref pmc hidden - chip drivers/intel/pmc_mux - device generic 0 on - chip drivers/intel/pmc_mux/conn - use usb2_port5 as usb2_port - use tcss_usb3_port1 as usb3_port - device generic 0 alias conn0 on end - end - end - end - end + device ref pmc hidden end device ref hda on chip drivers/sof register "spkr_tplg" = "max98360a" -- To view, visit https://review.coreboot.org/c/coreboot/+/83722?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4a24fb69ebec87f65b679cde0e4a1a8827cd365d Gerrit-Change-Number: 83722 Gerrit-PatchSet: 3 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: bootsplash: Increase heap from 1 MB to 4 MB when bootsplash is enabled
by Jonathon Hall (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Felix Singer, Martin L Roth, Nico Huber, Nigel Tao, Paul Menzel. Jonathon Hall has posted comments on this change by Jonathon Hall. ( https://review.coreboot.org/c/coreboot/+/83476?usp=email ) Change subject: bootsplash: Increase heap from 1 MB to 4 MB when bootsplash is enabled ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: > I would have to ask "where would we stop?" If next time somebody runs into this […] Ah I didn't realize this persisted through OS runtime, thanks Nico. Is there somewhere we could allocate the Wuffs work area outside of the ordinary heap - where we wouldn't have this size limitation and it wouldn't persist through OS runtime? This work area isn't needed once the bootsplash is shown. Do we have any infrastructure for allocating other available memory temporarily, or could we add it? (I can work on it, but I'd appreciate suggestions where to start if you have an idea.) BTW, in combination with the issue address in patch 83475, this regression results in failure to boot if the bootsplash work area can't be allocated, where those bootsplashes worked on the older decoder. PS2: > NB. We should probably try to save the next person to run into this […] It's not based on the file size, it's based on the image resolution + chroma subsampling, as I understand it. We would probably need to rely on ImageMagick being available at build time to figure that out. Or build the Wuffs decoder for the host and run it, maybe. ImageMagick is already needed at build time if the bootsplash conversion is enabled in Kconfig, but it's not needed otherwise. Either way this still has the heap cost during OS runtime that you mentioned, which I didn't realize. If we could use some other memory for the bootsplash, which we likely have, I think it'd address both problems, no static limitation and no runtime cost. -- To view, visit https://review.coreboot.org/c/coreboot/+/83476?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia4348d39effbc16c1b42ab01bcf1e4ec5d652fa9 Gerrit-Change-Number: 83476 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nigel Tao <nigeltao(a)golang.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nigel Tao <nigeltao(a)golang.org> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:40:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Jonathon Hall <jonathon.hall(a)puri.sm> Comment-In-Reply-To: Nigel Tao <nigeltao(a)golang.org>

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[L] Change in coreboot[main]: [RFC]util/cbfstool: Rewrite trampoline in C
by Arthur Heymans (Code Review) 01 Aug '24

01 Aug '24

Arthur Heymans has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63716?usp=email ) Change subject: [RFC]util/cbfstool: Rewrite trampoline in C ...................................................................... Patch Set 4: (2 comments) Patchset: PS1: > Is there another way to make it easier to chain load from other payloads? Well I suppose you need to check if memory will overlap when loading one which I hope chainloaders do. So this is not an issue. Patchset: PS4: > Are you still working on this, or should it be abandoned? > Not right now. > What's the benefit to rewriting the code? The ASM has been tested and doesn't rely on GCC's interpretation of inline asm? > What's the benefit of coding in C rather than assembly? Also GCC is used for the assembly just as much as it is for inline assembly so I don't understand your argument about GCC interpretation of inline assembly. Making a 64bit version of this would trivial if it's compiled. Assembly would be pain. > The ASM is well tested and doesn't really change much. Then the same would apply to a C version. -- To view, visit https://review.coreboot.org/c/coreboot/+/63716?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibbd7a5ecd225edf87f451a82ff4cbe9fea522a89 Gerrit-Change-Number: 63716 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:33:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: coreboot org <coreboot.org(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[S] Change in coreboot[main]: mb/google/trulo: support ISH
by Varun Upadhyay (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Deepti Deshatty, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Li1 Feng, Nick Vaccaro, Paul Menzel, Rishika Raj, Subrata Banik, V Sowmya, Yuval Peress. Varun Upadhyay has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/83671?usp=email ) Change subject: mb/google/trulo: support ISH ...................................................................... Patch Set 3: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/83671/comment/97f88271_c8c719f6?us… : PS2, Line 10: & Configure > and configure Done https://review.coreboot.org/c/coreboot/+/83671/comment/ebc308c5_674f05e0?us… : PS2, Line 9: Define ISH main firmware name so ISH shim loader can load firmware : from file system & Configure GPIO for ISH > Please add a dot/period at the end. Done https://review.coreboot.org/c/coreboot/+/83671/comment/ff5067bd_bceb0747?us… : PS2, Line 11: > What schematics version did you use? Done File src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb: https://review.coreboot.org/c/coreboot/+/83671/comment/8be762d1_cd6492cf?us… : PS2, Line 50: trulo_ish > Let me check internally and come back. Updated to a generic name ish_fw.bin -- To view, visit https://review.coreboot.org/c/coreboot/+/83671?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id60cb416a1cce5407bd483f0ce54f477584459b1 Gerrit-Change-Number: 83671 Gerrit-PatchSet: 3 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:09:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Varun Upadhyay <varun.upadhyay(a)intel.com>

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[S] Change in coreboot[main]: mb/google/trulo: support ISH
by Varun Upadhyay (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Deepti Deshatty, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Li1 Feng, Nick Vaccaro, Rishika Raj, Subrata Banik, V Sowmya, Yuval Peress. Hello Deepti Deshatty, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Li1 Feng, Nick Vaccaro, Rishika Raj, Subrata Banik, V Sowmya, Yuval Peress, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83671?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/trulo: support ISH ...................................................................... mb/google/trulo: support ISH Define ISH main firmware name so ISH shim loader can load firmware from file system & configure GPIO for ISH in accordance with schematic_20240607. BUG=b:354607924 TEST=Boot trulo board, check that ISH is enabled and loaded lspci shows: 00:12.0 Serial controller: Intel Corporation Device 54fc Change-Id: Id60cb416a1cce5407bd483f0ce54f477584459b1 Signed-off-by: Varun Upadhyay <varun.upadhyay(a)intel.com> --- M src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb M src/mainboard/google/brya/variants/trulo/gpio.c 2 files changed, 11 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/83671/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/83671?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id60cb416a1cce5407bd483f0ce54f477584459b1 Gerrit-Change-Number: 83671 Gerrit-PatchSet: 3 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: Yuval Peress <peress(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tanu Malhotra <tanu.malhotra(a)intel.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Yuval Peress <peress(a)google.com> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Deepti Deshatty <deepti.deshatty(a)intel.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Add Panther Lake SOC support
by Saurabh Mishra (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Ashish Kumar Mishra, Felix Held, Paul Menzel, Subrata Banik. Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83419?usp=email ) Change subject: mb/google/fatcat: Add Panther Lake SOC support ...................................................................... Patch Set 33: (1 comment) Patchset: PS31: > your code is still not buildable. […] I am working on it. -- To view, visit https://review.coreboot.org/c/coreboot/+/83419?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I914f73ff06bfb801fc319b45b23d7ce4cb7a6d5e Gerrit-Change-Number: 83419 Gerrit-PatchSet: 33 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 01 Aug 2024 12:04:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit August 2024