coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: mainboard/google/brox: Add FW_CONFIG and SKU definitions to support l...
by Bob Moragues (Code Review) 01 Aug '24

01 Aug '24

Bob Moragues has posted comments on this change by Bob Moragues. ( https://review.coreboot.org/c/coreboot/+/82630?usp=email ) Change subject: mainboard/google/brox: Add FW_CONFIG and SKU definitions to support lotso ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/brox/variants/brox/overridetree.cb: https://review.coreboot.org/c/coreboot/+/82630/comment/5c4bd1c5_1b578ff3?us… : PS3, Line 19: option AUDIO_REALTEK_ALC3287 2 > Yeah, as Shelley pointed out each variant can have its own FW_CONFIG and hence no need to align them […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82630?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I52cf42b79eff91ab2b4e98a7b5961310e60f2ea7 Gerrit-Change-Number: 82630 Gerrit-PatchSet: 3 Gerrit-Owner: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bob Moragues <moragues(a)google.com> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:38:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Comment-In-Reply-To: Bob Moragues <moragues(a)google.com> Comment-In-Reply-To: Karthik Ramasubramanian <kramasub(a)google.com>

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[XS] Change in coreboot[master]: mb/google/trogdor: Add new vaviant mrbland
by Bob Moragues (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Julius Werner, Xuxin Xiong. Bob Moragues has posted comments on this change by zanxi chen. ( https://review.coreboot.org/c/coreboot/+/55782?usp=email ) Change subject: mb/google/trogdor: Add new vaviant mrbland ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/55782?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93b74e79188bd0cc36c8b48e552230ae0d6f593a Gerrit-Change-Number: 55782 Gerrit-PatchSet: 2 Gerrit-Owner: zanxi chen <chenzanxi(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-CC: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:36:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[master]: mb/google/trogdor: Add new configs homestar
by Bob Moragues (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Julius Werner, Wai-Hong Tam, Xuxin Xiong. Bob Moragues has posted comments on this change by Xuxin Xiong. ( https://review.coreboot.org/c/coreboot/+/51004?usp=email ) Change subject: mb/google/trogdor: Add new configs homestar ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0f9b6c89198a882acae7191d08b166eb8c1dd71 Gerrit-Change-Number: 51004 Gerrit-PatchSet: 9 Gerrit-Owner: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Wai-Hong Tam <waihong(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Douglas Anderson <dianders(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Wai-Hong Tam <waihong(a)google.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:36:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: mb/dell/optiplex_9020: Implement late HWM initialization
by Máté Kukri (Code Review) 01 Aug '24

01 Aug '24

Máté Kukri has posted comments on this change by Máté Kukri. ( https://review.coreboot.org/c/coreboot/+/81529?usp=email ) Change subject: mb/dell/optiplex_9020: Implement late HWM initialization ...................................................................... Patch Set 11: (1 comment) File src/mainboard/dell/optiplex_9020/mainboard.c: https://review.coreboot.org/c/coreboot/+/81529/comment/c16b5aab_5944f7af?us… : PS11, Line 310: / rapl_power_unit > > I think the low 4 bits of MSR_RAPL_POWER_UNIT are simply never 0 on the hardware in question (And […] I had a bit of a brain fart there, i dont know why i read `1 << (rapl_power_unit - 1)`.... But taking into account that it's actually the one starting with `2`, your original suggestion is the way to go, will post patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/81529?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibdccd3fc7364e03e84ca606592928410624eed43 Gerrit-Change-Number: 81529 Gerrit-PatchSet: 11 Gerrit-Owner: Máté Kukri <km(a)mkukri.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Leah Rowe <leahleahrowerowe(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:35:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Máté Kukri <km(a)mkukri.xyz>

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[XS] Change in coreboot[main]: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile
by Elyes Haouas (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Nico Huber. Elyes Haouas has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/83693?usp=email ) Change subject: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > > After how much time can we consider that the GCC FLAG can be added to Makefile. […] No problem if you think that 'util/xcompile/xcompile' is the right place for GCC FLAGs -- To view, visit https://review.coreboot.org/c/coreboot/+/83693?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02982769ae2c356f037a747e85d155368bfcb730 Gerrit-Change-Number: 83693 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:24:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[L] Change in coreboot[main]: [RFC]util/cbfstool: Rewrite trampoline in C
by Martin L Roth (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Arthur Heymans. Martin L Roth has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/63716?usp=email ) Change subject: [RFC]util/cbfstool: Rewrite trampoline in C ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: Hey Arthur, this patch was looked at during the bi-weekly group review meeting and the comments came from the entire group. You marked the patch as RFC, which is why we commented. I don't think anyone was necessarily against this update, people were just pointing out possible issues - which are the same for every time we refactor working code or port something from pure ASM to inline ASM. There was a concern about the GCC team's choices for inline assembly which is where the comment came from. We rely on it pretty heavily at this point though, so if it's going to break here, it's likely to break elsewhere as well. > Making a 64bit version of this would trivial if it's compiled. Assembly would be pain. I think this is a good argument for the switch, or at least for using this code for 64-bit booting. >> The ASM is well tested and doesn't really change much. > Then the same would apply to a C version. The point of that comment was that ASM version has been around for over a decade. In a decade, the C version could say the same, but the longevity of the C version has not yet been stress tested. If this is a concern to people, we could use the C version for x64 until there's confidence and its use could be expanded to the full x86 platform. Additionally, we can further vet the patch by looking at the output from a few generations of GCC to verify that the ASM output by the C version does the same thing as the ASM version. Since you're not currently working on this, should it be marked WIP until you're ready to pick it up again? -- To view, visit https://review.coreboot.org/c/coreboot/+/63716?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibbd7a5ecd225edf87f451a82ff4cbe9fea522a89 Gerrit-Change-Number: 63716 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:22:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: coreboot org <coreboot.org(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[XS] Change in coreboot[main]: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile
by Arthur Heymans (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Elyes Haouas, Martin L Roth, Nico Huber. Arthur Heymans has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/83693?usp=email ) Change subject: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > After how much time can we consider that the GCC FLAG can be added to Makefile.mk and removed from 'util/xcompile/xcompile'? > > If we continue to add new GCC flags without removing them at some point, we will end up having the majority of GCC flags in 'xcompile' what's the problem with that? -- To view, visit https://review.coreboot.org/c/coreboot/+/83693?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02982769ae2c356f037a747e85d155368bfcb730 Gerrit-Change-Number: 83693 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 01 Aug 2024 18:11:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[L] Change in coreboot[main]: vc/intel/fsp2_0: Add Skeleton FSP header for PTL
by Subrata Banik (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Saurabh Mishra. Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83732?usp=email ) Change subject: vc/intel/fsp2_0: Add Skeleton FSP header for PTL ...................................................................... Patch Set 3: Code-Review+1 (1 comment) File src/vendorcode/intel/fsp/fsp2_0/pantherlake/FspmUpd.h: https://review.coreboot.org/c/coreboot/+/83732/comment/035bf6cb_ddfb462d?us… : PS3, Line 43: /// : /// The ChipsetInit Info structure provides the information of ME ChipsetInit CRC and BIOS ChipsetInit CRC. : /// : typedef struct { : UINT8 Revision; ///< Chipset Init Info Revision : UINT8 Rsvd[3]; ///< Reserved : UINT16 MeChipInitCrc; ///< 16 bit CRC value of MeChipInit Table : UINT16 BiosChipInitCrc; ///< 16 bit CRC value of PchChipInit Table : } CHIPSET_INIT_INFO; : do we have a consumer for this ? -- To view, visit https://review.coreboot.org/c/coreboot/+/83732?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c069ba64f487259ce746dc52296618d91209602 Gerrit-Change-Number: 83732 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 17:59:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: vc/intel/fsp2_0: Add Skeleton FSP header for PTL
by Subrata Banik (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Saurabh Mishra. Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83732?usp=email ) Change subject: vc/intel/fsp2_0: Add Skeleton FSP header for PTL ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: this should be the base CL IMO -- To view, visit https://review.coreboot.org/c/coreboot/+/83732?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c069ba64f487259ce746dc52296618d91209602 Gerrit-Change-Number: 83732 Gerrit-PatchSet: 3 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Comment-Date: Thu, 01 Aug 2024 17:58:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Subrata Banik (Code Review) 01 Aug '24

01 Aug '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Elyes Haouas, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun. Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... Patch Set 35: (1 comment) File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/83354/comment/818eb259_d2e21928?us… : PS30, Line 141: 0xfe02c000 > why would FSP even bother to initialise the UART when we are setting UPD to PchSerialIoSkipInit to ensure FSP is not reprogramming the UART again. > > We are setting PchSerialIopci in lpss uart0 same as previous platforms. I will try setting PchSerialIoSkipInit for MTL and share my feedback. > > Looking at the FSP code imo is not the correct practice for below reasons > > what if tomorrow FSP decides to change this address again, how to ensure FSP and coreboot status in sync? > not everyone has FSP source code to take a look. > > It would be ideal if we could keep this minimal bootloader requirement in the FSP integration guide (if possible) or if FSP could publish its own memory map so that the BL knows which addresses to avoid. In my opinion, this is just another reserved range that belongs to PCH reserved memory, so there is no need to "align" to FSP. FSP and coreboot can have different addresses as long as FSP honors the UPD (PchSerialIoSkipInit) and does not touch the UART. > > Agree on that we started discussion to bring UPD in FSPM/S where we can pass the address which FSP should use no need to see the FSP code or align to FSP. currently this UPD is part of FSPT. we don't use FSP-T hence, ideally this is not applicable to us. -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 35 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 01 Aug 2024 17:57:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit August 2024