coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: UPSTREAM: PPM: Enable driver by default
by ChromeOS coreboot bot (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Caveh Jalali, Forest Mittelberg. ChromeOS coreboot bot has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83741?usp=email ) Change subject: UPSTREAM: PPM: Enable driver by default ...................................................................... UPSTREAM: PPM: Enable driver by default Change the behavior of the CBI bit to disable UCSI instead of enable it. As a result, the PPM driver will be enabled by default. BUG=b:319124515 TEST=Confirm cros_ec_ucsi runs successfully with CBI bit unset LOW_COVERAGE_REASON=Will add via b:335261254 Original-Change-Id: I0e8f83a42cc6a5f8be3cee19dd671fbdaa0c8620 Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/5646872 Original-Code-Coverage: Zoss <zoss-cl-coverage(a)prod.google.com> Original-Reviewed-by: Keith Short <keithshort(a)chromium.org> Original-Commit-Queue: Abhishek Pandit-Subedi <abhishekpandit(a)google.com> Original-Tested-by: Abhishek Pandit-Subedi <abhishekpandit(a)google.com> GitOrigin-RevId: 433f78dcdf5bfc3ebba8d051aa864659b7061da7 Change-Id: Ibf372813a81ae98e67dc58a93d3ad6b392bb864a --- M src/ec/google/chromeec/ec_commands.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/83741/1 diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index 715f94c..71cd287 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -6492,7 +6492,7 @@ union ec_common_control { struct { - uint32_t ucsi_enabled : 1; + uint32_t ucsi_disabled : 1; }; uint32_t raw_value; }; -- To view, visit https://review.coreboot.org/c/coreboot/+/83741?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibf372813a81ae98e67dc58a93d3ad6b392bb864a Gerrit-Change-Number: 83741 Gerrit-PatchSet: 1 Gerrit-Owner: ChromeOS coreboot bot <chromeos-coreboot-bot(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-CC: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Forest Mittelberg <bmbm(a)google.com>

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[M] Change in coreboot[main]: acpi: add support for reading long battery strings
by ChromeOS coreboot bot (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Caveh Jalali, Forest Mittelberg, Jon Murphy, Karthik Ramasubramanian. ChromeOS coreboot bot has uploaded a new patch set (#3) to the change originally created by Jon Murphy. ( https://review.coreboot.org/c/coreboot/+/83526?usp=email ) The following approvals got outdated and were removed: Code-Review-1 by Caveh Jalali, Verified+1 by build bot (Jenkins) Change subject: acpi: add support for reading long battery strings ...................................................................... acpi: add support for reading long battery strings This adds EC_ACPI_MEM_STRINGS_FIFO, a method for host firmware to read arbitrarily long battery information strings (or any other string, but currently only supporting battery strings). On ACPI platforms, the host generally reads battery information from a shared memory region where the strings are limited to 8 bytes in length. Expanding those would consume a large fraction of the available shared memory space (limited to 256 bytes), so this implements an ACPI command (based on the ACPI Embedded Controller Interface Specification) allowing the host to read strings of any length while consuming only one byte of ACPI memory space. Although the EC also supports reading long strings using host commands (EC_CMD_BATTERY_GET_STATIC), host commands are assumed to be the exclusive domain of the OS and unavailable to AP firmware because it would require careful cooperation (locking) to ensure that firmware and other software cannot interfere with each other's host commands. BUG=b:339171261 TEST=on yaviks, the EC console logs FIFO readout messages when used in ACPI and correct strings are shown in the OS. Original-Cq-Depend: chromium:5599370,chromium:5605867,chromium:5605868 Original-Change-Id: Ibb3d4115f7d5c6b6c2512deb4e53077a48a355e3 Original-Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/5581473 Original-Reviewed-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Commit-Queue: Peter Marheine <pmarheine(a)chromium.org> Original-Code-Coverage: Zoss <zoss-cl-coverage(a)prod.google.com> Original-Tested-by: Peter Marheine <pmarheine(a)chromium.org> GitOrigin-RevId: 22e6b9a3ef43132f10e77bd5845b648fdbd387f1 Change-Id: I871433c66cefe5522f9ff942841518e0d6654ca3 Signed-off-by: Jon Murphy <jpmurphy(a)google.com> --- M src/ec/google/chromeec/ec_commands.h 1 file changed, 59 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/83526/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/83526?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I871433c66cefe5522f9ff942841518e0d6654ca3 Gerrit-Change-Number: 83526 Gerrit-PatchSet: 3 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Forest Mittelberg <bmbm(a)google.com>

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[S] Change in coreboot[main]: mb/google/nissa: Add Vccin Aux Imon Iccmax setting
by Eric Lai (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Daniel Peng, Derek Huang, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Rishika Raj, Simon Yang, Subrata Banik, Sumeet R Pawnikar. Eric Lai has posted comments on this change by Simon Yang. ( https://review.coreboot.org/c/coreboot/+/82682?usp=email ) Change subject: mb/google/nissa: Add Vccin Aux Imon Iccmax setting ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82682/comment/dd2d6420_9666669c?us… : PS8, Line 7: mb/google/nissa soc/intel/adl? -- To view, visit https://review.coreboot.org/c/coreboot/+/82682?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0651f0eb8a5c32b27c524e43bbf6f2a184b95657 Gerrit-Change-Number: 82682 Gerrit-PatchSet: 8 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 02:51:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/nissa: Add Vccin Aux Imon Iccmax default value for nissa/trulo
by Eric Lai (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Derek Huang, Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Rishika Raj, Simon Yang. Eric Lai has posted comments on this change by Simon Yang. ( https://review.coreboot.org/c/coreboot/+/83725?usp=email ) Change subject: mb/google/nissa: Add Vccin Aux Imon Iccmax default value for nissa/trulo ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83725?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaedd34757aa6802edcae402e751bc39b9cfe9e0c Gerrit-Change-Number: 83725 Gerrit-PatchSet: 2 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 02:50:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: arch/arm64/armv8/mmu: Improve log format
by Julius Werner (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Yu-Ping Wu. Julius Werner has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/83652?usp=email ) Change subject: arch/arm64/armv8/mmu: Improve log format ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83652/comment/8d0f00f3_bb0bd42b?us… : PS2, Line 9: When using format string with "%p", "(nil)" will be printed for address > The `(nil)` is only one reason, and I already removed it from the commit message. […] I mean, in that case I feel like %013p would fit better than casting everything. But okay. I don't want to nitpick too much. -- To view, visit https://review.coreboot.org/c/coreboot/+/83652?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib29c201e1b096b9c7cd750d2541923616bc858ac Gerrit-Change-Number: 83652 Gerrit-PatchSet: 3 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 02:16:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: mb/google/brox/var/greenbayupoc: update ALC236 verb table
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83465?usp=email ) Change subject: mb/google/brox/var/greenbayupoc: update ALC236 verb table ...................................................................... mb/google/brox/var/greenbayupoc: update ALC236 verb table The previous uploaded verb table is not fully applied due to configuration error. Uploaded the verb table provided by Realtek which can be found in b:336967284. BUG=b:326412504, b:336967284 TEST=deploy and check volume Change-Id: Ib9a8248c4a437fd204f40918d801a4a010a5c4df Signed-off-by: Wu Garen <wu.garen(a)inventec.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83465 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Shelley Chen <shchen(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> Reviewed-by: Terry Cheong <htcheong(a)chromium.org> --- M src/mainboard/google/brox/variants/greenbayupoc/include/variant/hda_verb.h 1 file changed, 53 insertions(+), 69 deletions(-) Approvals: Shelley Chen: Looks good to me, approved Terry Cheong: Looks good to me, but someone else must approve build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved diff --git a/src/mainboard/google/brox/variants/greenbayupoc/include/variant/hda_verb.h b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/hda_verb.h index 79c81d1..93e27ef 100644 --- a/src/mainboard/google/brox/variants/greenbayupoc/include/variant/hda_verb.h +++ b/src/mainboard/google/brox/variants/greenbayupoc/include/variant/hda_verb.h @@ -9,7 +9,7 @@ /* coreboot specific header */ 0x10ec0236, // Codec Vendor / Device ID: Realtek ALC236 0x103C8C60, // Subsystem ID - 0x00000013, // Number of jacks (NID entries) + 0x00000017, // Number of jacks (NID entries) AZALIA_RESET(0x1), /* NID 0x01, HDA Codec Subsystem ID Verb table */ @@ -24,6 +24,15 @@ * AZALIA_PIN_CFG(0, 0x12, 0x90A60130), * AZALIA_PIN_CFG(0, 0x13, 0x40000000), */ + /* 1 bit reset */ + 0x0205001A, + 0x0204C003, + 0x0205001A, + 0x02048003, + 0x0205007F, + 0x02046001, + 0x0205007F, + 0x02040001, /* Pin widget 0x14 - Front (Port-D) */ AZALIA_PIN_CFG(0, 0x14, 0x90170110), @@ -43,22 +52,7 @@ AZALIA_PIN_CFG(0, 0x21, 0x03211040), /* - * ;Pin widget 0x19 - MIC2 (Port-F) - */ - 0x01971C20, - 0x01971D10, - 0x01971EA1, - 0x01971F03, - /* - * Pin widget 0x21 - HP1-OUT (Port-I) - */ - 0x02171C40, - 0x02171D10, - 0x02171E21, - 0x02171F03, - /* * Widget node 0x20 - 1 - * Codec hidden reset and speaker power 2W/4ohm */ 0x0205003C, 0x02040354, @@ -66,7 +60,7 @@ 0x02040314, /* * Widget node 0x20 - 2 - * Class D power on Reset + * Set JD2 pull high */ 0x0205001B, 0x02040A4B, @@ -74,71 +68,61 @@ 0x02047778, /* * Widget node 0x20 - 3 - * Disable AGC and set AGC limit to -1.5dB */ 0x02050046, 0x02040004, 0x05750003, 0x057409A3, - /* - * Widget node 0x20 - 4 - * Set AGC Post gain +1.5dB then Enable AGC - */ - 0x02050013, - 0x02044023, + /* disable EQ first */ + 0x05350000, + 0x0534201A, + /* Left Channel */ + 0x0535001d, + 0x05340800, + 0x0535001e, + 0x05340800, + 0x05350003, + 0x05341F7B, + 0x05350004, + 0x05340000, + /* Right Channel */ + 0x05450000, + 0x05442000, + 0x0545001d, + 0x05440800, + 0x0545001e, + 0x05440800, + 0x05450003, + 0x05441F7B, + 0x05450004, + 0x05440000, + /* enable EQ */ + 0x05350000, + 0x0534E01A, + /* 1.8W/4ohm */ + 0x02050038, + 0x02047901, + /* AGC Enable */ + 0x0205004C, + 0x0204465C, 0x02050016, - 0x02040E50, - /* - * Widget node 0x20 - 5 - * Silence detector enabling + Set EAPD to verb control - */ - 0x02050037, - 0x0204FE15, - 0x02050010, - 0x02040020, - /* - * Widget node 0x20 - 6 - * Silence data mode Threshold (-90dB) - */ - 0x02050030, - 0x0204A000, - 0x0205001B, - 0x02040A4B, - /* - * Widget node 0x20 - 7 - * Default setting - 1 - */ - 0x05750003, - 0x05740DA3, - 0x02050046, - 0x02040004, - /* - * Widget node 0x20 - 8 - * support 1 pin detect two port - */ - 0x02050009, - 0x0204E003, - 0x0205000A, - 0x02047770, - /* - * Widget node 0x20 - 9 - * To set LDO1/LDO2 as default (used for headset) - */ - 0x02050008, - 0x0204EA0C, - 0x02050008, - 0x0204EA0C, + 0x02044E50, + 0x02050020, + 0x020451FF, + /* Headphone Pop */ + 0x05750007, + 0x057412B2, }; const u32 pc_beep_verbs[] = { /* Dos beep path - 1 */ - 0x01470C00, 0x02050036, 0x02047151, - 0x01470740, + 0x02050010, + 0x02040020, /* Dos beep path - 2 */ - 0x0143b000, - 0x01470C02, + 0x0143B000, + 0x01470740, 0x01470C02, 0x01470C02, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/83465?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib9a8248c4a437fd204f40918d801a4a010a5c4df Gerrit-Change-Number: 83465 Gerrit-PatchSet: 2 Gerrit-Owner: Garen Wu <wu.garen(a)inventec.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Terry Cheong <htcheong(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eren Peng <peng.eren(a)inventec.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/brox/var/brox: Enable Class-D calibration
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82794?usp=email ) Change subject: mb/google/brox/var/brox: Enable Class-D calibration ...................................................................... mb/google/brox/var/brox: Enable Class-D calibration DC offset of class-D amplifier is 7mV in Brox which is larger than the expected 3mV. Add a section in the verb table to enable class-D calibration based on the updated verb table provided by Realtek in b:342506575 comment#6. This improves the offset to be less than 1mV. BUG=b:342506575 BRANCH=main TEST=Verify DC offset of speaker amplier output is less than 1mV with a multimeter when \ playing -100dB sine waves. Change-Id: I776f5c24ce3c829cbd64840957c1431608cf2b85 Signed-off-by: Terry Cheong <htcheong(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82794 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Shelley Chen <shchen(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h 1 file changed, 6 insertions(+), 1 deletion(-) Approvals: Shelley Chen: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h b/src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h index c0b0eb0..7cf01c2 100644 --- a/src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h +++ b/src/mainboard/google/brox/variants/brox/include/variant/hda_verb.h @@ -9,7 +9,7 @@ /* coreboot specific header */ 0x10ec0256, // Codec Vendor / Device ID: Realtek ALC256 0x10ec12ac, // Subsystem ID - 0x00000013, // Number of jacks (NID entries) + 0x00000014, // Number of jacks (NID entries) AZALIA_RESET(0x1), /* NID 0x01, HDA Codec Subsystem ID Verb table */ @@ -113,6 +113,11 @@ 0x02046A0C, 0x02050008, 0x02046A0C, + /* Class-D calibration */ + 0x05850000, + 0x0584F880, + 0x05850000, + 0x0584F880, }; const u32 pc_beep_verbs[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/82794?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I776f5c24ce3c829cbd64840957c1431608cf2b85 Gerrit-Change-Number: 82794 Gerrit-PatchSet: 8 Gerrit-Owner: Terry Cheong <htcheong(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: util/cbfstool/common.h Fix wrong return value doc
by Elyes Haouas (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Maximilian Brune. Elyes Haouas has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/83616?usp=email ) Change subject: util/cbfstool/common.h Fix wrong return value doc ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83616?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9f8653aa805c62eb4bfc3560d7880921830c2c59 Gerrit-Change-Number: 83616 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 01:15:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/dell/optiplex_9020: Fix 0-division and unintended truncation in pa...
by Elyes Haouas (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Máté Kukri, Nico Huber. Elyes Haouas has posted comments on this change by Máté Kukri. ( https://review.coreboot.org/c/coreboot/+/83736?usp=email ) Change subject: mb/dell/optiplex_9020: Fix 0-division and unintended truncation in package power calculation ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83736?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48ef59c4fbeb0a55675ac24da31e6e0b194cb58d Gerrit-Change-Number: 83736 Gerrit-PatchSet: 2 Gerrit-Owner: Máté Kukri <km(a)mkukri.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Máté Kukri <km(a)mkukri.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 02 Aug 2024 01:07:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd: add PSP SMI handler stub
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, ritul guru. Hello Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, ritul guru, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83739?usp=email to look at the new patch set (#2). Change subject: soc/amd: add PSP SMI handler stub ...................................................................... soc/amd: add PSP SMI handler stub The PSP can send SMIs to the x86 side to have the SMI handler service requests from the PSP. This commit adds an empty PSP SMI handler; the actual implementation is added in later patches to keep the patches relatively small. This patch is a slightly modified version of parts of CB:65523. Test=When selecting SOC_AMD_COMMON_BLOCK_PSP_SMI, Mandolin still builds Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad --- M src/soc/amd/cezanne/smihandler.c M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.mk A src/soc/amd/common/block/psp/psp_smi.c M src/soc/amd/common/block/psp/psp_smm.c M src/soc/amd/genoa_poc/smihandler.c M src/soc/amd/glinda/smihandler.c M src/soc/amd/mendocino/smihandler.c M src/soc/amd/phoenix/smihandler.c M src/soc/amd/picasso/smihandler.c 11 files changed, 52 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/83739/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83739?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad Gerrit-Change-Number: 83739 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>

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coreboot-gerrit August 2024