coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Nico Huber has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email ) Change subject: soc/intel/xeon_sp: Reserve MMIO high range ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > Emm, I need some time to do some thinking around your inputs. Nico, may I have an example of coreboot allocated domain resource window? Examples are probably in coreboot's past, e.g. HyperTransport support. Might not be worth to look into, though, as the code wasn't the best. It generally depends on the order of things in coreboot's execution sequence. If you only need it late, for instance, I see no problem in treating these things like any other bridge window (i.e. having only a single resource domain). OTOH, if you need it earlier, there would have to be some additional code. Though, once those "domains" are in the devicetree, expressed in coreboot's structures, there wouldn't be anything in the way to write common code (e.g. a simple loop over all domains that partitions the available space). > BTW, should we merge this change in parallel while continuing the discussion? Sure. If I mark something as resolved (and write "Side note" or such), I really don't mean to hold anything back. Somebody with more insight into FSP should probably ack this patch, though. -- To view, visit https://review.coreboot.org/c/coreboot/+/83538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Gerrit-Change-Number: 83538 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 13:32:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range
by Shuo Liu (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email ) Change subject: soc/intel/xeon_sp: Reserve MMIO high range ...................................................................... Patch Set 4: (2 comments) Patchset: PS2: > I was referring to the bigger picture. FSP assigns resources, that's the […] Emm, I need some time to do some thinking around your inputs. Nico, may I have an example of coreboot allocated domain resource window? BTW, should we merge this change in parallel while continuing the discussion? Commit Message: https://review.coreboot.org/c/coreboot/+/83538/comment/ca3d7a48_9a7903eb?us… : PS1, Line 7: soc/intel/xeon_sp: Reserve FSP MMIO high window > > For 'non PCI domain MMIOs', they are used for misc devices belonged to an IIO stack but not belong […] They are known to coreboot, either in forms of named MMIO ranges (e.g. VT-d BAR), or reserved MMIO ranges (visible but not usable). -- To view, visit https://review.coreboot.org/c/coreboot/+/83538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Gerrit-Change-Number: 83538 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 13:08:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[XS] Change in coreboot[main]: Makefile.mk: Remove linker warning on RWX segments
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans. Nico Huber has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/83559?usp=email ) Change subject: Makefile.mk: Remove linker warning on RWX segments ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Thanks. Yes we plan to upgrade binutils in ChromiumOS. […] `xcompile` kind of abstracts the toolchain version. It has code for exactly the kind of check that is needed here. `Makefile.mk` should have all the options that are common across all (supported) toolchain versions. I think it's right to keep support for at least some older toolchain versions. We should go ahead with CB:83693 anyway. If you could test if it fixes your issue, that'd be nice :) -- To view, visit https://review.coreboot.org/c/coreboot/+/83559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e0f51c69dabaea314ac45924474d446a9ab68f4 Gerrit-Change-Number: 83559 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 02 Aug 2024 13:07:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: util/autoport: Put devicetree devices above chips
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Angel Pons, Nicholas Chin. Nico Huber has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/82406?usp=email ) Change subject: util/autoport: Put devicetree devices above chips ...................................................................... Patch Set 5: Code-Review+2 (1 comment) Patchset: PS5: Leaving the other comment open. When tested, it can be submitted as is, I guess. -- To view, visit https://review.coreboot.org/c/coreboot/+/82406?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9dc2ff13182ff9d92141b1736796749cea49d23a Gerrit-Change-Number: 82406 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:59:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: util/autoport: Use sudo to call log-making programs
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Angel Pons, Nicholas Chin. Nico Huber has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/82404?usp=email ) Change subject: util/autoport: Use sudo to call log-making programs ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82404?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4bf4ddf8dd2cb930e9b7303e2ea986d8c072aa7a Gerrit-Change-Number: 82404 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:57:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: util/autoport: Streamline external program invocation
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Angel Pons, Nicholas Chin, Patrick Rudolph. Nico Huber has posted comments on this change by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/82403?usp=email ) Change subject: util/autoport: Streamline external program invocation ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82403?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I144bdf609e0aebd8f6ddebc0eb1216bedebfa313 Gerrit-Change-Number: 82403 Gerrit-PatchSet: 6 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:56:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Nico Huber has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email ) Change subject: soc/intel/xeon_sp: Reserve MMIO high range ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: I was referring to the bigger picture. FSP assigns resources, that's the big mistake. The details don't matter that much. What IMO matters is that "if Intel wants FSP to be responsible for something and that makes develo- per's work harder, they should at least have the decency to document what FSP does." > Another aspect is that, if other SoCs has similar needs of using MMIO high, maybe some common changes could be justified then? To my knowledge Xeon-SP is the only platform in coreboot that hides resource assignments in FSP. How make common code if everything else is different? I don't see any other platform that needs this kind of special treatment. The only effort that is justifiable IMO, is to adapt coreboot's resource allocation to the Xeon-SP needs (if that is necessary at all). Doing any resource assignments in FSP and any related effort is not justifiable to me. It's just endless overhead and burden. We could avoid a lot of redun- dant code, guessing and misunderstandings if FSP would not do what it shouldn't do. (I assume Intel had the same discussions for client platforms already, btw.) -- To view, visit https://review.coreboot.org/c/coreboot/+/83538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Gerrit-Change-Number: 83538 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:45:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Reserve MMIO high range
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Nico Huber has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/83538?usp=email ) Change subject: soc/intel/xeon_sp: Reserve MMIO high range ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83538/comment/012841b7_9d174b70?us… : PS1, Line 7: soc/intel/xeon_sp: Reserve FSP MMIO high window > For 'non PCI domain MMIOs', they are used for misc devices belonged to an IIO stack but not belonged to any PCIe domains under that stack. For Gen6, VTd BAR is counted to this class, similarly is the CXL host bridge control register BAR. > What I don't get: Are these resources not known to coreboot? If they are known, they shouldn't cause segmentation. If they are not known to coreboot, that's a bug. -- To view, visit https://review.coreboot.org/c/coreboot/+/83538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib2a0e1f1f13e797c1fab6aca589d060c4d3fa15b Gerrit-Change-Number: 83538 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:28:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[M] Change in coreboot[main]: soc/amd: add PSP SMI handler stub
by Nico Huber (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Varshit Pandya, ritul guru. Nico Huber has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/83739?usp=email ) Change subject: soc/amd: add PSP SMI handler stub ...................................................................... Patch Set 2: Code-Review+1 (3 comments) File src/soc/amd/cezanne/smihandler.c: https://review.coreboot.org/c/coreboot/+/83739/comment/d121087d_efae0491?us… : PS2, Line 116: psp_smi_handler Stubbing `psp_smi_handler()` in the header file once would avoid the `#if` in all the C files. It would add some unnecessary data to the binary when the Kconfig is disabled, though. So no strong preference on my end. File src/soc/amd/common/block/psp/Kconfig: https://review.coreboot.org/c/coreboot/+/83739/comment/6be9e14c_9121f854?us… : PS2, Line 108: SPI flash after the BOOT_DONE PSP command. NB. Making this some kind of append-only and only erase during boot, for instance, could avoid the problem. File src/soc/amd/common/block/psp/psp_smm.c: https://review.coreboot.org/c/coreboot/+/83739/comment/ba48727a_1aa39f08?us… : PS2, Line 94: configure_psp_smi(); Is it necessary to do this in SMM? Don't know much about the amd/soc/ code, but after a quick look, it doesn't seem like configure_smi() is usually called from SMM. -- To view, visit https://review.coreboot.org/c/coreboot/+/83739?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad Gerrit-Change-Number: 83739 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 02 Aug 2024 12:18:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: commonlib/device_tree.c: Remove incorrect warning
by Maximilian Brune (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Julius Werner, Paul Menzel. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/83085?usp=email ) Change subject: commonlib/device_tree.c: Remove incorrect warning ...................................................................... Patch Set 5: (1 comment) File src/lib/device_tree.c: https://review.coreboot.org/c/coreboot/+/83085/comment/baedc565_0dfd7f42?us… : PS1, Line 363: if (count_results > results_len) { > Hmm... […] Agreed. I removed the warning and updated the commit-msg accordingly. -- To view, visit https://review.coreboot.org/c/coreboot/+/83085?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic1111e8acb72ea1e9159da0d8386f40cbbdbc63f Gerrit-Change-Number: 83085 Gerrit-PatchSet: 5 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 02 Aug 2024 11:31:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com>

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coreboot-gerrit August 2024