coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/amd: add PSP SMI handler stub
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Nico Huber, Varshit Pandya, ritul guru. Hello Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Nico Huber, Varshit Pandya, build bot (Jenkins), ritul guru, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83739?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins) Change subject: soc/amd: add PSP SMI handler stub ...................................................................... soc/amd: add PSP SMI handler stub The PSP can send SMIs to the x86 side to have the SMI handler service requests from the PSP. This commit adds an empty PSP SMI handler; the actual implementation is added in later patches to keep the patches relatively small. This patch is a slightly modified version of parts of CB:65523. Test=When selecting SOC_AMD_COMMON_BLOCK_PSP_SMI, Mandolin still builds Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad --- M src/soc/amd/cezanne/smihandler.c M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/common/block/psp/Makefile.mk A src/soc/amd/common/block/psp/psp_smi.c M src/soc/amd/common/block/psp/psp_smm.c M src/soc/amd/genoa_poc/smihandler.c M src/soc/amd/glinda/smihandler.c M src/soc/amd/mendocino/smihandler.c M src/soc/amd/phoenix/smihandler.c M src/soc/amd/picasso/smihandler.c 11 files changed, 44 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/83739/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/83739?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad Gerrit-Change-Number: 83739 Gerrit-PatchSet: 3 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>

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[XS] Change in coreboot[main]: mb/google/brox: Tune Touchpad I2C parameters
by Jon Murphy (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Bob Moragues, Karthik Ramasubramanian, Nick Vaccaro. Jon Murphy has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/83755?usp=email ) Change subject: mb/google/brox: Tune Touchpad I2C parameters ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83755?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0006bfb9bb5839ffa1248d9f2ea055160ed0936e Gerrit-Change-Number: 83755 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 15:58:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brox: Tune Touchpad I2C parameters
by Karthik Ramasubramanian (Code Review) 02 Aug '24

02 Aug '24

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83755?usp=email ) Change subject: mb/google/brox: Tune Touchpad I2C parameters ...................................................................... mb/google/brox: Tune Touchpad I2C parameters Adjust Touchpad I2C fall time configuration such that it meets the I2C fast mode specification. BUG=b:328670295 TEST=Build Brox BIOS image and boot to OS. Confirm the I2C bus frequency, rise and fall times meet the specification. Change-Id: I0006bfb9bb5839ffa1248d9f2ea055160ed0936e Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/83755/1 diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb index 89c714d..9fbf743 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb +++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb @@ -103,7 +103,7 @@ .i2c[0] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 650, - .fall_time_ns = 350, + .fall_time_ns = 330, .data_hold_time_ns = 50, }, .i2c[1] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/83755?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0006bfb9bb5839ffa1248d9f2ea055160ed0936e Gerrit-Change-Number: 83755 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>

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[XS] Change in coreboot[main]: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile
by Elyes Haouas (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Arthur Heymans, Nico Huber. Elyes Haouas has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/83693?usp=email ) Change subject: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: > It's the right place for any flag that we need to set and that is not supported […] Thx -- To view, visit https://review.coreboot.org/c/coreboot/+/83693?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I02982769ae2c356f037a747e85d155368bfcb730 Gerrit-Change-Number: 83693 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 02 Aug 2024 15:47:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Elyes Haouas, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Subrata Banik, Tarun. Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... Patch Set 36: (1 comment) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/83354/comment/ef5e0194_4872ab67?us… : PS32, Line 19: #define SAF_BASE_ADDRESS 0xfa000000 > > Done […] Sure Subrata, let me check with the team and i will update on the crosbug. -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 36 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 02 Aug 2024 15:38:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: mb/google/brox: Add model brox-ti-pdc
by Bob Moragues (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Jon Murphy, Karthik Ramasubramanian, Nick Vaccaro. Bob Moragues has posted comments on this change by Jon Murphy. ( https://review.coreboot.org/c/coreboot/+/83749?usp=email ) Change subject: mb/google/brox: Add model brox-ti-pdc ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/83749?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac5b4cd4dcb1d274553f78e9d4295f8f9ad8a863 Gerrit-Change-Number: 83749 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 15:24:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/amd: add PSP SMI handler stub
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Nico Huber, Varshit Pandya, ritul guru. Felix Held has posted comments on this change by Felix Held. ( https://review.coreboot.org/c/coreboot/+/83739?usp=email ) Change subject: soc/amd: add PSP SMI handler stub ...................................................................... Patch Set 2: (3 comments) File src/soc/amd/cezanne/smihandler.c: https://review.coreboot.org/c/coreboot/+/83739/comment/4313c650_6f007900?us… : PS2, Line 116: psp_smi_handler > Stubbing `psp_smi_handler()` in the header file once would avoid the `#if` […] while i usually push for avoiding pre-processor usage if possible, but i'm not sure if having a smi handler stub would be the better option; right now i only include psp_smi.c in the build when this option is selected and having a separate file with just the stub doesn't seem like a too great idea. or do you mean having a stub in amdblocks/psp.h that gets preprocessored in in the !CONFIG(SOC_AMD_COMMON_BLOCK_PSP_SMI) case? File src/soc/amd/common/block/psp/Kconfig: https://review.coreboot.org/c/coreboot/+/83739/comment/07b07d1f_fcb13798?us… : PS2, Line 108: SPI flash after the BOOT_DONE PSP command. > NB. Making this some kind of append-only and only erase during boot, […] that would be something for the psp side to do differently. the current approach seems to be that rom armor is used where the psp owns the spi controller the flash is connected to and doesn't have to call the smi handler to do the flash accsses File src/soc/amd/common/block/psp/psp_smm.c: https://review.coreboot.org/c/coreboot/+/83739/comment/95167855_1ad37ffd?us… : PS2, Line 94: configure_psp_smi(); > Is it necessary to do this in SMM? […] it's not necessary to do this in smm; however the next patch CB:83740 adds the enable_psp_smi call which needs to be done from smm, since it writes a bit in p2c_buffer which is inside the smm ram and having both in the same place is probably a good idea, right? -- To view, visit https://review.coreboot.org/c/coreboot/+/83739?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I65989ff529d728cd9d2cd60b384295417bef77ad Gerrit-Change-Number: 83739 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 02 Aug 2024 15:15:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de>

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[XS] Change in coreboot[main]: soc/ti/am335x: Remove superfluous formats
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83723?usp=email ) Change subject: soc/ti/am335x: Remove superfluous formats ...................................................................... soc/ti/am335x: Remove superfluous formats These formats are already included in memlayout.ld. Change-Id: I89d226440308ce3fbe00382698dcd8c88863e694 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83723 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/ti/am335x/header.ld 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/soc/ti/am335x/header.ld b/src/soc/ti/am335x/header.ld index 84e0136..0018e81 100644 --- a/src/soc/ti/am335x/header.ld +++ b/src/soc/ti/am335x/header.ld @@ -1,8 +1,4 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* We use ELF as output format. So that we can debug the code in some form. */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) - #define OMAP_HEADER 1 #include "memlayout.ld" -- To view, visit https://review.coreboot.org/c/coreboot/+/83723?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I89d226440308ce3fbe00382698dcd8c88863e694 Gerrit-Change-Number: 83723 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: soc/ti/am335x: Use Linker instead of compiler to link
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/70161?usp=email ) Change subject: soc/ti/am335x: Use Linker instead of compiler to link ...................................................................... soc/ti/am335x: Use Linker instead of compiler to link Clang does not work that well as a linker for the header as it will default to other linkers which do not work well here. Instead just use the linker directly. Change-Id: Id6ba42b470349a4b138a65b2a037f16a65982ef7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70161 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/soc/ti/am335x/Makefile.mk 1 file changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/soc/ti/am335x/Makefile.mk b/src/soc/ti/am335x/Makefile.mk index e09a0f7..66192f3 100644 --- a/src/soc/ti/am335x/Makefile.mk +++ b/src/soc/ti/am335x/Makefile.mk @@ -26,6 +26,7 @@ real-target: $(obj)/MLO +omap-header-y += header.ld header_ld := $(call src-to-obj,omap-header,$(dir)/header.ld) get_header_size= \ @@ -33,11 +34,10 @@ $(obj)/omap-header.bin: $$(omap-header-objs) $(objcbfs)/bootblock.bin @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC_omap-header) -nostdlib -nostartfiles -static -include $(obj)/config.h \ - -Wl,--defsym,header_load_size=$(strip \ + $(LD_omap-header) --defsym header_load_size=$(strip \ $(call get_header_size,$(obj)/coreboot.rom) \ - ) \ - -o $@.tmp $< -T $(header_ld) + ) -L$(obj) --whole-archive --start-group $(filter-out %.ld,$(omap-header-objs)) --end-group \ + -o $@.tmp -T $(header_ld) $(OBJCOPY_omap-header) --only-section=".header" -O binary $@.tmp $@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin -- To view, visit https://review.coreboot.org/c/coreboot/+/70161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id6ba42b470349a4b138a65b2a037f16a65982ef7 Gerrit-Change-Number: 70161 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag
by Felix Held (Code Review) 02 Aug '24

02 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83686?usp=email ) Change subject: soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag ...................................................................... soc/intel/common/block/cse: Enforce CSE sync with pertinent GBB flag The patch enforces CSE sync when the GBB flag GBB_FLAG_FORCE_CSE_SYNC is enabled and the system is currently booting from the RO section. Additionally, it integrates forced CSE sync into eSOL decision-making. BUG=b:353053317 TEST=Verified forced CSE sync on rex0 with GBB 0x200000 Cq-Depend: chromium:5718196 Change-Id: I228bc8ebf58719776f6c39e0bfbb7ad53d9bfb7f Signed-off-by: Dinesh Gehlot <digehlot(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83686 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 30 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 0917897..8f59724 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -769,6 +769,21 @@ return CB_SUCCESS; } +static bool is_cse_sync_enforced(void) +{ + /* + * Force test CSE firmware update scenario if below conditions are being met: + * - VB2_GBB_FLAG_FORCE_CSE_SYNC flag is set + * - CSE FW is in RO + */ + struct vb2_context *ctx = vboot_get_context(); + if ((vb2api_gbb_get_flags(ctx) & VB2_GBB_FLAG_FORCE_CSE_SYNC) && + cse_get_current_bp() == RO) { + return true; + } + return false; +} + static enum cse_update_status cse_check_update_status(struct region_device *target_rdev) { int ret; @@ -787,12 +802,18 @@ cbfs_rw_version.build); ret = cse_compare_sub_part_version(&cbfs_rw_version, cse_get_rw_version()); - if (ret == 0) + if (ret == 0) { + if (is_cse_sync_enforced()) { + printk(BIOS_WARNING, "Force CSE Firmware upgrade for Autotest\n"); + return CSE_UPDATE_UPGRADE; + } return CSE_UPDATE_NOT_REQUIRED; - else if (ret < 0) - return CSE_UPDATE_DOWNGRADE; - else - return CSE_UPDATE_UPGRADE; + } else { + if (ret < 0) + return CSE_UPDATE_DOWNGRADE; + else + return CSE_UPDATE_UPGRADE; + } } static enum cb_err cse_write_rw_region(const struct region_device *target_rdev, @@ -1042,6 +1063,10 @@ if (get_cse_ver_from_cbfs(&cbfs_rw_version) == CB_ERR) return false; + /* Check if CSE sync is enforced */ + if (is_cse_sync_enforced()) { + return true; + } return !!cse_compare_sub_part_version(&cbfs_rw_version, cse_get_rw_version()); } -- To view, visit https://review.coreboot.org/c/coreboot/+/83686?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I228bc8ebf58719776f6c39e0bfbb7ad53d9bfb7f Gerrit-Change-Number: 83686 Gerrit-PatchSet: 5 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yu-Ping Wu <yupingso(a)google.com>

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coreboot-gerrit August 2024