coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: util/cbfstool: Make sure to only compare PT_LOAD stages
by Arthur Heymans (Code Review) 30 Aug '24

30 Aug '24

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/84140?usp=email ) Change subject: util/cbfstool: Make sure to only compare PT_LOAD stages ...................................................................... util/cbfstool: Make sure to only compare PT_LOAD stages When parsing XIP stages only compare PT_LOAD phdrs. Currently coreboot stages only use PT_LOAD phdrs. Change-Id: I305b25032a3c4a9fdefc76cad77fafdb862a604c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/cbfs-mkstage.c 1 file changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/84140/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84140?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I305b25032a3c4a9fdefc76cad77fafdb862a604c Gerrit-Change-Number: 84140 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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[XS] Change in coreboot[main]: mb/google/cherry: Complete PCIe reset in romstage
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84118?usp=email ) Change subject: mb/google/cherry: Complete PCIe reset in romstage ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3a73bd574ae8f9f4e624846ce8b901a7d2209e78 Gerrit-Change-Number: 84118 Gerrit-PatchSet: 7 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 08:07:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek: Add mtk_pcie_deassert_perst for early PCIe reset
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84117?usp=email ) Change subject: soc/mediatek: Add mtk_pcie_deassert_perst for early PCIe reset ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84117?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I008e95263bfaf0119353382c2d2ce5ce29c6a382 Gerrit-Change-Number: 84117 Gerrit-PatchSet: 6 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 08:07:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: util/cbfstool: Make sure to only compare PT_LOAD stages
by Arthur Heymans (Code Review) 30 Aug '24

30 Aug '24

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84140?usp=email ) Change subject: util/cbfstool: Make sure to only compare PT_LOAD stages ...................................................................... util/cbfstool: Make sure to only compare PT_LOAD stages When parsing XIP stages only compare PT_LOAD phdrs. Currently coreboot stages only use PT_LOAD phdrs. However using non PT_LOAD phdrs can be used for further improvements. Segments can however be used as constraints: e.g. you could have a CAR segment and then the linker automatically checks that the car section fits in that segment, removing the need for handcrafted asserts in that code. Change-Id: I305b25032a3c4a9fdefc76cad77fafdb862a604c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/cbfs-mkstage.c 1 file changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/84140/1 diff --git a/util/cbfstool/cbfs-mkstage.c b/util/cbfstool/cbfs-mkstage.c index 8129f0b..84a746b 100644 --- a/util/cbfstool/cbfs-mkstage.c +++ b/util/cbfstool/cbfs-mkstage.c @@ -292,13 +292,16 @@ * loadable segments were found or if two consecutive segments are not * consecutive in their physical address space. */ -static Elf64_Phdr **find_loadable_segments(struct parsed_elf *pelf) +static Elf64_Phdr **xip_find_loadable_segments(struct parsed_elf *pelf) { Elf64_Phdr **phdrs = NULL; - Elf64_Phdr *prev = NULL, *cur; + Elf64_Phdr *prev = NULL, *cur = NULL; size_t size = 1, i; - for (i = 0; i < pelf->ehdr.e_phnum; i++, prev = cur) { + for (i = 0; i < pelf->ehdr.e_phnum; i++) { + if (cur && cur->p_type == PT_LOAD) + prev = cur; + cur = &pelf->phdr[i]; if (cur->p_type != PT_LOAD || cur->p_memsz == 0) @@ -366,7 +369,7 @@ if (rmodule_collect_relocations(rmodctx, &filter)) goto out; - toload = find_loadable_segments(pelf); + toload = xip_find_loadable_segments(pelf); if (!toload) goto out; -- To view, visit https://review.coreboot.org/c/coreboot/+/84140?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I305b25032a3c4a9fdefc76cad77fafdb862a604c Gerrit-Change-Number: 84140 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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[S] Change in coreboot[main]: util/cbfstool: Deal with how lld organizes loadable segments
by Arthur Heymans (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Angel Pons, Nico Huber. Hello Angel Pons, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84043?usp=email to look at the new patch set (#12). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: util/cbfstool: Deal with how lld organizes loadable segments ...................................................................... util/cbfstool: Deal with how lld organizes loadable segments LLD deals with loadable segments in a different manner than BFD. The MemSiz of the .text loadable section is padded till the virtaddr of the .car.data section. Since .text is not loaded in ENV_CAR this does not matter. Change-Id: I1a0541c8ea3dfbebfba83d505d84b6db12000723 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/cbfs-mkstage.c 1 file changed, 9 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/84043/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/84043?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a0541c8ea3dfbebfba83d505d84b6db12000723 Gerrit-Change-Number: 84043 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: util/cbfstool: Deal with how lld organizes loadable segments
by Arthur Heymans (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Angel Pons, Nico Huber. Arthur Heymans has posted comments on this change by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/84043?usp=email ) Change subject: util/cbfstool: Deal with how lld organizes loadable segments ...................................................................... Patch Set 11: (1 comment) File util/cbfstool/cbfs-mkstage.c: https://review.coreboot.org/c/coreboot/+/84043/comment/e4b3f9f0_95432226?us… : PS7, Line 301: prev = cur > Maybe I'm confusing myself too much. What do we actually try to assert? > That things for `_data .. _edata` are consecutive, I guess? > > Looking at a BFD linked romstage, I would check `vaddr` there as well: > ``` > $ readelf --segments build/cbfs/fallback/romstage.elf > > Elf file type is EXEC (Executable file) > Entry point 0x2000031 > There are 2 program headers, starting at offset 52 > > Program Headers: > Type Offset VirtAddr PhysAddr FileSiz MemSiz Flg Align > LOAD 0x000080 0x02000000 0x02000000 0x0c1d0 0x0c1d0 R E 0x20 > LOAD 0x00c250 0xff7cb0a8 0x0200c1d0 0x00018 0x00018 RW 0x4 > > Section to Segment mapping: > Segment Sections... > 00 .text > 01 .data > ``` > > Just not compare the executable segment. So what we want is extract out loadable sections and make it into a XIP binary. We want them to be consecutive. We only use PT_LOAD segments anyway, but it's indeed reasonable to not update the loop variable on non PT_LOAD. -- To view, visit https://review.coreboot.org/c/coreboot/+/84043?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a0541c8ea3dfbebfba83d505d84b6db12000723 Gerrit-Change-Number: 84043 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 08:02:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de>

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[XS] Change in coreboot[main]: soc/mediatek: Add EARLY_INIT_PCIE_RESET to early_init_type
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84116?usp=email ) Change subject: soc/mediatek: Add EARLY_INIT_PCIE_RESET to early_init_type ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84116?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7ab85694e85a4c3f77fefc22efe16734c347a716 Gerrit-Change-Number: 84116 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 07:56:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/common: Move mtk_pcie_reset to common/pcie.c
by Jianjun Wang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Jianjun Wang has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84115?usp=email ) Change subject: soc/mediatek/common: Move mtk_pcie_reset to common/pcie.c ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84115?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib540cf9cc568206a1e78306624f4df7c5631c128 Gerrit-Change-Number: 84115 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 07:56:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/brask/var/bujia: Add PsysPmax setting
by Derek Huang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Rishika Raj, Shon Wang, Subrata Banik. Derek Huang has posted comments on this change by Shon Wang. ( https://review.coreboot.org/c/coreboot/+/83593?usp=email ) Change subject: mb/google/brask/var/bujia: Add PsysPmax setting ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/brya/variants/bujia/ramstage.c: https://review.coreboot.org/c/coreboot/+/83593/comment/3bbe593a_1c7f8396?us… : PS6, Line 65: struct ec_params_adc_read req = { : .adc_channel = 4, : }; : struct ec_response_adc_read info; : struct chromeec_command cmd = { : .cmd_code = EC_CMD_ADC_READ, : .cmd_size_in = sizeof(req), : .cmd_data_in = &req, : .cmd_size_out = sizeof(info), : .cmd_data_out = &info, : }; : google_chromeec_command(&cmd); Can we add a helper function for this? e.g. `get_input_power_voltage` -- To view, visit https://review.coreboot.org/c/coreboot/+/83593?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic6e9c6ce9f3179c7d63c1169695fbc23188456dd Gerrit-Change-Number: 83593 Gerrit-PatchSet: 6 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Rishika Raj <rishikaraj(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 07:53:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/ovis/var/deku: Remove DSP setting
by Derek Huang (Code Review) 30 Aug '24

30 Aug '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, Tony Huang. Derek Huang has posted comments on this change by Tony Huang. ( https://review.coreboot.org/c/coreboot/+/84139?usp=email ) Change subject: mb/google/ovis/var/deku: Remove DSP setting ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84139/comment/2ae7a2e9_e7379641?us… : PS1, Line 14: TEST=emerge-ovis coreboot : check dev beep works > > > Deku don't have codec and amplifier. […] Normally Chromebox devices have audio, Deku is a special device which does not have codec and amplifier. In this case, shall we keep it enabled in Ovis baseboard and just disable it in Deku. -- To view, visit https://review.coreboot.org/c/coreboot/+/84139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia1102dd3dfaa8248b092317edc2a88466adc2bd8 Gerrit-Change-Number: 84139 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 30 Aug 2024 07:45:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Tony Huang <tony-huang(a)quanta.corp-partner.google.com>

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coreboot-gerrit August 2024