coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

1 participants
3913 discussions

[M] Change in coreboot[main]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant
by Julia (Code Review) 18 Aug '24

18 Aug '24

Julia has uploaded a new patch set (#3). ( https://review.coreboot.org/c/coreboot/+/83968?usp=email ) Change subject: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant ...................................................................... mb/acer/g43t-am3: Add Acer Q45T-AM as a variant This adds a new board as a variant of the Acer G43T-AM3 with the following prominent changes: * Intel Q45 northbridge (GMCH) instead of a G43 * 4 MiB of flash instead of 2 MiB * Two serial ports (one external, one internal) * A parallel port connector (internal) * An FDD connector * DVI-D instead of HDMI * No Firewire The port was done based on logs and info received via private email. It was only tested on the Acer G43T-AM3 so far, which still builds and works. Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Signed-off-by: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> --- M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/acer/g43t-am3/Kconfig.name A src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt A src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c A src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c A src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl A src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb 7 files changed, 239 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/83968/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/83968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Gerrit-Change-Number: 83968 Gerrit-PatchSet: 3 Gerrit-Owner: Julia <launchpad.vineyard395(a)passinbox.com>

1 0

[M] Change in coreboot[main]: mb/acer/g43t-am3: Rework mainboard for variant mechanism
by Julia (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Julia, Michael Büchler, Paul Menzel. Julia has uploaded a new patch set (#4) to the change originally created by Michael Büchler. ( https://review.coreboot.org/c/coreboot/+/57764?usp=email ) Change subject: mb/acer/g43t-am3: Rework mainboard for variant mechanism ...................................................................... mb/acer/g43t-am3: Rework mainboard for variant mechanism In preparation for CB:83968, rework the configuration files and move files specific to G43T-AM3 to its own variant directory. Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Signed-off-by: Michael Büchler <michael.buechler(a)posteo.net> Signed-off-by: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> --- M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/acer/g43t-am3/Makefile.mk A src/mainboard/acer/g43t-am3/variants/g43t-am3/data.vbt A src/mainboard/acer/g43t-am3/variants/g43t-am3/early_init.c A src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c A src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl A src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb 7 files changed, 173 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/57764/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/57764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Gerrit-Change-Number: 57764 Gerrit-PatchSet: 4 Gerrit-Owner: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Reviewer: Julia <launchpad.vineyard395(a)passinbox.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julia <launchpad.vineyard395(a)passinbox.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Büchler <michael.buechler(a)posteo.net>

1 0

[M] Change in coreboot[main]: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant
by Julia (Code Review) 18 Aug '24

18 Aug '24

Julia has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/83968?usp=email ) Change subject: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant ...................................................................... [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant This adds a new board as a variant of the Acer G43T-AM3 with the following prominent changes: * Intel Q45 northbridge (GMCH) instead of a G43 * 4 MiB of flash instead of 2 MiB * Two serial ports (one external, one internal) * A parallel port connector (internal) * An FDD connector * DVI-D instead of HDMI * No Firewire The port was done based on logs and info received via private email. It was only tested on the Acer G43T-AM3 so far, which still builds and works. Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Signed-off-by: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> --- M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/acer/g43t-am3/Kconfig.name A src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt A src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c A src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c A src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl A src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb 7 files changed, 239 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/83968/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Gerrit-Change-Number: 83968 Gerrit-PatchSet: 2 Gerrit-Owner: Julia <launchpad.vineyard395(a)passinbox.com>

1 0

[XS] Change in coreboot[main]: crossgcc: Upgrade binutils from 2.42 to 2.43.1
by Elyes Haouas (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Felix Singer, Martin L Roth. Hello Felix Singer, Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83816?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: crossgcc: Upgrade binutils from 2.42 to 2.43.1 ...................................................................... crossgcc: Upgrade binutils from 2.42 to 2.43.1 Change-Id: I1c9d1b2e336894ac48ce87e4d3390e9f9557d4f7 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc R util/crossgcc/patches/binutils-2.43.1_as-ipxe.patch R util/crossgcc/patches/binutils-2.43.1_no-makeinfo.patch D util/crossgcc/sum/binutils-2.42.tar.xz.cksum A util/crossgcc/sum/binutils-2.43.1.tar.xz.cksum 5 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/83816/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/83816?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c9d1b2e336894ac48ce87e4d3390e9f9557d4f7 Gerrit-Change-Number: 83816 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com>

1 0

[XS] Change in coreboot[main]: crossgcc: Upgrade GCC from 14.1.0 to 14.2.0
by Elyes Haouas (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Felix Singer, Martin L Roth. Hello Felix Singer, Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83839?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: crossgcc: Upgrade GCC from 14.1.0 to 14.2.0 ...................................................................... crossgcc: Upgrade GCC from 14.1.0 to 14.2.0 Change-Id: I6ffff766fb1fa91ad376c3e7e9aebe17c3288725 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/crossgcc/buildgcc R util/crossgcc/patches/gcc-14.2.0_asan_shadow_offset_callback.patch R util/crossgcc/patches/gcc-14.2.0_gnat.patch R util/crossgcc/patches/gcc-14.2.0_libcpp.patch R util/crossgcc/patches/gcc-14.2.0_libgcc.patch R util/crossgcc/patches/gcc-14.2.0_musl_poisoned_calloc.patch R util/crossgcc/patches/gcc-14.2.0_rv32iafc.patch D util/crossgcc/sum/gcc-14.1.0.tar.xz.cksum A util/crossgcc/sum/gcc-14.2.0.tar.xz.cksum 9 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/83839/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83839?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ffff766fb1fa91ad376c3e7e9aebe17c3288725 Gerrit-Change-Number: 83839 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com>

1 0

[L] Change in coreboot[main]: Revert "Add SBOM (Software Bill of Materials) Generation"
by Elyes Haouas (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Felix Singer, Martin L Roth, Martin Roth, Nico Huber. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77804?usp=email ) Change subject: Revert "Add SBOM (Software Bill of Materials) Generation" ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > I'd rather we tried to fix the problem than reverting the entire feature. I bet a beer that no one will fix it within a year (probably 2 or 3 years 😊 ) This is true for all of https://review.coreboot.org/q/topic:%22clean_under_the_carpet%22 -- To view, visit https://review.coreboot.org/c/coreboot/+/77804?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I017e9b56a3c0b62ac69a16810c3e31e72ca72078 Gerrit-Change-Number: 77804 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Comment-Date: Sun, 18 Aug 2024 09:31:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: coreboot org <coreboot.org(a)gmail.com>

1 0

[M] Change in coreboot[main]: q45t-am
by Julia (Code Review) 18 Aug '24

18 Aug '24

Julia has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83968?usp=email ) Change subject: q45t-am ...................................................................... q45t-am Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Signed-off-by: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> --- M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/acer/g43t-am3/Kconfig.name A src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt A src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c A src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c A src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl A src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb 7 files changed, 239 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/83968/1 diff --git a/src/mainboard/acer/g43t-am3/Kconfig b/src/mainboard/acer/g43t-am3/Kconfig index 34d191f..77ce9d4 100644 --- a/src/mainboard/acer/g43t-am3/Kconfig +++ b/src/mainboard/acer/g43t-am3/Kconfig @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -if BOARD_ACER_G43T_AM3 +if BOARD_ACER_G43T_AM3 || BOARD_ACER_Q45T_AM config BOARD_SPECIFIC_OPTIONS def_bool y @@ -10,6 +10,7 @@ select SUPERIO_ITE_IT8720F select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_2048 if BOARD_ACER_G43T_AM3 + select BOARD_ROMSIZE_KB_4096 if BOARD_ACER_Q45T_AM select PCIEXP_ASPM select PCIEXP_CLK_PM select HAVE_OPTION_TABLE @@ -23,18 +24,21 @@ config VGA_BIOS_ID string default "8086,2e22" if BOARD_ACER_G43T_AM3 + default "8086,2e12" if BOARD_ACER_Q45T_AM config MAINBOARD_DIR default "acer/g43t-am3" config VARIANT_DIR default "g43t-am3" if BOARD_ACER_G43T_AM3 + default "q45t-am" if BOARD_ACER_Q45T_AM config MAINBOARD_PART_NUMBER default "G43T-AM3" if BOARD_ACER_G43T_AM3 + default "Q45T-AM" if BOARD_ACER_Q45T_AM config OVERRIDE_DEVICETREE string default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb" -endif # BOARD_ACER_G43T_AM3 +endif # BOARD_ACER_G43T_AM3 || BOARD_ACER_Q45T_AM diff --git a/src/mainboard/acer/g43t-am3/Kconfig.name b/src/mainboard/acer/g43t-am3/Kconfig.name index 39c5158..5b4447d 100644 --- a/src/mainboard/acer/g43t-am3/Kconfig.name +++ b/src/mainboard/acer/g43t-am3/Kconfig.name @@ -2,3 +2,6 @@ config BOARD_ACER_G43T_AM3 bool "G43T-AM3" + +config BOARD_ACER_Q45T_AM + bool "Q45T-AM" diff --git a/src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt b/src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt new file mode 100644 index 0000000..0b264c3 --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/q45t-am/data.vbt Binary files differ diff --git a/src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c b/src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c new file mode 100644 index 0000000..560e343 --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/q45t-am/early_init.c @@ -0,0 +1,36 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <bootblock_common.h> +#include <southbridge/intel/i82801jx/i82801jx.h> +#include <northbridge/intel/x4x/x4x.h> +#include <superio/ite/common/ite.h> +#include <superio/ite/it8720f/it8720f.h> + +#define GPIO_DEV PNP_DEV(0x2e, IT8720F_GPIO) +#define SERIAL_DEV PNP_DEV(0x2e, IT8720F_SP1) + +void bootblock_mainboard_early_init(void) +{ + /* Set up GPIOs on Super I/O. */ + ite_reg_write(GPIO_DEV, 0x25, 0x00); // GPIO set 1 + ite_reg_write(GPIO_DEV, 0x26, 0x0c); // GPIO set 2 + ite_reg_write(GPIO_DEV, 0x27, 0x00); // GPIO set 3 + ite_reg_write(GPIO_DEV, 0x28, 0x40); // GPIO set 4 + ite_reg_write(GPIO_DEV, 0x29, 0x20); // GPIO set 5 + + /* Enable 3VSB during Suspend-to-RAM */ + ite_enable_3vsbsw(GPIO_DEV); + + /* Delay PWROK2 after 3VSBSW# during resume from Suspend-to-RAM */ + ite_delay_pwrgd3(GPIO_DEV); + + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} + +void mb_get_spd_map(u8 spd_map[4]) +{ + spd_map[0] = 0x50; + spd_map[1] = 0x51; + spd_map[2] = 0x52; + spd_map[3] = 0x53; +} diff --git a/src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c b/src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c new file mode 100644 index 0000000..e344fab --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/q45t-am/gpio.c @@ -0,0 +1,112 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <southbridge/intel/common/gpio.h> + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_GPIO, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_GPIO, + .gpio20 = GPIO_MODE_GPIO, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio9 = GPIO_DIR_OUTPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio14 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_INPUT, + .gpio18 = GPIO_DIR_OUTPUT, + .gpio20 = GPIO_DIR_OUTPUT, + .gpio27 = GPIO_DIR_OUTPUT, + .gpio28 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio9 = GPIO_LEVEL_HIGH, + .gpio18 = GPIO_LEVEL_HIGH, + .gpio20 = GPIO_LEVEL_LOW, + .gpio27 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio6 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_blink = { + .gpio18 = GPIO_BLINK, + +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_NATIVE, + .gpio36 = GPIO_MODE_NATIVE, + .gpio37 = GPIO_MODE_NATIVE, + .gpio38 = GPIO_MODE_NATIVE, + .gpio39 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_NATIVE, + .gpio49 = GPIO_MODE_GPIO, + .gpio56 = GPIO_MODE_GPIO, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_OUTPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_OUTPUT, + .gpio56 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio60 = GPIO_DIR_OUTPUT, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_level = { + .gpio32 = GPIO_LEVEL_HIGH, + .gpio49 = GPIO_LEVEL_HIGH, + .gpio60 = GPIO_LEVEL_LOW, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio72 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio72 = GPIO_DIR_INPUT, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_blink, + .invert = &pch_gpio_set1_invert, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + .level = &pch_gpio_set2_level, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + }, + +}; diff --git a/src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl b/src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl new file mode 100644 index 0000000..04fc150 --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/q45t-am/include/acpi/superio.asl @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#undef SUPERIO_DEV +#undef SUPERIO_PNP_BASE +#undef IT8720F_SHOW_SP1 +#undef IT8720F_SHOW_SP2 +#undef IT8720F_SHOW_EC +#undef IT8720F_SHOW_KBCK +#undef IT8720F_SHOW_KBCM +#undef IT8720F_SHOW_GPIO +#undef IT8720F_SHOW_CIR +#define SUPERIO_DEV SIO0 +#define SUPERIO_PNP_BASE 0x2e +#define IT8720F_SHOW_SP1 1 +#define IT8720F_SHOW_SP2 1 +#define IT8720F_SHOW_EC 1 +#define IT8720F_SHOW_KBCK 1 +#define IT8720F_SHOW_KBCM 1 +#define IT8720F_SHOW_GPIO 1 +#define IT8720F_SHOW_CIR 1 +#include <superio/ite/it8720f/acpi/superio.asl> diff --git a/src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb b/src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb new file mode 100644 index 0000000..126c1ab --- /dev/null +++ b/src/mainboard/acer/g43t-am3/variants/q45t-am/overridetree.cb @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +chip northbridge/intel/x4x # Northbridge + device domain 0 on # PCI domain + chip southbridge/intel/i82801jx # Southbridge + device pci 1c.1 off end # PCIe 2 + device pci 1f.0 on # LPC bridge + chip superio/ite/it8720f # Super I/O + device pnp 2e.0 on end # Floppy + device pnp 2e.1 on end # COM 1 + device pnp 2e.2 on end # COM 2 + device pnp 2e.3 on end # Parallel port + device pnp 2e.7 on # GPIO + io 0x60 = 0x000 + io 0x62 = 0xa20 + io 0x64 = 0xa30 + irq 0xc0 = 0x01 # Simple IO Set 1 + irq 0xc1 = 0x0c # Simple IO Set 2 + irq 0xc2 = 0x00 # Simple IO Set 3 + irq 0xc3 = 0x00 # Simple IO Set 4 + irq 0xc4 = 0x20 # Simple IO Set 5 + irq 0xc8 = 0x01 # Simple IO Set 1 Output + irq 0xc9 = 0x0c # Simple IO Set 2 Output + irq 0xca = 0x00 # Simple IO Set 3 Output + irq 0xcb = 0x00 # Simple IO Set 4 Output + irq 0xcc = 0x20 # Simple IO Set 5 Output + irq 0xf0 = 0x00 + irq 0xf1 = 0x00 + irq 0xf2 = 0x00 + irq 0xf3 = 0x00 + irq 0xf4 = 0x00 + irq 0xf5 = 0x00 + irq 0xf6 = 0x00 + irq 0xf7 = 0x00 + irq 0xf8 = 0x12 + irq 0xf9 = 0x02 + irq 0xfa = 0x13 + irq 0xfb = 0x02 + #irq 0xfc = 0xef # VID Input + irq 0xfd = 0x00 + irq 0xfe = 0x00 + end + device pnp 2e.a on end # CIR + end + end + device pci 1f.3 on # SMBus + chip drivers/i2c/ck505 # IDT CV194 + register "mask" = "{ 0xff, 0xff, 0xff, 0x00, + 0xff, 0x00, 0x00, 0x00, + 0x00, 0xff, 0xff, 0xff, + 0x00, 0xff }" + register "regs" = "{ 0x57, 0xd9, 0xfe, 0xff, + 0xff, 0x00, 0x00, 0x00, + 0x00, 0x25, 0x7d, 0x96, + 0x00, 0xbf }" + device i2c 69 on end + end + end + end + end +end -- To view, visit https://review.coreboot.org/c/coreboot/+/83968?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2654ca4b198bfea409992be14e89702cf67ea50 Gerrit-Change-Number: 83968 Gerrit-PatchSet: 1 Gerrit-Owner: Julia <launchpad.vineyard395(a)passinbox.com>

1 0

[M] Change in coreboot[main]: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant
by Julia (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Julia, Michael Büchler, Paul Menzel. Julia has uploaded a new patch set (#3) to the change originally created by Michael Büchler. ( https://review.coreboot.org/c/coreboot/+/57764?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Julia, Code-Review+1 by Paul Menzel Change subject: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant ...................................................................... [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant This adds a new board as a variant of the Acer G43T-AM3 with the following prominent changes: * Intel Q45 northbridge (GMCH) instead of a G43 * 4 MiB of flash instead of 2 MiB * Two serial ports (one external, one internal) * A parallel port connector (internal) * An FDD connector * DVI-D instead of HDMI * No Firewire The port was done based on logs and info received via private email. It was only tested on the Acer G43T-AM3 so far, which still builds and works. Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Signed-off-by: Michael Büchler <michael.buechler(a)posteo.net> Signed-off-by: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> --- M src/mainboard/acer/g43t-am3/Kconfig M src/mainboard/acer/g43t-am3/Makefile.mk A src/mainboard/acer/g43t-am3/variants/g43t-am3/data.vbt A src/mainboard/acer/g43t-am3/variants/g43t-am3/early_init.c A src/mainboard/acer/g43t-am3/variants/g43t-am3/gpio.c A src/mainboard/acer/g43t-am3/variants/g43t-am3/include/acpi/superio.asl A src/mainboard/acer/g43t-am3/variants/g43t-am3/overridetree.cb 7 files changed, 173 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/57764/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/57764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Gerrit-Change-Number: 57764 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Reviewer: Julia <launchpad.vineyard395(a)passinbox.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Julia <launchpad.vineyard395(a)passinbox.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michael Büchler <michael.buechler(a)posteo.net>

1 0

[L] Change in coreboot[main]: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant
by Julia Kittlinger (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Michael Büchler. Julia Kittlinger has posted comments on this change by Michael Büchler. ( https://review.coreboot.org/c/coreboot/+/57764?usp=email ) Change subject: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/57764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Gerrit-Change-Number: 57764 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Reviewer: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Comment-Date: Sun, 18 Aug 2024 05:03:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[L] Change in coreboot[main]: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant
by Paul Menzel (Code Review) 18 Aug '24

18 Aug '24

Attention is currently required from: Michael Büchler. Paul Menzel has posted comments on this change by Michael Büchler. ( https://review.coreboot.org/c/coreboot/+/57764?usp=email ) Change subject: [NEEDS_TEST]: mb/acer/g43t-am3: Add Acer Q45T-AM as a variant ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/57764/comment/bcd849c7_866e61fb?us… : PS2, Line 9: a new board … the new board Acer Q45T-AM … -- To view, visit https://review.coreboot.org/c/coreboot/+/57764?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I425852f4bdacf7cb6688a5fb845ac3001373262e Gerrit-Change-Number: 57764 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Reviewer: Julia Kittlinger <launchpad.vineyard395(a)passinbox.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michael Büchler <michael.buechler(a)posteo.net> Gerrit-Comment-Date: Sun, 18 Aug 2024 03:03:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit August 2024