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Change subject: soc/mediatek: Add null check for info with error handling
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83987/comment/a54499d4_56ffdbe8?us… :
PS1, Line 7: soc/mediatek: Add null check for info with error handling
soc/mediatek/common: Print error if GPIO raw_id is not in the range
File src/soc/mediatek/common/gpio.c:
https://review.coreboot.org/c/coreboot/+/83987/comment/6729704f_5c4320fa?us… :
PS1, Line 193: "Error: raw_id is out of range\n");
`Error` is covered by `BIOS_ERR`.
```
printk(BIOS_ERR, "%s: raw_id %u is out of range\n", __func__, gpio.id);
```
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Change subject: soc/mediatek: Add null check for info with error handling
......................................................................
Patch Set 1:
(2 comments)
File src/soc/mediatek/common/gpio.c:
https://review.coreboot.org/c/coreboot/+/83987/comment/02a3255c_96f6ac84?us… :
PS1, Line 193: printk(BIOS_ERR, "Error: raw_id is out of range\n");
Include the GPIO id?
https://review.coreboot.org/c/coreboot/+/83987/comment/0bfdcedc_186f9c1a?us… :
PS1, Line 193: printk(BIOS_ERR, "Error: raw_id is out of range\n");
Alternatively, the error could be printed in `get_gpio_driving_info()`?
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Change subject: soc/mediatek: Move GPIO definations to MediaTek common directory
......................................................................
Patch Set 1:
(5 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83988/comment/225bb73e_ada3b72a?us… :
PS1, Line 7: definations
defin*i*tions
https://review.coreboot.org/c/coreboot/+/83988/comment/0c091d01_125dbc2f?us… :
PS1, Line 9: reduece
reduce
https://review.coreboot.org/c/coreboot/+/83988/comment/9fe3e82d_7446c400?us… :
PS1, Line 9: definations
definitions
https://review.coreboot.org/c/coreboot/+/83988/comment/76477e7c_39aacc7b?us… :
PS1, Line 10: definations
Ditto.
File src/soc/mediatek/mt8173/include/soc/gpio_base.h:
https://review.coreboot.org/c/coreboot/+/83988/comment/a7699502_4ead6130?us… :
PS1, Line 7: typedef struct {
: u32 id;
: } gpio_t;
Will this be compatible with the common files? (Sorry, no C expert.)
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Change subject: mainboard/lenovo: Add ThinkCentre M710s (Skylake)
......................................................................
Patch Set 27:
(1 comment)
File src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/80343/comment/2b9db230_bfa69344?us… :
PS27, Line 12: register "PcieRpClkReqSupport[0]" = "true"
: register "PcieRpClkReqNumber[0]" = "2"
: register "PcieRpClkSrcNumber[0]" = "0"
> > Uh, this is a CPU RP, not a PCH RP. […]
I have removed these in CB:83993.
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Change subject: mb/lenovo/thinkcentre_m710s: Disable DRIVER_LENOVO_SERIALS
......................................................................
mb/lenovo/thinkcentre_m710s: Disable DRIVER_LENOVO_SERIALS
This mainboard does not have AT24RF08C (Asset Identification EEPROM) and
will show "*INVALID*" in the SMBIOS table.
Change-Id: If6f948bc4c63c7afdc8b31e1945d3c3beb99883f
Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
---
M src/mainboard/lenovo/thinkcentre_m710s/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/83994/1
diff --git a/src/mainboard/lenovo/thinkcentre_m710s/Kconfig b/src/mainboard/lenovo/thinkcentre_m710s/Kconfig
index c01aaec..c9bcd75 100644
--- a/src/mainboard/lenovo/thinkcentre_m710s/Kconfig
+++ b/src/mainboard/lenovo/thinkcentre_m710s/Kconfig
@@ -23,4 +23,7 @@
config MAINBOARD_PART_NUMBER
default "ThinkCentre M710s"
+config DRIVER_LENOVO_SERIALS
+ default n
+
endif # BOARD_LENOVO_THINKCENTRE_M710S
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Change subject: mb/lenovo/thinkcentre_m710s: Drop PCH UPDs from PEG device
......................................................................
mb/lenovo/thinkcentre_m710s: Drop PCH UPDs from PEG device
Change-Id: Ic0e0864b99c5078e5b84b9183262b3c47ffcb329
Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
---
M src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb
1 file changed, 0 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/83993/1
diff --git a/src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb b/src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb
index bce93ae..4d1828c 100644
--- a/src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb
+++ b/src/mainboard/lenovo/thinkcentre_m710s/devicetree.cb
@@ -9,13 +9,6 @@
"SlotLengthLong"
"PCIE16X"
"SlotDataBusWidth16X"
-
- # These configurations are technically for PCIe root
- # ports. However, they are used as there is no
- # equivalent for PEG devices.
- register "PcieRpClkReqSupport[0]" = "true"
- register "PcieRpClkReqNumber[0]" = "2"
- register "PcieRpClkSrcNumber[0]" = "0"
end
device ref igpu on end
device ref south_xhci on
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Maximilian Brune has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83990?usp=email )
Change subject: payloads/LinuxBoot: Build x86_64 with host toolchain
......................................................................
payloads/LinuxBoot: Build x86_64 with host toolchain
Currently our coreboot toolchain cannot build the Linux kernel in case
of x86_64. It spits out the following error during build:
```
make -C build/kernel-6_3 \
CROSS_COMPILE=/home/max/coreboot-amd/util/crossgcc/xgcc/bin/x86_64-elf- \
ARCH=x86_64 KBUILD_BUILD_USER=coreboot KBUILD_BUILD_HOST=reproducible \
KBUILD_BUILD_TIMESTAMP=Tue Aug 20 13:36:03 2024 KBUILD_BUILD_VERSION=0 bzImage
arch/x86/lib/clear_page_64.S: Assembler messages:
arch/x86/lib/clear_page_64.S:18: Error: number of operands mismatch for `mov'
arch/x86/lib/clear_page_64.S:27: Error: number of operands mismatch for `mov'
make[4]: *** [scripts/Makefile.build:374: arch/x86/lib/clear_page_64.o] Error 1
make[3]: *** [scripts/Makefile.build:494: arch/x86/lib] Error 2
make[3]: *** Waiting for unfinished jobs....
arch/x86/entry/entry_64.S: Assembler messages:
arch/x86/entry/entry_64.S:437: Error: unbalanced parenthesis in operand 1.
arch/x86/entry/entry_64.S:262: Info: macro invoked from here
arch/x86/entry/entry_64.S:265: Info: macro invoked from here
arch/x86/entry/entry_64.S:439: Error: unbalanced parenthesis in operand 1.
arch/x86/entry/entry_64.S:262: Info: macro invoked from here
arch/x86/entry/entry_64.S:265: Info: macro invoked from here
make[5]: *** [scripts/Makefile.build:374: arch/x86/entry/entry_64.o] Error 1
make[4]: *** [scripts/Makefile.build:494: arch/x86/entry] Error 2
make[4]: *** Waiting for unfinished jobs....
make[3]: *** [scripts/Makefile.build:494: arch/x86] Error 2
make[2]: *** [Makefile:2025: .] Error 2
make[1]: *** [targets/linux.mk:60: build/kernel-6_3/arch/x86/boot/bzImage] Error 2
make: *** [payloads/external/Makefile.mk:401: payloads/external/LinuxBoot/build/Image] Error 2
```
In order to fix it, we will default to the host toolchain in order to
build x86_64 Linux. For that we add another Kconfig that decides,
whether or not a cross toolchain is used to build Linux.
Change-Id: Icaf56d6991d79f629e9ba8c901b441d81921d594
Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com>
---
M payloads/external/LinuxBoot/Kconfig
M payloads/external/LinuxBoot/targets/linux.mk
M payloads/external/Makefile.mk
3 files changed, 22 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/83990/1
diff --git a/payloads/external/LinuxBoot/Kconfig b/payloads/external/LinuxBoot/Kconfig
index 24bfe3f..454b7c5 100644
--- a/payloads/external/LinuxBoot/Kconfig
+++ b/payloads/external/LinuxBoot/Kconfig
@@ -66,12 +66,23 @@
if LINUXBOOT_COMPILE_KERNEL
config LINUXBOOT_CROSS_COMPILE
+ bool "cross compiler"
+ default n if LINUXBOOT_X86_64 # currently coreboots cross toolchain cannot build Linux
+ default y
+ help
+ Enable this option if you want to compile Linux using a cross compiler.
+ The coreboot toolchain also counts as a cross toolchain.
+
+config LINUXBOOT_CROSS_COMPILE_PATH
string "cross compiler"
+ depends on LINUXBOOT_CROSS_COMPILE
default "" # e.g. "aarch64-linux-gnu-"
help
Choose a custom cross compiler toolchain to use.
- It can be useful if you don't want to use the coreboot toolchain
- or experience problems using it.
+ The cross toolchain of coreboot will be used if this option is left empty.
+ If not left empty, it should contain a path to a cross toolchain that is
+ capable of compiling Linux. It can be useful if you don't want to use the
+ coreboot toolchain or experience problems using it for building Linux.
config LINUXBOOT_KERNEL_VERSION
string "kernel version"
diff --git a/payloads/external/LinuxBoot/targets/linux.mk b/payloads/external/LinuxBoot/targets/linux.mk
index 1a882f1..5cd3c54 100644
--- a/payloads/external/LinuxBoot/targets/linux.mk
+++ b/payloads/external/LinuxBoot/targets/linux.mk
@@ -2,9 +2,9 @@
SHELL := /bin/sh
-OBJCOPY:=$(CONFIG_LINUXBOOT_CROSS_COMPILE)objcopy
+OBJCOPY:=$(CONFIG_LINUXBOOT_CROSS_COMPILE_PATH)objcopy
KERNEL_MAKE_FLAGS = \
- CROSS_COMPILE=$(CONFIG_LINUXBOOT_CROSS_COMPILE) \
+ CROSS_COMPILE=$(CONFIG_LINUXBOOT_CROSS_COMPILE_PATH) \
ARCH=$(LINUX_ARCH-y) \
KBUILD_BUILD_USER="coreboot" \
KBUILD_BUILD_HOST="reproducible" \
diff --git a/payloads/external/Makefile.mk b/payloads/external/Makefile.mk
index 53693f5..ac5c856 100644
--- a/payloads/external/Makefile.mk
+++ b/payloads/external/Makefile.mk
@@ -390,9 +390,12 @@
LINUXBOOT_CROSS_COMPILE_ARCH-$(CONFIG_LINUXBOOT_ARM64) = arm64
LINUXBOOT_CROSS_COMPILE_ARCH-$(CONFIG_LINUXBOOT_RISCV_RV32) = riscv
LINUXBOOT_CROSS_COMPILE_ARCH-$(CONFIG_LINUXBOOT_RISCV_RV64) = riscv
-ifeq ($(CONFIG_LINUXBOOT_CROSS_COMPILE),"")
- CONFIG_LINUXBOOT_CROSS_COMPILE=$(CROSS_COMPILE_$(LINUXBOOT_CROSS_COMPILE_ARCH-y))
-endif
+ifeq ($(CONFIG_LINUXBOOT_CROSS_COMPILE),y)
+ifeq ($(CONFIG_LINUXBOOT_CROSS_COMPILE_PATH),"")
+ # use coreboots cross toolchain
+ CONFIG_LINUXBOOT_CROSS_COMPILE_PATH=$(CROSS_COMPILE_$(LINUXBOOT_CROSS_COMPILE_ARCH-y))
+endif # CONFIG_LINUXBOOT_CROSS_COMPILE_PATH
+endif # CONFIG_LINUXBOOT_CROSS_COMPILE
.PHONY: linuxboot
payloads/external/LinuxBoot/build/Image linuxboot:
$(MAKE) -C payloads/external/LinuxBoot \
@@ -403,7 +406,7 @@
CONFIG_LINUXBOOT_ARM64=$(CONFIG_LINUXBOOT_ARM64) \
CONFIG_LINUXBOOT_RISCV_RV32=$(CONFIG_LINUXBOOT_RISCV_RV32) \
CONFIG_LINUXBOOT_RISCV_RV64=$(CONFIG_LINUXBOOT_RISCV_RV64) \
- CONFIG_LINUXBOOT_CROSS_COMPILE=$(CONFIG_LINUXBOOT_CROSS_COMPILE) \
+ CONFIG_LINUXBOOT_CROSS_COMPILE_PATH=$(CONFIG_LINUXBOOT_CROSS_COMPILE_PATH) \
CONFIG_LINUXBOOT_BUILD_INITRAMFS=$(CONFIG_LINUXBOOT_BUILD_INITRAMFS) \
CONFIG_LINUXBOOT_INITRAMFS_PATH=$(CONFIG_LINUXBOOT_INITRAMFS_PATH) \
CONFIG_LINUXBOOT_INITRAMFS_SUFFIX=$(CONFIG_LINUXBOOT_INITRAMFS_SUFFIX) \
--
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