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Change subject: mb/lenovo/thinkcentre_m710s: Disable DRIVER_LENOVO_SERIALS
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Patch Set 1: Code-Review+2
(1 comment)
Patchset:
PS1:
I think the Kconfig could use a bit of cleaning but it's out of scope for this patch
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Change subject: mb/lenovo/thinkcentre_m710s: Drop PCH UPDs from PEG device
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Patch Set 1: Code-Review+2
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Change subject: mb/lenovo/thinkcentre_m710s: Add USB port descriptions
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Patch Set 1: Code-Review+2
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Change subject: soc/intel/common/block/cpu: Round up the number of ways
......................................................................
Patch Set 5:
(1 comment)
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/83982/comment/1c3bf6a5_55c3c89a?us… :
PS5, Line 515: Add one way if there is remainder
the statement should be
```
/*
* Increment `data_ways` by 1 if data_size (CONFIG_DCACHE_RAM_SIZE)
* is not perfectly divisible by way_size (ECX)
*/
```
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Change subject: mb/lenovo/thinkcentre_m710s: Add SMBIOS data for PCIe slots
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Patch Set 1: Code-Review+2
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Change subject: mb/google/brox: Enable storage devices on unprovisioned fw_config
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Patch Set 2: Code-Review+2
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Change subject: util/sconfig: Probe device when fw_config is unprovisioned
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Patch Set 2: Code-Review+2
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Change subject: soc/intel/common/block/cpu: Round up the number of ways
......................................................................
Patch Set 5:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83982/comment/11847146_6dee9ea6?us… :
PS3, Line 7: Fix number of way computation
> looks like you are adding remainder to the quotient after completing divide ? […]
I am not, I am just adding one, basically doing a round up. I clarified in both the code and the commit message.
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/83982/comment/adda8426_f6a3354d?us… :
PS3, Line 516:
> tab
Done
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: soc/intel/common/block/cpu: Round up the number of ways
......................................................................
soc/intel/common/block/cpu: Round up the number of ways
`CONFIG_DCACHE_RAM_SIZE' is not necessarily a multiple of way size. As
a result, when the `div' instruction is called to compute the needed
number of ways, there could be a remainder. When there is, one extra
way should be added to cover `CONFIG_DCACHE_RAM_SIZE'.
BUG=b:360332771
TEST=Verified on PTL Intel reference platform
Change-Id: I5cb66da0aa977eecb64a0021268a6827747c521e
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
1 file changed, 6 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/83982/5
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Change subject: mb/google/brox: Enable storage devices on unprovisioned fw_config
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Patch Set 2:
(1 comment)
Patchset:
PS2:
> I have always been relying on `STORAGE_UNKNOWN` to ensure we are able to boot from either storage de […]
That needs provisioning the FW_CONFIG with value 0 or whatever is equivalent to STORAGE_UNKNOWN. As more devices are built during the later hardware build phases, this is going to be hard to provision the FW_CONFIG with that special value. Also that takes away a field option unnecessarily.
With this change, the plan is to get rid of STORAGE_UNKNOWN.
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