Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83458?usp=email )
Change subject: util/find_usbdebug: Add 8/9 Series PCH rate matching hub IDs
......................................................................
util/find_usbdebug: Add 8/9 Series PCH rate matching hub IDs
The USB IDs of the EHCI rate matching hubs found in these chipsets were
missing, preventing the utility from detecting connected USB devices.
Change-Id: I52858e2c75e8a3e1424a13bcddc2f5ec1216164b
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83458
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
---
M util/find_usbdebug/find_usbdebug.sh
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Felix Singer: Looks good to me, approved
build bot (Jenkins): Verified
diff --git a/util/find_usbdebug/find_usbdebug.sh b/util/find_usbdebug/find_usbdebug.sh
index 53b9a7f..de370b1 100755
--- a/util/find_usbdebug/find_usbdebug.sh
+++ b/util/find_usbdebug/find_usbdebug.sh
@@ -35,7 +35,7 @@
busstr=`printf "Bus %02d" "$bus"`
portstr="Port $port"
- hubs_to_ignore="8087:0020 8087:0024"
+ hubs_to_ignore="8087:0020 8087:0024 8087:8000 8087:8008"
reqlvl=1
found=
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Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID
......................................................................
Patch Set 7:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83981/comment/5685a998_2085d768?us… :
PS4, Line 13: vw_index and position are not continuous in between groups within a
: community.
> > I don't see these vw_index and bit position in EDS. […]
I've asked this morning. waiting for response. I will try my best, but this might not have outcome.
File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/c/coreboot/+/83981/comment/34ef7408_2376f0f7?us… :
PS4, Line 1071: }
> > This condition is to find the the pad from a range & it's offset from the first pad and returns fa […]
sure.
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Change subject: soc/intel/ptl: Add GPIOs for Panther Lake SOC
......................................................................
Patch Set 46:
(1 comment)
File src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h:
https://review.coreboot.org/c/coreboot/+/83789/comment/07b8a312_083153c0?us… :
PS17, Line 544: #define GPP_VGPIO0 246
> The response is that these are for internal only and there is no plan to provide VGPIO info in EDS.
I thought I have seen VGPIO in previous generation EDS as well. EDS is still internal to Intel. May be okay not to keep in datasheet when goes to public. Not sure how one can expect we will able to accommodate for VGPIO if we don't know which community it belongs to?
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Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID
......................................................................
Patch Set 7:
(1 comment)
File src/soc/intel/common/block/gpio/gpio.c:
https://review.coreboot.org/c/coreboot/+/83981/comment/5b54d17c_abf82f6f?us… :
PS4, Line 1071: }
> This condition is to find the the pad from a range & it's offset from the first pad and returns false if not found.
>
> start_pos will take care of PTL community 5 group B:
>
> GPP_B_00: vw_base = 10h start pos = 3
>
> Also, vw_map[i].base will take care of the jumped base and start_pos such as group D in community 5:
> ...
> GPP_B_25: 13h 1
> GPP_D_00: 14h 0 <- not continue to use vw_base 13h start = 2.
> ...
>
> In PTL SOC, this is added to pint to comm5 .vw_map:
> static const struct vw_map ptl_community5_vw_map[] = {
> {0x10, 3},
> {0x14, 0},
> };
>
>
> Also, in community 3:
> ...
> GPP_A_17: 12h 1
> GPP_H_00: 13h 0 <- not continue with vw_base 12h start_pos = 2
> ...
>
> This is added to point to comm5 .vw_map
> static const struct vw_map ptl_community3_vw_map[] = {
> {0x10, 0},
> {0x13, 0},
> };
sure looking forward for the EDS update . Please help to prioritize that as well.
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Change subject: soc/intel/common/gpio: support 16-bit CPU Port ID
......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83981/comment/1940d3d7_c468cc4e?us… :
PS4, Line 13: vw_index and position are not continuous in between groups within a
: community.
> I don't see these vw_index and bit position in EDS. I can provide a brief info here to help understand the existing code for vw_index and position calculation and the purpose of this CL change:
>
> VW index bit position
> com0:
> GPP_C_00: 10h 0 <- base is 0x10 for the community
> ...
> GPP_C_07: 10h 7
> GPP_C_08: 11h 0
> ...
> GPP_C_23: 12h 7
>
> com1:
> GPP_F_00: 10h 0 <- base is 0x10 for the community
> ...
> GPP_F_23: 12h 7
> GPP_E_00: 13h 0
> ...
> GPP_E_22: 15h 6
>
> com3:
> GPP_A_00: 10h 0 <- base is 0x10 for the community
> ...
> GPP_A_17: 12h 1
> GPP_H_00: 13h 0 <- previous positon is 1, but start from 0
> ...
> GPP_H_24: 16h 0
>
> com5:
> GPP_B_00: 10h 3 <- bit position not 0
> ...
> GPP_B_25: 13h 1
> GPP_D_00: 14h 0 <- previous position is 1, skip to start from 0
> ...
> GPP_D_25: 17h 1
can you please ask EDS owner to add this section ? Need to understand this better. I'm still unable to follow what does start_pos refers to in PTL.
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Change subject: soc/intel/common/gpio: vm index changes as PTL vm entries are not continuous
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/google/brox: Enable storage devices on unprovisioned fw_config
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
> Ack. […]
Edit: But to avoid any disruption, we can keep this change in a forward looking manner.
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Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83997?usp=email )
Change subject: soc/intel/common/gpio: vm index changes as PTL vm entries are not continuous
......................................................................
soc/intel/common/gpio: vm index changes as PTL vm entries are not continuous
Add specific virtual wire mapping structure for:
- First pad group does not starts with bit position 0.
- vw_index and position are not continuous in between groups within a
community.
BUG=
TEST=boot to OS and use iotools to read the registers that use 16-bit
port ID such as IOM AUX Bias Ctrl register to verify the 16-bit group
ID field.
Signed-off-by: Cliff Huang <cliff.huang(a)intel.com>
Change-Id: I986d4f4fe59b110e5075cab8742dfe8b336d034b
---
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/common/block/include/intelblocks/gpio.h
2 files changed, 17 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/83997/1
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index d49742d..625c3f4 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -1068,8 +1068,16 @@
if (i == comm->num_vw_entries)
return false;
- offset += pad - comm->vw_entries[i].first_pad;
- *vw_index = comm->vw_base + offset / 8;
+ /* Adjust offset and calculate vw_index based on the mapping type */
+ if (comm->vw_map) {
+ offset = pad - comm->vw_entries[i].first_pad;
+ offset += comm->vw_map[i].start_pos;
+ *vw_index = comm->vw_map[i].base + offset / 8;
+ } else {
+ offset += pad - comm->vw_entries[i].first_pad;
+ offset += comm->vw_base;
+ *vw_index = offset / 8;
+ }
*vw_bit = offset % 8;
return true;
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h
index 39d17a1..a501f7f 100644
--- a/src/soc/intel/common/block/include/intelblocks/gpio.h
+++ b/src/soc/intel/common/block/include/intelblocks/gpio.h
@@ -110,6 +110,12 @@
gpio_t last_pad;
};
+/* virtual-wire mapping base and the starting bit position for a group */
+struct vw_map {
+ uint8_t base;
+ uint8_t start_pos;
+};
+
/* This structure will be used to describe a community or each group within a
* community when multiple groups exist inside a community
*/
@@ -152,6 +158,7 @@
* which they map to VW indexes (beginning with VW base)
*/
const struct vw_entries *vw_entries;
+ const struct vw_map *vw_map;
size_t num_vw_entries;
};
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