coreboot-gerrit July 2024

coreboot-gerrit@coreboot.org

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3025 discussions

[S] Change in libgfxinit[main]: gfxtest: Handle 64-bit aperture base
by Angel Pons (Code Review) 22 Jul '24

22 Jul '24

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/libgfxinit/+/83597?usp=email ) Change subject: gfxtest: Handle 64-bit aperture base ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File gfxtest/hw-gfx-gma-gfx_test.adb: https://review.coreboot.org/c/libgfxinit/+/83597/comment/af557f3d_9f85a646?… : PS1, Line 318: GMA_Phys_Base_Index Why was `Config.GMA_Phys_Base_Index` not used here? I guess some oversight, but might be worth a sentence in the commit message. -- To view, visit https://review.coreboot.org/c/libgfxinit/+/83597?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: libgfxinit Gerrit-Branch: main Gerrit-Change-Id: I4c92190719bd2a066f77061a86b38faa59c6dfb8 Gerrit-Change-Number: 83597 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 22 Jul 2024 14:25:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in libgfxinit[main]: gma: Get DPCD 1.1+ displays out of D3
by Angel Pons (Code Review) 22 Jul '24

22 Jul '24

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/libgfxinit/+/83596?usp=email ) Change subject: gma: Get DPCD 1.1+ displays out of D3 ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/libgfxinit/+/83596/comment/32db04b6_1a02bf37?… : PS1, Line 10: OS' I like using `OSes`, but I'm not going to force you to destroy the text alignment -- To view, visit https://review.coreboot.org/c/libgfxinit/+/83596?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: libgfxinit Gerrit-Branch: main Gerrit-Change-Id: Ieec3813ba99ed3a2c6f701cb34a5e2b226fc14c0 Gerrit-Change-Number: 83596 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 22 Jul 2024 14:23:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in libgfxinit[main]: gma: Get DPCD 1.1+ displays out of D3
by Arthur Heymans (Code Review) 22 Jul '24

22 Jul '24

Attention is currently required from: Nico Huber. Arthur Heymans has posted comments on this change by Nico Huber. ( https://review.coreboot.org/c/libgfxinit/+/83596?usp=email ) Change subject: gma: Get DPCD 1.1+ displays out of D3 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/libgfxinit/+/83596?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: libgfxinit Gerrit-Branch: main Gerrit-Change-Id: Ieec3813ba99ed3a2c6f701cb34a5e2b226fc14c0 Gerrit-Change-Number: 83596 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Mon, 22 Jul 2024 14:10:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/lenovo/t420: Use vendor default power limits
by Anastasios Koutian (Code Review) 22 Jul '24

22 Jul '24

Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83280?usp=email ) Change subject: mb/lenovo/t420: Use vendor default power limits ...................................................................... Patch Set 6: (1 comment) File src/mainboard/lenovo/t420/devicetree.cb: https://review.coreboot.org/c/coreboot/+/83280/comment/9770df1d_8538b4a6?us… : PS6, Line 25: register "pp1_current_limit" = "32" > For future patches, it's a good idea to note this info down somewhere (e.g. […] Thank you for the reminder, I will keep it in mind for future commits 😊 -- To view, visit https://review.coreboot.org/c/coreboot/+/83280?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia187b67ae28fbcda7d5d0e35ec64a3b21d97a21b Gerrit-Change-Number: 83280 Gerrit-PatchSet: 6 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 22 Jul 2024 14:08:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XS] Change in coreboot[main]: util/mtkheader: Add gfh header for mt8196 bootblock code
by Felix Held (Code Review) 22 Jul '24

22 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83569?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: util/mtkheader: Add gfh header for mt8196 bootblock code ...................................................................... util/mtkheader: Add gfh header for mt8196 bootblock code TEST=Build Pass. BUG=b:317009620 Change-Id: Ida203a72c23b94b1848418c9727a5788df421eea Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83569 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M util/mtkheader/gen-bl-img.py 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/mtkheader/gen-bl-img.py b/util/mtkheader/gen-bl-img.py index 1627a79..3201225 100755 --- a/util/mtkheader/gen-bl-img.py +++ b/util/mtkheader/gen-bl-img.py @@ -23,7 +23,8 @@ def gen_gfh_info(chip, data): entries = { 'mt8173': 0x000C1000, - 'mt8183': 0x00201000 + 'mt8183': 0x00201000, + 'mt8196': 0x02001000, } gfh_format = '<44I' -- To view, visit https://review.coreboot.org/c/coreboot/+/83569?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida203a72c23b94b1848418c9727a5788df421eea Gerrit-Change-Number: 83569 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration
by Anastasios Koutian (Code Review) 22 Jul '24

22 Jul '24

Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83271?usp=email ) Change subject: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83271/comment/6c30c788_70770bfb?us… : PS8, Line 10: > New message might be logged: […] Thank you for the comment, I assume this is a suggestion to be included in the commit message? If so, I will keep it in mind for future commits. -- To view, visit https://review.coreboot.org/c/coreboot/+/83271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c65a129478e8ac2c4f66eb3c6aa2507358f82ad Gerrit-Change-Number: 83271 Gerrit-PatchSet: 8 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 22 Jul 2024 14:07:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: soc/mediatek: Move memmory macros into MediaTek common directory
by Felix Held (Code Review) 22 Jul '24

22 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83571?usp=email ) Change subject: soc/mediatek: Move memmory macros into MediaTek common directory ...................................................................... soc/mediatek: Move memmory macros into MediaTek common directory To reduce duplicate memmory macros of MediaTek SoCs, move the header file to a common directory. TEST=Build geralt pass BUG=b:317009620 Change-Id: Iea4add8fe3735085c13438a2e177bec177913191 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83571 Reviewed-by: Yidi Lin <yidilin(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/soc/mediatek/common/include/soc/memlayout.h M src/soc/mediatek/mt8173/memlayout.ld M src/soc/mediatek/mt8183/memlayout.ld M src/soc/mediatek/mt8186/include/soc/memlayout.ld M src/soc/mediatek/mt8188/include/soc/memlayout.ld M src/soc/mediatek/mt8195/include/soc/memlayout.ld 6 files changed, 28 insertions(+), 88 deletions(-) Approvals: build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved diff --git a/src/soc/mediatek/common/include/soc/memlayout.h b/src/soc/mediatek/common/include/soc/memlayout.h new file mode 100644 index 0000000..f51c2a1 --- /dev/null +++ b/src/soc/mediatek/common/include/soc/memlayout.h @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <memlayout.h> +#include <arch/header.ld> + +/* + * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. + * It will be returned before starting the ramstage. + * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. + */ +#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) +#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) +#define DRAM_INIT_CODE(addr, size) \ + REGION(dram_init_code, addr, size, 64K) + +#define DRAM_DMA(addr, size) \ + REGION(dram_dma, addr, size, 4K) \ + _ = ASSERT(size % 4K == 0, \ + "DRAM DMA buffer should be multiple of smallest page size (4K)!"); + +#define EARLY_INIT(addr, size) \ + REGION(early_init_data, addr, size, 4) diff --git a/src/soc/mediatek/mt8173/memlayout.ld b/src/soc/mediatek/mt8173/memlayout.ld index 224dbda..c593853 100644 --- a/src/soc/mediatek/mt8173/memlayout.ld +++ b/src/soc/mediatek/mt8173/memlayout.ld @@ -1,21 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <memlayout.h> - -#include <arch/header.ld> - -/* - * SRAM_L2C is the half part of L2 cache that we borrow it to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) - -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#include <soc/memlayout.h> SECTIONS { diff --git a/src/soc/mediatek/mt8183/memlayout.ld b/src/soc/mediatek/mt8183/memlayout.ld index c5d9d08..b1b9027 100644 --- a/src/soc/mediatek/mt8183/memlayout.ld +++ b/src/soc/mediatek/mt8183/memlayout.ld @@ -1,23 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <memlayout.h> - -#include <arch/header.ld> - -/* - * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) -#define DRAM_INIT_CODE(addr, size) \ - REGION(dram_init_code, addr, size, 4) - -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#include <soc/memlayout.h> SECTIONS { diff --git a/src/soc/mediatek/mt8186/include/soc/memlayout.ld b/src/soc/mediatek/mt8186/include/soc/memlayout.ld index f927b60..a47e7c5 100644 --- a/src/soc/mediatek/mt8186/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8186/include/soc/memlayout.ld @@ -1,23 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <memlayout.h> - -#include <arch/header.ld> - -/* - * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) -#define DRAM_INIT_CODE(addr, size) \ - REGION(dram_init_code, addr, size, 64K) - -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#include <soc/memlayout.h> SECTIONS { diff --git a/src/soc/mediatek/mt8188/include/soc/memlayout.ld b/src/soc/mediatek/mt8188/include/soc/memlayout.ld index ed3b71b..3dc386e 100644 --- a/src/soc/mediatek/mt8188/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8188/include/soc/memlayout.ld @@ -1,19 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ -#include <memlayout.h> -#include <arch/header.ld> -/* - * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) -#define DRAM_INIT_CODE(addr, size) \ - REGION(dram_init_code, addr, size, 64K) -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); +#include <soc/memlayout.h> + SECTIONS { /* MT8188 has 192KB SRAM in total. */ diff --git a/src/soc/mediatek/mt8195/include/soc/memlayout.ld b/src/soc/mediatek/mt8195/include/soc/memlayout.ld index 06806c5..ec8fa9c 100644 --- a/src/soc/mediatek/mt8195/include/soc/memlayout.ld +++ b/src/soc/mediatek/mt8195/include/soc/memlayout.ld @@ -1,26 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only OR MIT */ -#include <memlayout.h> - -#include <arch/header.ld> - -/* - * SRAM_L2C is the half part of L2 cache that we borrow to be used as SRAM. - * It will be returned before starting the ramstage. - * SRAM_L2C and SRAM can be cached, but only SRAM is DMA-able. - */ -#define SRAM_L2C_START(addr) REGION_START(sram_l2c, addr) -#define SRAM_L2C_END(addr) REGION_END(sram_l2c, addr) -#define DRAM_INIT_CODE(addr, size) \ - REGION(dram_init_code, addr, size, 64K) - -#define DRAM_DMA(addr, size) \ - REGION(dram_dma, addr, size, 4K) \ - _ = ASSERT(size % 4K == 0, \ - "DRAM DMA buffer should be multiple of smallest page size (4K)!"); - -#define EARLY_INIT(addr, size) \ - REGION(early_init_data, addr, size, 4) +#include <soc/memlayout.h> SECTIONS { -- To view, visit https://review.coreboot.org/c/coreboot/+/83571?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea4add8fe3735085c13438a2e177bec177913191 Gerrit-Change-Number: 83571 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: soc/mediatek: Move symbols.h into MediaTek common directory
by Felix Held (Code Review) 22 Jul '24

22 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83570?usp=email ) Change subject: soc/mediatek: Move symbols.h into MediaTek common directory ...................................................................... soc/mediatek: Move symbols.h into MediaTek common directory To reduce duplicate region declarations of MediaTek SoCs, move the header file to a common directory. BUG=b:317009620 TEST=Build geralt pass. Change-Id: Iad1c9f520cdc5c6ad2b55e8f4ec6149fa47b17b1 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83570 Reviewed-by: Yidi Lin <yidilin(a)google.com> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- A src/soc/mediatek/common/include/soc/symbols.h D src/soc/mediatek/mt8173/include/soc/symbols.h D src/soc/mediatek/mt8183/include/soc/symbols.h D src/soc/mediatek/mt8186/include/soc/symbols.h D src/soc/mediatek/mt8188/include/soc/symbols.h D src/soc/mediatek/mt8192/include/soc/symbols.h D src/soc/mediatek/mt8195/include/soc/symbols.h 7 files changed, 10 insertions(+), 56 deletions(-) Approvals: build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved diff --git a/src/soc/mediatek/common/include/soc/symbols.h b/src/soc/mediatek/common/include/soc/symbols.h new file mode 100644 index 0000000..5e1c705 --- /dev/null +++ b/src/soc/mediatek/common/include/soc/symbols.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef _SOC_MEDIATEK_COMMON_SYMBOLS_H_ +#define _SOC_MEDIATEK_COMMON_SYMBOLS_H_ + +#include <symbols.h> + +DECLARE_REGION(dram_dma) + +#endif /* _SOC_MEDIATEK_COMMON_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8173/include/soc/symbols.h b/src/soc/mediatek/mt8173/include/soc/symbols.h deleted file mode 100644 index ae5d998..0000000 --- a/src/soc/mediatek/mt8173/include/soc/symbols.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef __SOC_MEDIATEK_MT8173_DRAM_DMA_H__ -#define __SOC_MEDIATEK_MT8173_DRAM_DMA_H__ -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif diff --git a/src/soc/mediatek/mt8183/include/soc/symbols.h b/src/soc/mediatek/mt8183/include/soc/symbols.h deleted file mode 100644 index 2c281b4..0000000 --- a/src/soc/mediatek/mt8183/include/soc/symbols.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _SOC_MEDIATEK_MT8183_SYMBOLS_H_ -#define _SOC_MEDIATEK_MT8183_SYMBOLS_H_ -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif /* _SOC_MEDIATEK_MT8183_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8186/include/soc/symbols.h b/src/soc/mediatek/mt8186/include/soc/symbols.h deleted file mode 100644 index 7610224..0000000 --- a/src/soc/mediatek/mt8186/include/soc/symbols.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _SOC_MEDIATEK_MT8186_SYMBOLS_H_ -#define _SOC_MEDIATEK_MT8186_SYMBOLS_H_ - -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif /* _SOC_MEDIATEK_MT8186_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8188/include/soc/symbols.h b/src/soc/mediatek/mt8188/include/soc/symbols.h deleted file mode 100644 index fcda1ef..0000000 --- a/src/soc/mediatek/mt8188/include/soc/symbols.h +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ - -#ifndef _SOC_MEDIATEK_MT8188_SYMBOLS_H_ -#define _SOC_MEDIATEK_MT8188_SYMBOLS_H_ - -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif /* _SOC_MEDIATEK_MT8188_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8192/include/soc/symbols.h b/src/soc/mediatek/mt8192/include/soc/symbols.h deleted file mode 100644 index a7feee7..0000000 --- a/src/soc/mediatek/mt8192/include/soc/symbols.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _SOC_MEDIATEK_MT8192_SYMBOLS_H_ -#define _SOC_MEDIATEK_MT8192_SYMBOLS_H_ -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif /* _SOC_MEDIATEK_MT8192_SYMBOLS_H_ */ diff --git a/src/soc/mediatek/mt8195/include/soc/symbols.h b/src/soc/mediatek/mt8195/include/soc/symbols.h deleted file mode 100644 index 2a102eb..0000000 --- a/src/soc/mediatek/mt8195/include/soc/symbols.h +++ /dev/null @@ -1,9 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ - -#ifndef _SOC_MEDIATEK_MT8195_SYMBOLS_H_ -#define _SOC_MEDIATEK_MT8195_SYMBOLS_H_ -#include <symbols.h> - -DECLARE_REGION(dram_dma) - -#endif /* _SOC_MEDIATEK_MT8195_SYMBOLS_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/83570?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iad1c9f520cdc5c6ad2b55e8f4ec6149fa47b17b1 Gerrit-Change-Number: 83570 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xi Chen <xixi.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: Makefile.mk: Mark stack as not executable
by Felix Held (Code Review) 22 Jul '24

22 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83560?usp=email ) Change subject: Makefile.mk: Mark stack as not executable ...................................................................... Makefile.mk: Mark stack as not executable Suppress the warning: missing .note.GNU-stack section implies executable stack NOTE: This behaviour is deprecated and will be removed in a future version of the linker Since we don't need an executable stack this is fine. Some newer linkers like LLD even default to this. Change-Id: Ib787cc464e0924ab57575cec9fbfd1d59bdd3481 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83560 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile.mk 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved Nico Huber: Looks good to me, approved diff --git a/Makefile.mk b/Makefile.mk index 0123bd5..e9ad2cc 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -603,6 +603,7 @@ LDFLAGS_common += -nostdlib LDFLAGS_common += --nmagic LDFLAGS_common += -static +LDFLAGS_common += -z noexecstack # Disable warning on segments with RWX. # All loadable sections are placed in the same segment for simplicity. LDFLAGS_common += --no-warn-rwx-segments -- To view, visit https://review.coreboot.org/c/coreboot/+/83560?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib787cc464e0924ab57575cec9fbfd1d59bdd3481 Gerrit-Change-Number: 83560 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: Makefile.mk: Remove linker warning on RWX segments
by Felix Held (Code Review) 22 Jul '24

22 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83559?usp=email ) Change subject: Makefile.mk: Remove linker warning on RWX segments ...................................................................... Makefile.mk: Remove linker warning on RWX segments Silence a linker warnings about segments with RWX. Having one segment for all sections is a good design choice as it makes parsing the elf into a loadable binary simpler. Change-Id: I1e0f51c69dabaea314ac45924474d446a9ab68f4 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83559 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile.mk 1 file changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Felix Singer: Looks good to me, approved diff --git a/Makefile.mk b/Makefile.mk index b4532c3..0123bd5 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -603,6 +603,9 @@ LDFLAGS_common += -nostdlib LDFLAGS_common += --nmagic LDFLAGS_common += -static +# Disable warning on segments with RWX. +# All loadable sections are placed in the same segment for simplicity. +LDFLAGS_common += --no-warn-rwx-segments # Workaround for RISC-V linker bug, merge back into above line when fixed. # https://sourceware.org/bugzilla/show_bug.cgi?id=27180 -- To view, visit https://review.coreboot.org/c/coreboot/+/83559?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e0f51c69dabaea314ac45924474d446a9ab68f4 Gerrit-Change-Number: 83559 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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