Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83444?usp=email )
Change subject: soc/amd/common/root_complex: move IOHC_MMIO_EN definition to header
......................................................................
soc/amd/common/root_complex: move IOHC_MMIO_EN definition to header
To be able to use the IOHC_MMIO_EN define in other compilation units,
move the define to the corresponding header file.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: If88950418406d1709ed95b3d05f7e6ad66438f95
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83444
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit(a)gmail.com>
---
M src/soc/amd/common/block/include/amdblocks/root_complex.h
M src/soc/amd/common/block/root_complex/non_pci_resources.c
2 files changed, 2 insertions(+), 2 deletions(-)
Approvals:
build bot (Jenkins): Verified
Varshit Pandya: Looks good to me, approved
Martin Roth: Looks good to me, approved
diff --git a/src/soc/amd/common/block/include/amdblocks/root_complex.h b/src/soc/amd/common/block/include/amdblocks/root_complex.h
index 767221e..9ef5d05 100644
--- a/src/soc/amd/common/block/include/amdblocks/root_complex.h
+++ b/src/soc/amd/common/block/include/amdblocks/root_complex.h
@@ -11,6 +11,8 @@
#define SMN_IOHC_MISC_BASE_13D1 0x13d10000
#define SMN_IOHC_MISC_BASE_13E1 0x13e10000
+#define IOHC_MMIO_EN BIT(0)
+
#define NON_PCI_RES_IDX_AUTO 0
struct non_pci_mmio_reg {
diff --git a/src/soc/amd/common/block/root_complex/non_pci_resources.c b/src/soc/amd/common/block/root_complex/non_pci_resources.c
index 54f3de2..1e2e235 100644
--- a/src/soc/amd/common/block/root_complex/non_pci_resources.c
+++ b/src/soc/amd/common/block/root_complex/non_pci_resources.c
@@ -5,8 +5,6 @@
#include <device/device.h>
#include <types.h>
-#define IOHC_MMIO_EN BIT(0)
-
void read_non_pci_resources(struct device *domain, unsigned long *idx)
{
const uint32_t iohc_misc_base = get_iohc_misc_smn_base(domain);
--
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Gerrit-MessageType: merged
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Gerrit-Change-Id: If88950418406d1709ed95b3d05f7e6ad66438f95
Gerrit-Change-Number: 83444
Gerrit-PatchSet: 2
Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83474?usp=email )
Change subject: payloads/edk2/Makefile: Add $(EDK2_PATH) as dependency for 'gop_driver' target
......................................................................
payloads/edk2/Makefile: Add $(EDK2_PATH) as dependency for 'gop_driver' target
Without this, when doing a clean build with 'make j$(nproc)`, the build
can fail copying the GOP driver file since the target directory does
not exist yet.
TEST=build/boot google/hatch (akemi) w/edk2 payload and GOP driver init
on a clean git checkout.
Change-Id: Ic510d70041dc099e6bc469528b80d1e271976655
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83474
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
Reviewed-by: Sean Rhodes <sean(a)starlabs.systems>
---
M payloads/external/edk2/Makefile
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
Sean Rhodes: Looks good to me, approved
diff --git a/payloads/external/edk2/Makefile b/payloads/external/edk2/Makefile
index ef3327e..3966b91 100644
--- a/payloads/external/edk2/Makefile
+++ b/payloads/external/edk2/Makefile
@@ -222,7 +222,7 @@
BMP3:$(EDK2_PATH)/MdeModulePkg/Logo/Logo.bmp;; \
esac \
-gop_driver:
+gop_driver: $(EDK2_PATH)
if [ -n "$(CONFIG_EDK2_GOP_DRIVER)" ]; then \
echo "Using GOP driver $(CONFIG_EDK2_GOP_FILE)"; \
cp $(top)/$(CONFIG_EDK2_GOP_FILE) $(EDK2_PATH)/UefiPayloadPkg/IntelGopDriver.efi; \
--
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Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/libgfxinit/+/83596?usp=email )
Change subject: gma: Get DPCD 1.1+ displays out of D3
......................................................................
gma: Get DPCD 1.1+ displays out of D3
DPCD 1.1 added a field to switch the DP sink into D3 and back. Linux
(and potentially other OS') apparently makes use of it when shutting
down, also for a reboot. This can lead to display failures in core-
boot on a reboot. So we signal any DPCD 1.1+ display unconditionally
to go into D0 before DP training.
Change-Id: Ieec3813ba99ed3a2c6f701cb34a5e2b226fc14c0
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
---
M common/hw-gfx-gma-connector_info.adb
1 file changed, 22 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/96/83596/1
diff --git a/common/hw-gfx-gma-connector_info.adb b/common/hw-gfx-gma-connector_info.adb
index 47292f6..7122eac 100644
--- a/common/hw-gfx-gma-connector_info.adb
+++ b/common/hw-gfx-gma-connector_info.adb
@@ -12,10 +12,13 @@
-- GNU General Public License for more details.
--
+with HW.GFX.DP_Defs;
+
with HW.GFX.GMA.Config;
with HW.GFX.GMA.Panel;
with HW.GFX.GMA.DP_Dual_Mode;
with HW.GFX.GMA.DP_Info;
+with HW.GFX.GMA.DP_Aux_Ch;
with HW.Debug;
with GNAT.Source_Info;
@@ -26,6 +29,8 @@
(Port_Cfg : in out Port_Config;
Success : out Boolean)
is
+ use type Word8;
+
DP_Port : constant GMA.DP_Port :=
(if Config.Has_Type_C_Ports
then
@@ -76,6 +81,23 @@
Success => Success);
pragma Debug (Success, DP_Info.Dump_Link_Setting (Port_Cfg.DP));
end if;
+
+ -- Get DP sinks out of power-save mode
+ if Success and Port_Cfg.DP.Receiver_Caps.Rev >= 16#11# then
+ declare
+ DPCD_SINK_CONTROL : constant := 16#00600#;
+ DPCD_SINK_CONTROL_D0 : constant DP_Defs.Aux_Payload :=
+ (1 * 2 ** 0, others => 0);
+ Ignored : Boolean;
+ begin
+ DP_Aux_Ch.Aux_Write
+ (Port => DP_Port,
+ Address => DPCD_SINK_CONTROL,
+ Length => 1,
+ Data => DPCD_SINK_CONTROL_D0,
+ Success => Ignored);
+ end;
+ end if;
else
Success := True;
end if;
--
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Krystian Hebel has posted comments on this change by Sergii Dmytruk. ( https://review.coreboot.org/c/coreboot/+/67065?usp=email )
Change subject: 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER
......................................................................
Patch Set 39:
(1 comment)
File src/soc/ibm/power9/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/67065/comment/31daeae8_69b2bc4e?us… :
PS39, Line 17: ifneq ($(CONFIG_SIGNING_KEYS_DIR),"")
Isn't it reversed now?
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Change subject: 3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER
......................................................................
3rdparty/open-power-signing-utils: add SecureBoot utility for OpenPOWER
Signing is performed with test keys by default, set
CONFIG_SIGNING_KEYS_DIR to non-empty value to use other keys.
Change-Id: Id88baef5ecb1f8ffd74a7f464bbbaaaea0ca643d
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M .gitmodules
A 3rdparty/open-power-signing-utils
M Makefile.mk
M src/soc/ibm/power9/Kconfig
M src/soc/ibm/power9/Makefile.mk
5 files changed, 51 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/67065/39
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Change subject: ppc64: Kconfig switch for bootblock in SEEPROM, zero HRMOR
......................................................................
ppc64: Kconfig switch for bootblock in SEEPROM, zero HRMOR
On PPC64 each address is logically OR'ed with HRMOR (Hypervisor Real
Mode Offset Register) before it is dispatched to the underlying memory,
meaning that memory space overlaps at the least significant bit set in
HRMOR. coreboot is entered with HRMOR = 4GB-128MB both on hardware
(when started by hostboot bootloader) and in Qemu in hb-mode. This means
that memory overlaps every 128MB in this particular case. HRMOR can be
explicitly ignored when MSB of an address is set, but this would require
using different memory model for linking.
If we zero HRMOR in bootblock, linking can be done against real address.
This greatly simplifies memory layout and allows to forget about HRMOR
from that point on.
Signed-off-by: Krystian Hebel <krystian.hebel(a)3mdeb.com>
Signed-off-by: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
Change-Id: I0170463968c91b943c4b0dc15fe73fa616a164da
---
M src/arch/ppc64/Makefile.mk
M src/arch/ppc64/bootblock_crt0.S
M src/mainboard/emulation/qemu-power8/memlayout.ld
M src/mainboard/emulation/qemu-power9/memlayout.ld
M src/mainboard/raptor-cs/talos-2/Kconfig
A src/mainboard/raptor-cs/talos-2/board-bootblock-in-seeprom.fmd
A src/mainboard/raptor-cs/talos-2/board.fmd
M src/mainboard/raptor-cs/talos-2/memlayout.ld
M src/soc/ibm/power9/Makefile.mk
9 files changed, 352 insertions(+), 57 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/67067/41
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Change subject: device/azalia: Clear busy bit after failed verb command
......................................................................
Patch Set 1: Code-Review+1
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Hello Felix Singer, Nico Huber, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Change subject: southbridge/intel: Use azalia_audio_init() instead of duplicating code
......................................................................
southbridge/intel: Use azalia_audio_init() instead of duplicating code
There are some differences between the southbridge's codec_detect()
removed in this patch, and in the generic function found in
device/azalia_device.c:
- Generic function locks the GCAP register
- Generic function clears and checks the STATESTS register
- Generic function uses 15 bits for codec_mask instead of 4 bits
Change-Id: Ie174ba29c115e3a3419362602d3e3175c9a03708
Signed-off-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>
---
M src/southbridge/intel/i82801gx/azalia.c
M src/southbridge/intel/i82801ix/azalia.c
M src/southbridge/intel/i82801jx/azalia.c
3 files changed, 3 insertions(+), 128 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/83504/5
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