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Change subject: arch/riscv: Remove opensbi submodule includes
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Patch Set 1: Code-Review+2
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Change subject: security/vboot: Introduce vbnv_platform_init_cmos()
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> Is this really a vboot thing? Doesn't that bank selection affect all coreboot use of the CMOS, not j […]
Maybe I didn't explain this clear enough in the commit message.
Yes, the bank selection should be applied prior to any CMOS access on AMD. `__cmos_init()` already selects bank 0. The problem is, that function is not called until ramstage, but CMOS RAM is accessed in verstage. Therefore we need a hook in vboot code.
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Change subject: mb/intel/avenuecity_crb: Update SMBIOS info for type 0,1,2,3
......................................................................
Patch Set 5:
(3 comments)
File src/mainboard/intel/avenuecity_crb/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83328/comment/c4e8aa20_3f1e0565?us… :
PS5, Line 12: const char *smbios_mainboard_bios_version(void)
: {
: return "UNKNOWN";
: }
> Default if unset is the coreboot version, which IMHO is more useful than "UNKNOWN": https://github. […]
Done
https://review.coreboot.org/c/coreboot/+/83328/comment/d161a649_54646796?us… :
PS5, Line 24: return "UNKNOWN";
> Most of these default to empty strings. Will this code be changed in the future (e.g. […]
smbios_defaults.c definitely helps a lot!
Applied the same updates as indicated in https://review.coreboot.org/c/coreboot/+/83327.
https://review.coreboot.org/c/coreboot/+/83328/comment/169a4873_66c09e34?us… :
PS5, Line 52: u8 smbios_chassis_power_cords(void)
: {
: return 1;
: }
> Same as default, can be omitted: https://github. […]
Done
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Change subject: mb/intel/beechnutcity_crb: Update SMBIOS info for type 0,1,2,3
......................................................................
Patch Set 6:
(3 comments)
File src/mainboard/intel/beechnutcity_crb/ramstage.c:
https://review.coreboot.org/c/coreboot/+/83327/comment/d40f4ec3_f78ccbea?us… :
PS5, Line 14: return "UNKNOWN";
> Default if unset is the coreboot version, which IMHO is more useful than "UNKNOWN": https://github. […]
Done
https://review.coreboot.org/c/coreboot/+/83327/comment/db3a9d96_9511ed0a?us… :
PS5, Line 24: return "UNKNOWN";
> Most of these default to empty strings. Will this code be changed in the future (e.g. […]
There is no plan to further update the board info, the intention of these changes is to set examples for variant board changes in future. The smbios_defaults.c definitely helps on this purpose better. I updated this patch accordingly.
https://review.coreboot.org/c/coreboot/+/83327/comment/4e0a285b_8841def4?us… :
PS5, Line 52: u8 smbios_chassis_power_cords(void)
: {
: return 1;
: }
> Same as default, can be omitted: https://github. […]
Done
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Change subject: mb/intel/avenuecity_crb: Update SMBIOS info for type 0,1,2,3
......................................................................
mb/intel/avenuecity_crb: Update SMBIOS info for type 0,1,2,3
Update wake-up type, mainboard feature flags and enclosure type.
All other info are used from src/lib/smbios_defaults.c
Change-Id: I8e68c057fefa1d408fb8d69fef066cb573c929a4
Signed-off-by: Li, Jincheng <jincheng.li(a)intel.com>
---
M src/mainboard/intel/avenuecity_crb/ramstage.c
1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/83328/6
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Change subject: mb/intel/beechnutcity_crb: Update SMBIOS info for type 0,1,2,3
......................................................................
mb/intel/beechnutcity_crb: Update SMBIOS info for type 0,1,2,3
Update wake-up type, mainboard feature flags and enclosure type.
All other info are used from src/lib/smbios_defaults.c
Change-Id: I8a7d4958171df121e2cd3acb3a71554c695d64ab
Signed-off-by: Li, Jincheng <jincheng.li(a)intel.com>
---
M src/mainboard/intel/beechnutcity_crb/ramstage.c
1 file changed, 19 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/83327/6
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Change subject: ec/google/chromeec: Drop ability to build Chrome-EC, PD components
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Patch Set 1: Code-Review+2
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Change subject: ec/google/chromeec: Drop 'choice' selections for EC and PD firmware
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Change subject: security/vboot: Introduce vbnv_platform_init_cmos()
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
Is this really a vboot thing? Doesn't that bank selection affect all coreboot use of the CMOS, not just vboot (e.g. CONFIG_USE_OPTION_TABLE if it's enabled)? I'm wondering if this shouldn't go into the main CMOS driver instead (i.e. `__cmos_init()`).
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