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Change subject: ec/google/chromeec: Drop 'choice' selections for EC and PD firmware
......................................................................
Patch Set 3:
(1 comment)
File src/ec/google/chromeec/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/83639/comment/eb179bb3_00083fd3?us… :
PS2, Line 73: CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE))
> This line is still needed.
Done
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Change subject: ec/google/chromeec: Drop 'choice' selections for EC and PD firmware
......................................................................
Patch Set 2:
(1 comment)
File src/ec/google/chromeec/Makefile.mk:
https://review.coreboot.org/c/coreboot/+/83639/comment/496af561_4ecf3781?us… :
PS2, Line 73: CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_FIRMWARE_FILE))
This line is still needed.
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Change subject: ec/google/chromeec: Drop 'choice' selections for EC and PD firmware
......................................................................
Patch Set 2: Code-Review+1
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Change subject: ec/google/chromeec: Drop ability to build Chrome-EC, PD components
......................................................................
Patch Set 1: Code-Review+1
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Change subject: soc/amd/common/psp_gen2: use MMIO access again
......................................................................
Patch Set 4:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83448/comment/428ad76c_ee9489c2?us… :
PS4, Line 15: Since the fist get_psp_mmio_base call in SMM will be done in ramstage
> first?
Done
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Hello Fred Reitberger, Jason Glenesk, Martin Roth, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83448?usp=email
to look at the new patch set (#5).
Change subject: soc/amd/common/psp_gen2: use MMIO access again
......................................................................
soc/amd/common/psp_gen2: use MMIO access again
Now that we have a get_psp_mmio_base function that will work on all SoCs
that use the psp_gen2 code, we can move back to accessing the PSP
registers via their MMIO mapping. This sort-of reverts
commit 198cc26e4951 ("soc/amd/common/block/psp/psp_gen2: use SMN access
to PSP").
Since the first get_psp_mmio_base call in SMM will be done in ramstage
when coreboot triggers the APM_CNT_SMMINFO SMI which results in
psp_notify_smm being called, the PSP MMIO base address will already be
saved to the static variable inside get_psp_mmio_base, so we don't have
to worry about get_psp_mmio_base potentially clobbering the SMN index
register during OS runtime. Right now, this doesn't matter, since the
only PSP mailbox command from the SMI handler after coreboot is done and
the OS has taken over will be during the S3/S4/S5 entry which will be
triggered by the OS as last step after is done with all its preparations
for suspend/shutdown. There will however be future patches that add SMI-
handlers that can send PSP mailbox commands during OS runtime where we
have to make sure to not clobber the SMN index register.
TEST=PSP mailbox commands are still sent correctly on Mandolin.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I25f16d575991021d65b7b578956d9f90bfd15f6c
---
M src/soc/amd/common/block/psp/psb.c
M src/soc/amd/common/block/psp/psp_gen2.c
2 files changed, 43 insertions(+), 26 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/83448/5
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Change subject: soc/amd/common/psp_gen2: return status from soc_read_c2p38
......................................................................
Patch Set 4: Code-Review+2
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Change subject: soc/amd/common/block/psp_gen2: add get_psp_mmio_base
......................................................................
Patch Set 3: Code-Review+2
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Change subject: soc/amd/*/root_complex: introduce and use domain_iohc_info struct
......................................................................
Patch Set 2: Code-Review+2
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Change subject: soc/amd/common/psp_gen2: use MMIO access again
......................................................................
Patch Set 4: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83448/comment/3b0471e5_444a3de8?us… :
PS4, Line 15: Since the fist get_psp_mmio_base call in SMM will be done in ramstage
first?
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