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Change subject: Documentation/drivers/smmstorev2.md: describe capsule update API
......................................................................
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Change subject: drivers/smmstore: add logic to disable capsule update handling code
......................................................................
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Change subject: drivers/smmstore: add ability to write to whole flash
......................................................................
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Change subject: configs/config.msi_ms7d25_ddr4: enable UEFI capsule updates
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Change subject: dasharo/uefi_capsules.c: coalesce and store UEFI capsules
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Change subject: drivers/efi: add optional ESRT-friendly coreboot table tag
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Change subject: i2c/drivers/generic: Add support for including a CDM
......................................................................
i2c/drivers/generic: Add support for including a CDM
Chip Direct Mapping is exclusive to Windows; it allows specifying the
position where a chip is mounted. There are 8 positions and a _CDM
method should return 0xabcd0X, where X is the position.
Tested by booting Windows 11 on the StarLite Mk V, rotating the device
and checking the orientation is correct, where previously, it was
inverted.
Change-Id: If70c25288d835df7064b4051c43abeb2d6531f3b
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81409
Reviewed-by: Angel Pons <th3fanbus(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/drivers/i2c/generic/chip.h
M src/drivers/i2c/generic/generic.c
2 files changed, 32 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Angel Pons: Looks good to me, approved
diff --git a/src/drivers/i2c/generic/chip.h b/src/drivers/i2c/generic/chip.h
index 227cb61..69ce29d 100644
--- a/src/drivers/i2c/generic/chip.h
+++ b/src/drivers/i2c/generic/chip.h
@@ -81,6 +81,31 @@
bool has_rotation_matrix;
int rotation_matrix[9];
+ /*
+ * Chip Direct Mapping is exclusive to Windows, a allows specifying the
+ * position where a chip is mounted. There are 8 positions:
+ * 1: 90 Degrees
+ * 2: 270 Degrees
+ * 3: 180 Degrees
+ * 4: 0 Degrees
+ * 5: 90 Degrees (Inverted)
+ * 6: 270 Degrees (Inverted)
+ * 7: 180 Degrees (Inverted)
+ * 8: 0 Degrees (Inverted)
+ *
+ * The _CDM method should return 0xabcd0X, where X is the position.
+ */
+ enum {
+ CDM_NOT_PRESENT = 0,
+ CDM_ROT_90,
+ CDM_ROT_180,
+ CDM_ROT_270,
+ CDM_ROT_0,
+ CDM_ROT_90_INVERT,
+ CDM_ROT_180_INVERT,
+ CDM_ROT_270_INVERT,
+ CDM_ROT_0_INVERT,
+ } cdm_index;
/* Generic properties for exporting device-specific data to the OS */
struct acpi_dp property_list[MAX_GENERIC_PROPERTY_LIST];
diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c
index 98c59e6..1875bac 100644
--- a/src/drivers/i2c/generic/generic.c
+++ b/src/drivers/i2c/generic/generic.c
@@ -165,6 +165,13 @@
acpigen_pop_len();
}
+ /* Chip Direct Mapping */
+ if (config->cdm_index != CDM_NOT_PRESENT) {
+ acpigen_write_method("_CDM", 1);
+ acpigen_write_return_integer(0xabcd00 | config->cdm_index);
+ acpigen_pop_len();
+ }
+
/* Callback if any. */
if (callback)
callback(dev);
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Change subject: soc/intel/adl: Update DCACHE_BSP_STACK_SIZE for Brox
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
I tried 64 KiB for Coreboot, but CAR is too full with that. Hence settled down to 32 KiB.
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Hello Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/83680?usp=email
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Change subject: soc/intel/adl: Update DCACHE_BSP_STACK_SIZE for Brox
......................................................................
soc/intel/adl: Update DCACHE_BSP_STACK_SIZE for Brox
During the stages which use Cache-as-RAM (CAR), coreboot needs more than
1 KiB as configured in DCACHE_BSP_STACK_SIZE. Hence update that config
for Brox. For other boards since it is part of RO, update it on need
basis.
BUG=None
TEST=Build Brox BIOS image and boot to OS.
Change-Id: I723ba1f4289c393fe7376f989d760b26e75b33da
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/83680/2
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