coreboot-gerrit July 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mb/google/corsola/var/wugtrio: Add LCE_LMFBX101117480 MIPI panel
by Felix Held (Code Review) 01 Jul '24

01 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83221?usp=email ) Change subject: mb/google/corsola/var/wugtrio: Add LCE_LMFBX101117480 MIPI panel ...................................................................... mb/google/corsola/var/wugtrio: Add LCE_LMFBX101117480 MIPI panel Add LCE_LMFBX101117480 MIPI panel for Wugtrio. Datasheet: LMFBX101117480-10.1-TLCM-24.05.20-2.pdf BUG=b:331870701 TEST=emerge-staryu coreboot chromeos-bootimage BRANCH=corsola Change-Id: I863e172400ffb26b5c9c240a21d15c6a2240b4ad Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83221 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/mainboard/google/corsola/Kconfig M src/mainboard/google/corsola/panel_wugtrio.c 2 files changed, 9 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yidi Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig index 6baaeac..41f9845 100644 --- a/src/mainboard/google/corsola/Kconfig +++ b/src/mainboard/google/corsola/Kconfig @@ -70,6 +70,7 @@ select FW_CONFIG select FW_CONFIG_SOURCE_CHROMEEC_CBI select MIPI_PANEL_KD_KD101NE3_40TI if BOARD_GOOGLE_WUGTRIO + select MIPI_PANEL_LCE_LMFBX101117480 if BOARD_GOOGLE_WUGTRIO select MIPI_PANEL_STA_ER88577 if BOARD_GOOGLE_WUGTRIO select MIPI_PANEL_STA_HIMAX83102_J02 if BOARD_GOOGLE_STARMIE select MIPI_PANEL_STA_ILI9882T if BOARD_GOOGLE_STARMIE diff --git a/src/mainboard/google/corsola/panel_wugtrio.c b/src/mainboard/google/corsola/panel_wugtrio.c index c8a8971..0603ce0 100644 --- a/src/mainboard/google/corsola/panel_wugtrio.c +++ b/src/mainboard/google/corsola/panel_wugtrio.c @@ -41,6 +41,14 @@ .disp_path = DISP_PATH_MIPI, .orientation = LB_FB_ORIENTATION_RIGHT_UP, }, + /* LCE Corporation panel with bias IC on it */ + [7] = { + .configure_backlight = backlight_control, + .power_on = mipi_panel_power_on, + .name = "LCE_LMFBX101117480", + .disp_path = DISP_PATH_MIPI, + .orientation = LB_FB_ORIENTATION_RIGHT_UP, + }, }; struct panel_description *get_panel_description(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/83221?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I863e172400ffb26b5c9c240a21d15c6a2240b4ad Gerrit-Change-Number: 83221 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: drivers/mipi: Add support for LCE_LMFBX101117480 panel
by Felix Held (Code Review) 01 Jul '24

01 Jul '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83220?usp=email ) Change subject: drivers/mipi: Add support for LCE_LMFBX101117480 panel ...................................................................... drivers/mipi: Add support for LCE_LMFBX101117480 panel Add STA panel LCE_LMFBX101117480 serializable data to CBFS. Datasheet: LMFBX101117480-10.1-TLCM-24.05.20-2.pdf About the init code, we communicated with the vendor through the datasheet to confirm the writing method of each register value. BUG=b:331870701 TEST=build and check the CBFS includes the panel BRANCH=None Change-Id: I60858109e4b07f720461e320212d7b197ec1130c Signed-off-by: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83220 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/drivers/mipi/Kconfig M src/drivers/mipi/Makefile.mk A src/drivers/mipi/panel-LCE_LMFBX101117480.c 3 files changed, 235 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Yu-Ping Wu: Looks good to me, approved Xuxin Xiong: Looks good to me, but someone else must approve Yidi Lin: Looks good to me, approved diff --git a/src/drivers/mipi/Kconfig b/src/drivers/mipi/Kconfig index 4f3257f..d70e92d 100644 --- a/src/drivers/mipi/Kconfig +++ b/src/drivers/mipi/Kconfig @@ -48,6 +48,9 @@ config MIPI_PANEL_KD_KD101NE3_40TI bool +config MIPI_PANEL_LCE_LMFBX101117480 + bool + config MIPI_PANEL_STA_2081101QFH032011_53G bool diff --git a/src/drivers/mipi/Makefile.mk b/src/drivers/mipi/Makefile.mk index 3890917..a71cff6 100644 --- a/src/drivers/mipi/Makefile.mk +++ b/src/drivers/mipi/Makefile.mk @@ -25,6 +25,8 @@ panel-params-$(CONFIG_MIPI_PANEL_KD_KD101NE3_40TI) += panel-KD_KD101NE3_40TI +panel-params-$(CONFIG_MIPI_PANEL_LCE_LMFBX101117480) += panel-LCE_LMFBX101117480 + panel-params-$(CONFIG_MIPI_PANEL_STA_2081101QFH032011_53G) += panel-STA_2081101QFH032011_53G panel-params-$(CONFIG_MIPI_PANEL_STA_ER88577) += panel-STA_ER88577 panel-params-$(CONFIG_MIPI_PANEL_STA_HIMAX83102_J02) += panel-STA_HIMAX83102_J02 diff --git a/src/drivers/mipi/panel-LCE_LMFBX101117480.c b/src/drivers/mipi/panel-LCE_LMFBX101117480.c new file mode 100644 index 0000000..4714017 --- /dev/null +++ b/src/drivers/mipi/panel-LCE_LMFBX101117480.c @@ -0,0 +1,230 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <mipi/panel.h> + +struct panel_serializable_data LCE_LMFBX101117480 = { + .edid = { + .ascii_string = "LMFBX101117480", + .manufacturer_name = "LCE", + .panel_bits_per_color = 8, + .panel_bits_per_pixel = 24, + .mode = { + .pixel_clock = 70595, + .lvds_dual_channel = 0, + .refresh = 60, + .ha = 800, .hbl = 90, .hso = 30, .hspw = 30, + .va = 1280, .vbl = 42, .vso = 30, .vspw = 4, + .phsync = '-', .pvsync = '-', + .x_mm = 135, .y_mm = 216, + }, + }, + .init = { + PANEL_DELAY(24), + PANEL_DCS(0xE0, 0x00), + PANEL_DCS(0xE1, 0x93), + PANEL_DCS(0xE2, 0x65), + PANEL_DCS(0xE3, 0xF8), + PANEL_DCS(0x80, 0x03), + PANEL_DCS(0xE0, 0x01), + PANEL_DCS(0x0C, 0x74), + PANEL_DCS(0x17, 0x00), + PANEL_DCS(0x18, 0xBF), + PANEL_DCS(0x19, 0x00), + PANEL_DCS(0x1A, 0x00), + PANEL_DCS(0x1B, 0xBF), + PANEL_DCS(0x1C, 0x00), + PANEL_DCS(0x1F, 0x70), + PANEL_DCS(0x20, 0x2D), + PANEL_DCS(0x21, 0x2D), + PANEL_DCS(0x22, 0x7E), + PANEL_DCS(0x24, 0xFE), + PANEL_DCS(0x37, 0x19), + PANEL_DCS(0x35, 0x28), + PANEL_DCS(0x38, 0x05), + PANEL_DCS(0x39, 0x08), + PANEL_DCS(0x3A, 0x12), + PANEL_DCS(0x3C, 0x78), + PANEL_DCS(0x3D, 0xFF), + PANEL_DCS(0x3E, 0xFF), + PANEL_DCS(0x3F, 0x7F), + PANEL_DCS(0x40, 0x06), + PANEL_DCS(0x41, 0xA0), + PANEL_DCS(0x43, 0x1E), + PANEL_DCS(0x44, 0x0B), + PANEL_DCS(0x0C, 0x74), + PANEL_DCS(0x55, 0x02), + PANEL_DCS(0x56, 0x01), + PANEL_DCS(0x57, 0x8E), + PANEL_DCS(0x58, 0x09), + PANEL_DCS(0x59, 0x0A), + PANEL_DCS(0x5A, 0x2E), + PANEL_DCS(0x5B, 0x1A), + PANEL_DCS(0x5C, 0x15), + PANEL_DCS(0x5D, 0x7F), + PANEL_DCS(0x5E, 0x69), + PANEL_DCS(0x5F, 0x59), + PANEL_DCS(0x60, 0x4E), + PANEL_DCS(0x61, 0x4C), + PANEL_DCS(0x62, 0x40), + PANEL_DCS(0x63, 0x45), + PANEL_DCS(0x64, 0x30), + PANEL_DCS(0x65, 0x4A), + PANEL_DCS(0x66, 0x49), + PANEL_DCS(0x67, 0x4A), + PANEL_DCS(0x68, 0x68), + PANEL_DCS(0x69, 0x57), + PANEL_DCS(0x6A, 0x5B), + PANEL_DCS(0x6B, 0x4E), + PANEL_DCS(0x6C, 0x49), + PANEL_DCS(0x6D, 0x24), + PANEL_DCS(0x6E, 0x12), + PANEL_DCS(0x6F, 0x02), + PANEL_DCS(0x70, 0x7F), + PANEL_DCS(0x71, 0x69), + PANEL_DCS(0x72, 0x59), + PANEL_DCS(0x73, 0x4E), + PANEL_DCS(0x74, 0x4C), + PANEL_DCS(0x75, 0x40), + PANEL_DCS(0x76, 0x45), + PANEL_DCS(0x77, 0x30), + PANEL_DCS(0x78, 0x4A), + PANEL_DCS(0x79, 0x49), + PANEL_DCS(0x7A, 0x4A), + PANEL_DCS(0x7B, 0x68), + PANEL_DCS(0x7C, 0x57), + PANEL_DCS(0x7D, 0x5B), + PANEL_DCS(0x7E, 0x4E), + PANEL_DCS(0x7F, 0x49), + PANEL_DCS(0x80, 0x24), + PANEL_DCS(0x81, 0x12), + PANEL_DCS(0x82, 0x02), + PANEL_DCS(0xE0, 0x02), + PANEL_DCS(0x00, 0x52), + PANEL_DCS(0x01, 0x55), + PANEL_DCS(0x02, 0x55), + PANEL_DCS(0x03, 0x50), + PANEL_DCS(0x04, 0x77), + PANEL_DCS(0x05, 0x57), + PANEL_DCS(0x06, 0x55), + PANEL_DCS(0x07, 0x4E), + PANEL_DCS(0x08, 0x4C), + PANEL_DCS(0x09, 0x5F), + PANEL_DCS(0x0A, 0x4A), + PANEL_DCS(0x0B, 0x48), + PANEL_DCS(0x0C, 0x55), + PANEL_DCS(0x0D, 0x46), + PANEL_DCS(0x0E, 0x44), + PANEL_DCS(0x0F, 0x40), + PANEL_DCS(0x10, 0x55), + PANEL_DCS(0x11, 0x55), + PANEL_DCS(0x12, 0x55), + PANEL_DCS(0x13, 0x55), + PANEL_DCS(0x14, 0x55), + PANEL_DCS(0x15, 0x55), + PANEL_DCS(0x16, 0x53), + PANEL_DCS(0x17, 0x55), + PANEL_DCS(0x18, 0x55), + PANEL_DCS(0x19, 0x51), + PANEL_DCS(0x1A, 0x77), + PANEL_DCS(0x1B, 0x57), + PANEL_DCS(0x1C, 0x55), + PANEL_DCS(0x1D, 0x4F), + PANEL_DCS(0x1E, 0x4D), + PANEL_DCS(0x1F, 0x5F), + PANEL_DCS(0x20, 0x4B), + PANEL_DCS(0x21, 0x49), + PANEL_DCS(0x22, 0x55), + PANEL_DCS(0x23, 0x47), + PANEL_DCS(0x24, 0x45), + PANEL_DCS(0x25, 0x41), + PANEL_DCS(0x26, 0x55), + PANEL_DCS(0x27, 0x55), + PANEL_DCS(0x28, 0x55), + PANEL_DCS(0x29, 0x55), + PANEL_DCS(0x2A, 0x55), + PANEL_DCS(0x2B, 0x55), + PANEL_DCS(0x2C, 0x13), + PANEL_DCS(0x2D, 0x15), + PANEL_DCS(0x2E, 0x15), + PANEL_DCS(0x2F, 0x01), + PANEL_DCS(0x30, 0x37), + PANEL_DCS(0x31, 0x17), + PANEL_DCS(0x32, 0x15), + PANEL_DCS(0x33, 0x0D), + PANEL_DCS(0x34, 0x0F), + PANEL_DCS(0x35, 0x15), + PANEL_DCS(0x36, 0x05), + PANEL_DCS(0x37, 0x07), + PANEL_DCS(0x38, 0x15), + PANEL_DCS(0x39, 0x09), + PANEL_DCS(0x3A, 0x0B), + PANEL_DCS(0x3B, 0x11), + PANEL_DCS(0x3C, 0x15), + PANEL_DCS(0x3D, 0x15), + PANEL_DCS(0x3E, 0x15), + PANEL_DCS(0x3F, 0x15), + PANEL_DCS(0x40, 0x15), + PANEL_DCS(0x41, 0x15), + PANEL_DCS(0x42, 0x12), + PANEL_DCS(0x43, 0x15), + PANEL_DCS(0x44, 0x15), + PANEL_DCS(0x45, 0x00), + PANEL_DCS(0x46, 0x37), + PANEL_DCS(0x47, 0x17), + PANEL_DCS(0x48, 0x15), + PANEL_DCS(0x49, 0x0C), + PANEL_DCS(0x4A, 0x0E), + PANEL_DCS(0x4B, 0x15), + PANEL_DCS(0x4C, 0x04), + PANEL_DCS(0x4D, 0x06), + PANEL_DCS(0x4E, 0x15), + PANEL_DCS(0x4F, 0x08), + PANEL_DCS(0x50, 0x0A), + PANEL_DCS(0x51, 0x10), + PANEL_DCS(0x52, 0x15), + PANEL_DCS(0x53, 0x15), + PANEL_DCS(0x54, 0x15), + PANEL_DCS(0x55, 0x15), + PANEL_DCS(0x56, 0x15), + PANEL_DCS(0x57, 0x15), + PANEL_DCS(0x58, 0x40), + PANEL_DCS(0x5B, 0x10), + PANEL_DCS(0x5C, 0x06), + PANEL_DCS(0x5D, 0x40), + PANEL_DCS(0x5E, 0x00), + PANEL_DCS(0x5F, 0x00), + PANEL_DCS(0x60, 0x40), + PANEL_DCS(0x61, 0x03), + PANEL_DCS(0x62, 0x04), + PANEL_DCS(0x63, 0x6C), + PANEL_DCS(0x64, 0x6C), + PANEL_DCS(0x65, 0x75), + PANEL_DCS(0x66, 0x08), + PANEL_DCS(0x67, 0xB4), + PANEL_DCS(0x68, 0x08), + PANEL_DCS(0x69, 0x6C), + PANEL_DCS(0x6A, 0x6C), + PANEL_DCS(0x6B, 0x0C), + PANEL_DCS(0x6D, 0x00), + PANEL_DCS(0x6E, 0x00), + PANEL_DCS(0x6F, 0x88), + PANEL_DCS(0x75, 0xBB), + PANEL_DCS(0x76, 0x00), + PANEL_DCS(0x77, 0x05), + PANEL_DCS(0x78, 0x2A), + PANEL_DCS(0xE0, 0x04), + PANEL_DCS(0x02, 0x23), + PANEL_DCS(0x09, 0x11), + PANEL_DCS(0x0E, 0x48), + PANEL_DCS(0x36, 0x49), + PANEL_DCS(0x2B, 0x08), + PANEL_DCS(0x2E, 0x03), + PANEL_DCS(0xE0, 0x00), + PANEL_DCS(0xE6, 0x02), + PANEL_DCS(0xE7, 0x06), + PANEL_DCS(0x11, 0x00), + PANEL_DELAY(120), + PANEL_DCS(0x29, 0x00), + PANEL_DELAY(50), + }, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/83220?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I60858109e4b07f720461e320212d7b197ec1130c Gerrit-Change-Number: 83220 Gerrit-PatchSet: 3 Gerrit-Owner: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: mb: source site-local mainboard Kconfig.name and Kconfig files
by Jonathon Hall (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Alexander Couzens, Angel Pons, David Hendricks, Evgeny Zinoviev, Felix Held, Felix Singer, Jeremy Soller, Martin L Roth, Matt DeVillier, Michael Niewöhner, Michał Żygowski, Philipp Hug, Piotr Król, Ron Minnich, Sean Rhodes, Tim Crawford. Jonathon Hall has posted comments on this change by Martin L Roth. ( https://review.coreboot.org/c/coreboot/+/83119?usp=email ) Change subject: mb: source site-local mainboard Kconfig.name and Kconfig files ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Yeah. […] @foss@mniewoehner.de - you can extend a choice from another Kconfig if the choice is named, like `choice MAINBOARD_MODEL_<vendor>` (mentioned this in another comment too - https://review.coreboot.org/c/coreboot/+/83119/comments/52813f26_fffaa591). Still requires modifying the in-tree Kconfigs though since they don't have names right now. -- To view, visit https://review.coreboot.org/c/coreboot/+/83119?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4106fea7197c979e6648ebbbbaa107070c916727 Gerrit-Change-Number: 83119 Gerrit-PatchSet: 2 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:35:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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[XS] Change in coreboot[main]: util/crossgcc: Update ACPICA from 20230628 to 20240321
by Maximilian Brune (Code Review) 01 Jul '24

01 Jul '24

Maximilian Brune has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/81671?usp=email ) Change subject: util/crossgcc: Update ACPICA from 20230628 to 20240321 ...................................................................... -- To view, visit https://review.coreboot.org/c/coreboot/+/81671?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: revert Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I41f56ba58af51b1ec1d7554fb35a49ccf9e778f6 Gerrit-Change-Number: 81671 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com>

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[XS] Change in coreboot[main]: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321"
by Maximilian Brune (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Elyes Haouas, Felix Singer, Martin L Roth. Hello Felix Singer, build bot (Jenkins), Martin L Roth, Elyes Haouas, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/83296?usp=email to review the following change. Change subject: Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321" ...................................................................... Revert "util/crossgcc: Update ACPICA from 20230628 to 20240321" This reverts commit 41fdb882f1f0c3cda41651c2e9c920580415a0dc. Reason for revert: The version downloaded does not match the version that is printed out when executing `iasl --version`. Coreboot notices that and refuses to compile QEMU-Q35 mainboard. I tested it on 2 different PCs. Change-Id: I3ce0c5798f14162eaa063a9a64e16e6dbbb9e468 TODO: Someone please confirm --- M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix-20230628_iasl.patch A util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum D util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum 4 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/83296/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index c35fc78..0691a5f2 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -40,7 +40,7 @@ MPC_VERSION=1.3.1 GCC_VERSION=13.2.0 BINUTILS_VERSION=2.42 -IASL_VERSION=20240321 +IASL_VERSION="20230628" # CLANG version number CLANG_VERSION=17.0.6 CMAKE_VERSION=3.29.3 @@ -74,7 +74,7 @@ MPC_BASE_URL="https://ftpmirror.gnu.org/mpc" GCC_BASE_URL="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}" BINUTILS_BASE_URL="https://ftpmirror.gnu.org/binutils" -IASL_BASE_URL="https://downloadmirror.intel.com/819451" +IASL_BASE_URL="https://downloadmirror.intel.com/783534" # CLANG toolchain archive locations LLVM_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" CLANG_BASE_URL="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERS…" diff --git a/util/crossgcc/patches/acpica-unix-20240321_iasl.patch b/util/crossgcc/patches/acpica-unix-20230628_iasl.patch similarity index 100% rename from util/crossgcc/patches/acpica-unix-20240321_iasl.patch rename to util/crossgcc/patches/acpica-unix-20230628_iasl.patch diff --git a/util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum b/util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum new file mode 100644 index 0000000..9b676bb --- /dev/null +++ b/util/crossgcc/sum/acpica-unix-20230628.tar.gz.cksum @@ -0,0 +1 @@ +3b893fb771cf3fbd3531de3036e1a5bfc624c9d2 tarballs/acpica-unix-20230628.tar.gz diff --git a/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum b/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum deleted file mode 100644 index e7b7afe..0000000 --- a/util/crossgcc/sum/acpica-unix-20240321.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -19f5b03de6de059a95432d17ed24095262a97aba tarballs/acpica-unix-20240321.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/83296?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3ce0c5798f14162eaa063a9a64e16e6dbbb9e468 Gerrit-Change-Number: 83296 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[L] Change in coreboot[main]: treewide: Add generation of CFR Tables
by Angel Pons (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Maximilian Brune. Angel Pons has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/82494?usp=email ) Change subject: treewide: Add generation of CFR Tables ...................................................................... Patch Set 7: (1 comment) File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/82494/comment/cf212da8_af4ee30f?us… : PS7, Line 568: __weak > Then you have another weak function. […] Well, this function would stop being weak. And weak no-op functions are "OK". Alternatively, don't provide an empty weak definition and introduce a Kconfig symbol to guard the `mainboard_update_sot_table()` function call. -- To view, visit https://review.coreboot.org/c/coreboot/+/82494?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3408e9166139a95b7dcf4b151472a01951597133 Gerrit-Change-Number: 82494 Gerrit-PatchSet: 7 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:34:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[L] Change in coreboot[main]: treewide: Add generation of CFR Tables
by Maximilian Brune (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Angel Pons, Arthur Heymans, Martin L Roth. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/82494?usp=email ) Change subject: treewide: Add generation of CFR Tables ...................................................................... Patch Set 7: (2 comments) File src/lib/coreboot_table.c: https://review.coreboot.org/c/coreboot/+/82494/comment/fce927eb_008f8fec?us… : PS7, Line 568: __weak > What does Atlas need to do? If possible, I'd suggest having something like `void __weak mainboard_up […] Then you have another weak function. But I see that having an extra specific `mainboard_*` weak function might be beneficial. https://review.coreboot.org/c/coreboot/+/82494/comment/5ef55a40_079e00bc?us… : PS7, Line 575: size_t size = cbfs_load("fallback/sot", sot_buf, MAX_SOT_SIZE); > Is there a way to get the uncompressed size of a CBFS file at runtime? If so, it would be nice to us […] I guess I could just use `cbfs_cbmem_alloc()`. Will try that. -- To view, visit https://review.coreboot.org/c/coreboot/+/82494?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3408e9166139a95b7dcf4b151472a01951597133 Gerrit-Change-Number: 82494 Gerrit-PatchSet: 7 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:26:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Anastasios Koutian (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Angel Pons, Patrick Rudolph, Paul Menzel. Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83269/comment/7dbb2d1a_2ddd6c3c?us… : PS2, Line 9: Tested on ThinkPad T420 with the i7-3940XM. > Set pl1=35000000 and pl2=43750000 microwatts in t420/devicetree.cb […] Correction, `$ sudo iotools mmio_read32 "${MCH_PKG_POWER_LIMIT_LO}"` => 0x0000815e should be `$ sudo iotools mmio_read32 "${MCH_PKG_POWER_LIMIT_HI}"` => 0x0000815e -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:16:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Anastasios Koutian (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Angel Pons, Patrick Rudolph, Paul Menzel. Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83269/comment/afe7f342_ecb8985f?us… : PS2, Line 9: Tested on ThinkPad T420 with the i7-3940XM. > Can you please elaborate, how you tested this? Set pl1=35000000 and pl2=43750000 microwatts in t420/devicetree.cb Built and flashed Confirmed power limits are 35000000 and 43750000 in sysfs intel-rapl-msr interface: `$ cat /sys/devices/virtual/powercap/intel-rapl/intel-rapl:0/constraint_0_power_limit_uw` and `$ cat /sys/devices/virtual/powercap/intel-rapl/intel-rapl:0/constraint_1_power_limit_uw` Also confirmed the same limits are applied in MCHBAR: `$ MSR_PKG_POWER_LIMIT=0x610` `$ MCH_PKG_POWER_LIMIT_LO=0xfed159a0` `$ MCH_PKG_POWER_LIMIT_HI=0xfed159a4` `$ sudo iotools mmio_read32 "${MCH_PKG_POWER_LIMIT_LO}"` => 0x00dc8118 `$ sudo iotools mmio_read32 "${MCH_PKG_POWER_LIMIT_LO}"` => 0x0000815e `$ sudo rdmsr -c "${MSR_PKG_POWER_LIMIT}"` => 0x815e00dc8118 Finally, run stress test: `$ stress-ng -c 8 --cpu-method matrixprod` while monitoring processor package power using Intel PCM (https://github.com/intel/pcm) -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:09:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/geralt: change config to FW_config for support TAS2563 audi...
by Rui Zhou (Code Review) 01 Jul '24

01 Jul '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu, cong yang. Rui Zhou has posted comments on this change by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/83287?usp=email ) Change subject: mb/google/geralt: change config to FW_config for support TAS2563 audio amp ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83287/comment/36f78194_524018b4?us… : PS8, Line 7: support TAS2563 audio amp > You also change other logic, don’t you, that fw_config is used for `GERALT_USE_MAX98390`. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/83287?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie9f0cbc30dd950b85581fc1924fa351efe1e0aab Gerrit-Change-Number: 83287 Gerrit-PatchSet: 9 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: cong yang <yangcong5(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 01 Jul 2024 13:00:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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coreboot-gerrit July 2024