coreboot-gerrit July 2024

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Subrata Banik, Tarun. Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... Patch Set 25: (3 comments) File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/83354/comment/6a9c4083_7752c6e6?us… : PS22, Line 10: select PLATFORM_USES_FSP2_4 > Done Done File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/83354/comment/d8646827_93221291?us… : PS22, Line 74: 0x4010800000 > > we have used below macro. […] Sure, added. https://review.coreboot.org/c/coreboot/+/83354/comment/fa97fc0d_3c4904d7?us… : PS22, Line 76: 0x401080FFFF > > The value is correct, 0x401080FFFF = ((0x4010800000 + 0x10000) -1) […] Sure, added macro. -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 25 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 11:29:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83354?usp=email to look at the new patch set (#25). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock List of changes: 1. Add required Pather Lake SoC programming till bootblock. 2. Include only required headers into include/soc. 3. Include PTL related DID, BDF. 4. Ref: Processor EDS documents vol0.51 #815002 BUG=b:348678529 TEST=verified on Panther Lake Simics PSS using google/fatcat mainboard. Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- A src/soc/intel/pantherlake/Kconfig A src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/bootblock/bootblock.c A src/soc/intel/pantherlake/bootblock/pcd.c A src/soc/intel/pantherlake/bootblock/report_platform.c A src/soc/intel/pantherlake/espi.c A src/soc/intel/pantherlake/include/soc/bootblock.h A src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pci_devs.h A src/soc/intel/pantherlake/include/soc/pcr_ids.h A src/soc/intel/pantherlake/include/soc/pm.h A src/soc/intel/pantherlake/include/soc/smbus.h A src/soc/intel/pantherlake/include/soc/soc_info.h A src/soc/intel/pantherlake/soc_info.c 15 files changed, 1,271 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83354/25 -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 25 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[L] Change in coreboot[main]: mb/google/nissa: Create teliks variant
by Subrata Banik (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng. Subrata Banik has posted comments on this change by Qinghong Zeng. ( https://review.coreboot.org/c/coreboot/+/83408?usp=email ) Change subject: mb/google/nissa: Create teliks variant ...................................................................... Patch Set 16: (1 comment) File src/mainboard/google/brya/variants/teliks/data.vbt: PS16: > link: https://review.coreboot.org/c/coreboot/+/83376 > in patchset13 | Jul 17 1:16 PM > Karthik's comment: Can you please add the required data.vbt file in this CL? Without that, jenkins is reporting failure. > Ideally the automation script needs to be updated too, but we can update this CL for now before updating the automation script. Karthik's comment is for older generation platform (dedede) and I don't see data.vbt in any latest Brya based devices except Anragger. Hence, interested to know what is failing and why not failing for most of the device. -- To view, visit https://review.coreboot.org/c/coreboot/+/83408?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I744f4d7c2d35544d3a8a8f76e24bad3298442768 Gerrit-Change-Number: 83408 Gerrit-PatchSet: 16 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 11:29:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83354?usp=email to look at the new patch set (#24). Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock List of changes: 1. Add required Pather Lake SoC programming till bootblock. 2. Include only required headers into include/soc. 3. Include PTL related DID, BDF. 4. Ref: Processor EDS documents vol0.51 #815002 BUG=b:348678529 TEST=verified on Panther Lake Simics PSS using google/fatcat mainboard. Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- A src/soc/intel/pantherlake/Kconfig A src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/bootblock/bootblock.c A src/soc/intel/pantherlake/bootblock/pcd.c A src/soc/intel/pantherlake/bootblock/report_platform.c A src/soc/intel/pantherlake/espi.c A src/soc/intel/pantherlake/include/soc/bootblock.h A src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pci_devs.h A src/soc/intel/pantherlake/include/soc/pcr_ids.h A src/soc/intel/pantherlake/include/soc/pm.h A src/soc/intel/pantherlake/include/soc/smbus.h A src/soc/intel/pantherlake/include/soc/soc_info.h A src/soc/intel/pantherlake/soc_info.c 15 files changed, 1,266 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83354/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 24 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[L] Change in coreboot[main]: mb/google/nissa: Create teliks variant
by Qinghong Zeng (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Qinghong Zeng has posted comments on this change by Qinghong Zeng. ( https://review.coreboot.org/c/coreboot/+/83408?usp=email ) Change subject: mb/google/nissa: Create teliks variant ...................................................................... Patch Set 16: (1 comment) File src/mainboard/google/brya/variants/teliks/data.vbt: PS16: > > Can we refer to Karthik's comment? […] link: https://review.coreboot.org/c/coreboot/+/83376 in patchset13 | Jul 17 1:16 PM Karthik's comment: Can you please add the required data.vbt file in this CL? Without that, jenkins is reporting failure. Ideally the automation script needs to be updated too, but we can update this CL for now before updating the automation script. -- To view, visit https://review.coreboot.org/c/coreboot/+/83408?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I744f4d7c2d35544d3a8a8f76e24bad3298442768 Gerrit-Change-Number: 83408 Gerrit-PatchSet: 16 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 30 Jul 2024 11:14:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Subrata Banik (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun. Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... Patch Set 23: (2 comments) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/83354/comment/d97d8f48_dd4aaffc?us… : PS22, Line 74: 0x4010800000 > we have used below macro. > ((long int) Ps2bMmioBase | (int) (((Offset) & 0x0F0000) << 8) | ((unsigned char)(Pid) << 16) | (short int) ((Offset) & 0xFFFF)) > > Where, Ps2bMmioBase = 0x4010000000, Offset = 0x0, Pid = 0x80 Please add this logic inside the comment section. https://review.coreboot.org/c/coreboot/+/83354/comment/f1c7a9f5_51691b3c?us… : PS22, Line 76: 0x401080FFFF > The value is correct, 0x401080FFFF = ((0x4010800000 + 0x10000) -1) use macro. instead yet one more hardcoded value -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 23 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 11:11:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Subrata Banik, Tarun. Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83354?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... Patch Set 23: (4 comments) Patchset: PS19: > > *to […] Hi Subrata, we are using same for PTL as well, "UDK_202302_BINDING" File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/83354/comment/268ab4ec_2da71b37?us… : PS22, Line 10: select PLATFORM_USES_FSP2_4 > kindly follow the order (this is help) Done File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/83354/comment/87fa259b_ed7b373f?us… : PS22, Line 74: 0x4010800000 > if possible, please specify the magic calculation that you have used here to derive the IOM BAR we have used below macro. ((long int) Ps2bMmioBase | (int) (((Offset) & 0x0F0000) << 8) | ((unsigned char)(Pid) << 16) | (short int) ((Offset) & 0xFFFF)) Where, Ps2bMmioBase = 0x4010000000, Offset = 0x0, Pid = 0x80 https://review.coreboot.org/c/coreboot/+/83354/comment/a760a498_68b10ecf?us… : PS22, Line 76: 0x401080FFFF > (IOM_BASE_ADDR + IOM_BASE_SIZE - 1) The value is correct, 0x401080FFFF = ((0x4010800000 + 0x10000) -1) -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 23 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 11:01:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Saurabh Mishra <mishra.saurabh(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock
by Saurabh Mishra (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Ashish Kumar Mishra, Dinesh Gehlot, Eran Mitrani, Felix Singer, Jakub Czapiga, Jérémy Compostella, Kapil Porwal, Saurabh Mishra, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83354?usp=email to look at the new patch set (#23). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock ...................................................................... soc/intel/ptl: Do initial Panther Lake SoC commit till bootblock List of changes: 1. Add required Pather Lake SoC programming till bootblock. 2. Include only required headers into include/soc. 3. Include PTL related DID, BDF. 4. Ref: Processor EDS documents vol0.51 #815002 BUG=b:348678529 TEST=verified on Panther Lake Simics PSS using google/fatcat mainboard. Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Signed-off-by: Saurabh Mishra <mishra.saurabh(a)intel.com> --- A src/soc/intel/pantherlake/Kconfig A src/soc/intel/pantherlake/Makefile.mk A src/soc/intel/pantherlake/bootblock/bootblock.c A src/soc/intel/pantherlake/bootblock/pcd.c A src/soc/intel/pantherlake/bootblock/report_platform.c A src/soc/intel/pantherlake/espi.c A src/soc/intel/pantherlake/include/soc/bootblock.h A src/soc/intel/pantherlake/include/soc/iomap.h A src/soc/intel/pantherlake/include/soc/p2sb.h A src/soc/intel/pantherlake/include/soc/pci_devs.h A src/soc/intel/pantherlake/include/soc/pcr_ids.h A src/soc/intel/pantherlake/include/soc/pm.h A src/soc/intel/pantherlake/include/soc/smbus.h A src/soc/intel/pantherlake/include/soc/soc_info.h A src/soc/intel/pantherlake/soc_info.c 15 files changed, 1,265 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83354/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/83354?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibcfe71eec27cebf04f10ec343a73dd92f1272aca Gerrit-Change-Number: 83354 Gerrit-PatchSet: 23 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add acpigen_write_pci_root_port
by Patrick Rudolph (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82252?usp=email ) Change subject: soc/intel/xeon_sp: Add acpigen_write_pci_root_port ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/xeon_sp/acpi.c: https://review.coreboot.org/c/coreboot/+/82252/comment/037ec8c2_6d0eba3c?us… : PS6, Line 192: PCI_SECONDARY_BUS are there root ports that do not act as a bridge and thus have PCI_SECONDARY_BUS==0? -- To view, visit https://review.coreboot.org/c/coreboot/+/82252?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I434fea7880a463c2027abfa22ba2b3bb985815c0 Gerrit-Change-Number: 82252 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 10:46:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add acpigen_write_pci_root_port
by Patrick Rudolph (Code Review) 30 Jul '24

30 Jul '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82252?usp=email ) Change subject: soc/intel/xeon_sp: Add acpigen_write_pci_root_port ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/xeon_sp/acpi.c: https://review.coreboot.org/c/coreboot/+/82252/comment/d84a6988_83576f2d?us… : PS4, Line 194: acpigen_write_BBN > Hi Patrick, in patch set 5, I removed the _BBN generation for PCI root port for alignment for UEFI i […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82252?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I434fea7880a463c2027abfa22ba2b3bb985815c0 Gerrit-Change-Number: 82252 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 30 Jul 2024 10:45:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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