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Change subject: mb/google/nissa: Create teliks variant
......................................................................
Patch Set 16:
(1 comment)
File src/mainboard/google/brya/variants/teliks/data.vbt:
PS16:
> Can we refer to Karthik's comment?
can you please share the link ? sorry unable t find the comment that you are referring
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Change subject: src: Include new gbb flag to enforce cse sync
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83685/comment/0bc31794_01dcc3a7?us… :
PS1, Line 12:
> > to make sure this is test only GBB
>
> I think all the GBB flags are for testing or development purposes. Real users should not be able to modify GBB flags without unlocking RO. Therefore maybe no need to highlight that in this particular flag?
I am a little hesitant to proceed because FAFT GBB has been used by users to implement various workarounds in coreboot, depthcharge, and other areas. As a result, I want to be sure that we clearly state that this is only for testing the CSE sync feature and should not be used to implement any other workarounds.
File src/security/vboot/Kconfig:
https://review.coreboot.org/c/coreboot/+/83685/comment/7d4d09ee_24d12b91?us… :
PS1, Line 454: CSME
> I actually don't know the difference between CSE and CSME (and ME). I remember Reka said in somewhere that they are the same thing. Is that not correct?
CS (converged security) + ME (manageability engine) = CSME
We often use the CSE part alone because ME part is dependent of the use case like enterprise etc.
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Change subject: payloads/external/edk2: configure capsule updates
......................................................................
Patch Set 1:
(1 comment)
File payloads/external/edk2/Makefile:
https://review.coreboot.org/c/coreboot/+/83682/comment/6a62e09d_db0b181c?us… :
PS1, Line 151: ifneq ($(CONFIG_DRIVERS_EFI_UPDATE_CAPSULES),)
This is inside `ifeq ($(CONFIG_EDK2_REPO_MRCHROMEBOX),y)`, shouldn't this be part of upstream edk2 or at least common options instead?
Possibly related to discussion in CB:82721
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Change subject: Makefile.mk: Remove linker warning on RWX segments
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
> > This breaks building with binutils < 2.39. […]
We have xcompile for such cases: CB:83693
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Change subject: [UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile
......................................................................
[UNTESTED] Makefile: Move `--no-warn-rwx-segments' into xcompile
Change-Id: I02982769ae2c356f037a747e85d155368bfcb730
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M Makefile.mk
M util/xcompile/xcompile
2 files changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/83693/1
diff --git a/Makefile.mk b/Makefile.mk
index e9ad2cc..901d6b2 100644
--- a/Makefile.mk
+++ b/Makefile.mk
@@ -604,9 +604,6 @@
LDFLAGS_common += --nmagic
LDFLAGS_common += -static
LDFLAGS_common += -z noexecstack
-# Disable warning on segments with RWX.
-# All loadable sections are placed in the same segment for simplicity.
-LDFLAGS_common += --no-warn-rwx-segments
# Workaround for RISC-V linker bug, merge back into above line when fixed.
# https://sourceware.org/bugzilla/show_bug.cgi?id=27180
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index b3012b5..4c5285f 100755
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -208,6 +208,12 @@
testcc "$GCC" "$CFLAGS_GCC -Wcalloc-transposed-args" &&
CFLAGS_GCC="$CFLAGS_GCC -Wcalloc-transposed-args"
+ # Disable warning on segments with RWX.
+ # All loadable sections are placed in the same segment for simplicity.
+ testld "$GCC" "$FLAGS_GCC" "${GCCPREFIX}ld${LINKER_SUFFIX}" \
+ "$LDFLAGS --no-warn-rwx-segments" && \
+ LDFLAGS="$LDFLAGS --no-warn-rwx-segments"
+
case "$architecture" in
x86)
;;
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Change subject: mb/supermicro/x10slm-f: Add board id for flashing via BMC
......................................................................
mb/supermicro/x10slm-f: Add board id for flashing via BMC
The ID for X10SLM+F is 0811 as reported by Knogle on IRC.
Change-Id: Ie58aad50e66efbc3113541884beea9668d886b5d
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/mainboard/supermicro/x10slm-f/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/83692/1
diff --git a/src/mainboard/supermicro/x10slm-f/Kconfig b/src/mainboard/supermicro/x10slm-f/Kconfig
index 28c7c1a..212fc90 100644
--- a/src/mainboard/supermicro/x10slm-f/Kconfig
+++ b/src/mainboard/supermicro/x10slm-f/Kconfig
@@ -28,4 +28,8 @@
config ENABLE_DDR_2X_REFRESH
default y
+config SUPERMICRO_BOARDID
+ string
+ default "0811"
+
endif
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Change subject: src: Enforce CSE sync with pertinent GBB flag
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83686/comment/cc766bb4_43bb64ef?us… :
PS1, Line 13: CB
`CL`
BTW, I don't think we need to mention that un-merged patch here.
File src/soc/intel/common/block/cse/cse_lite.c:
https://review.coreboot.org/c/coreboot/+/83686/comment/4f9d078d_ad188559?us… :
PS1, Line 776: - CSE Update not required
This condition is not handled here, so please either move the condition here, or remove this line of comment.
https://review.coreboot.org/c/coreboot/+/83686/comment/5f479ebf_d95f58d5?us… :
PS1, Line 1068: if (is_cse_sync_enforced()) {
Is this supposed to be called only if `cse_compare_sub_part_version` returns 0 (as we're doing in the other caller)?
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Change subject: src: Include new gbb flag to enforce cse sync
......................................................................
Patch Set 1:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/83685/comment/2735bd96_da2515c3?us… :
PS1, Line 7: cse
CSE
https://review.coreboot.org/c/coreboot/+/83685/comment/b576ace4_64fca952?us… :
PS1, Line 12:
> to make sure this is test only GBB
I think all the GBB flags are for testing or development purposes. Real users should not be able to modify GBB flags without unlocking RO. Therefore maybe no need to highlight that in this particular flag?
File src/security/vboot/Kconfig:
https://review.coreboot.org/c/coreboot/+/83685/comment/052542b9_126cafa6?us… :
PS1, Line 454: CSME
> > If we often call CSE instead of CSME in coreboot, use `CSE` in the Kconfig name as well (and also […]
I actually don't know the difference between CSE and CSME (and ME). I remember Reka said in somewhere that they are the same thing. Is that not correct?
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Change subject: mb/google/nissa: Create teliks variant
......................................................................
Patch Set 16:
(1 comment)
File src/mainboard/google/brya/variants/teliks/data.vbt:
PS16:
> Hi Subrata, patchset13 of https://review.coreboot. […]
Can we refer to Karthik's comment?
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Change subject: mb/google/nissa: Create teliks variant
......................................................................
Patch Set 16:
(1 comment)
File src/mainboard/google/brya/variants/teliks/data.vbt:
PS16:
> > Hi Subrata, the config.teliks file is not in coreboot, so it is not used when compiling coreboot. […]
Hi Subrata, patchset13 of https://review.coreboot.org/c/coreboot/+/83376 reminds that there is no data.vbt, and jenkins is reporting failure.
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