coreboot-gerrit June 2024

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[M] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in ec.h for orisa
by Subrata Banik (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/83154?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in ec.h for orisa ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/orisa/include/variant/ec.h: https://review.coreboot.org/c/coreboot/+/83154/comment/a209a2c9_bf215bf1?us… : PS1, Line 22: EC_HOST_EVENT_USB_CHARGER no more valid https://review.coreboot.org/c/coreboot/+/69374 -- To view, visit https://review.coreboot.org/c/coreboot/+/83154?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1edf655fd20c0c1baee01fa90ed03501e3fe161 Gerrit-Change-Number: 83154 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 22 Jun 2024 04:26:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in gpio.h for orisa
by Subrata Banik (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/83155?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in gpio.h for orisa ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/orisa/include/variant/gpio.h: https://review.coreboot.org/c/coreboot/+/83155/comment/4614361d_0dd323a6?us… : PS1, Line 10: //#define GPIO_PCH_WP GPP_E3 remove this -- To view, visit https://review.coreboot.org/c/coreboot/+/83155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9de842a8a66632314d5fdf6444005d34338a1100 Gerrit-Change-Number: 83155 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 22 Jun 2024 04:23:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in ec.h for orisa
by Subrata Banik (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/83154?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in ec.h for orisa ...................................................................... Patch Set 1: -Code-Review -- To view, visit https://review.coreboot.org/c/coreboot/+/83154?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1edf655fd20c0c1baee01fa90ed03501e3fe161 Gerrit-Change-Number: 83154 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 22 Jun 2024 04:22:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in ec.h for orisa
by Subrata Banik (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Amanda Hwang, Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro. Subrata Banik has posted comments on this change by Amanda Hwang. ( https://review.coreboot.org/c/coreboot/+/83154?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in ec.h for orisa ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83154?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1edf655fd20c0c1baee01fa90ed03501e3fe161 Gerrit-Change-Number: 83154 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Sat, 22 Jun 2024 04:21:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: treewide: Move device_tree to commonlib
by Lean Sheng Tan (Code Review) 21 Jun '24

21 Jun '24

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/77970?usp=email ) ( 10 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: treewide: Move device_tree to commonlib ...................................................................... treewide: Move device_tree to commonlib Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I990d74d9fff06b17ec8a6ee962955e4b0df8b907 Reviewed-on: https://review.coreboot.org/c/coreboot/+/77970 Reviewed-by: Julius Werner <jwerner(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M payloads/libpayload/libc/Makefile.mk M src/commonlib/Makefile.mk R src/commonlib/device_tree.c R src/commonlib/include/commonlib/device_tree.h M src/include/fit.h M src/lib/Makefile.mk M src/mainboard/emulation/qemu-sbsa/cbmem.c M src/mainboard/emulation/qemu-sbsa/mainboard.c M src/mainboard/sifive/hifive-unleashed/fixup_fdt.c M src/mainboard/sifive/hifive-unmatched/fixup_fdt.c M tests/commonlib/Makefile.mk R tests/commonlib/device_tree-test.c M tests/lib/Makefile.mk 13 files changed, 26 insertions(+), 20 deletions(-) Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified diff --git a/payloads/libpayload/libc/Makefile.mk b/payloads/libpayload/libc/Makefile.mk index 5a65565..3d070eb 100644 --- a/payloads/libpayload/libc/Makefile.mk +++ b/payloads/libpayload/libc/Makefile.mk @@ -49,6 +49,7 @@ libc-srcs += $(coreboottop)/src/commonlib/bsd/ipchksum.c libc-srcs += $(coreboottop)/src/commonlib/bsd/string.c ifeq ($(CONFIG_LP_GPL),y) +libc-srcs += $(coreboottop)/src/commonlib/device_tree.c libc-srcs += $(coreboottop)/src/commonlib/list.c endif endif diff --git a/src/commonlib/Makefile.mk b/src/commonlib/Makefile.mk index 00f3629..a274d5f 100644 --- a/src/commonlib/Makefile.mk +++ b/src/commonlib/Makefile.mk @@ -32,6 +32,9 @@ endif ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp_relocate.c +romstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c +ramstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c + bootblock-y += bsd/cbfs_private.c verstage-y += bsd/cbfs_private.c romstage-y += bsd/cbfs_private.c diff --git a/src/lib/device_tree.c b/src/commonlib/device_tree.c similarity index 99% rename from src/lib/device_tree.c rename to src/commonlib/device_tree.c index 5087d39..f70aaf7 100644 --- a/src/lib/device_tree.c +++ b/src/commonlib/device_tree.c @@ -2,12 +2,17 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include <assert.h> -#include <console/console.h> +#include <commonlib/device_tree.h> #include <ctype.h> -#include <device_tree.h> #include <endian.h> #include <stdbool.h> #include <stdint.h> +#ifdef __COREBOOT__ +#include <console/console.h> +#else +#include <stdio.h> +#define printk(level, ...) printf(__VA_ARGS__) +#endif #include <stdio.h> #include <string.h> #include <stddef.h> diff --git a/src/include/device_tree.h b/src/commonlib/include/commonlib/device_tree.h similarity index 98% rename from src/include/device_tree.h rename to src/commonlib/include/commonlib/device_tree.h index bb522bf..be73357 100644 --- a/src/include/device_tree.h +++ b/src/commonlib/include/commonlib/device_tree.h @@ -1,8 +1,8 @@ /* Taken from depthcharge: src/base/device_tree.h */ /* SPDX-License-Identifier: GPL-2.0-or-later */ -#ifndef __DEVICE_TREE_H__ -#define __DEVICE_TREE_H__ +#ifndef __COMMONLIB_DEVICE_TREE_H__ +#define __COMMONLIB_DEVICE_TREE_H__ #include <stdbool.h> #include <stddef.h> @@ -229,4 +229,4 @@ */ struct device_tree_node *dt_init_reserved_memory_node(struct device_tree *tree); -#endif /* __DEVICE_TREE_H__ */ +#endif /* __COMMONLIB_DEVICE_TREE_H__ */ diff --git a/src/include/fit.h b/src/include/fit.h index d587750..25f85ab 100644 --- a/src/include/fit.h +++ b/src/include/fit.h @@ -4,8 +4,8 @@ #ifndef __LIB_FIT_H__ #define __LIB_FIT_H__ +#include <commonlib/device_tree.h> #include <commonlib/list.h> -#include <device_tree.h> #include <program_loading.h> #include <stddef.h> #include <stdint.h> diff --git a/src/lib/Makefile.mk b/src/lib/Makefile.mk index 59e2116..56d8b1a 100644 --- a/src/lib/Makefile.mk +++ b/src/lib/Makefile.mk @@ -163,9 +163,6 @@ ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit.c ramstage-$(CONFIG_PAYLOAD_FIT_SUPPORT) += fit_payload.c -romstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c -ramstage-$(CONFIG_FLATTENED_DEVICE_TREE) += device_tree.c - romstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c ramstage-$(CONFIG_TIMER_QUEUE) += timer_queue.c diff --git a/src/mainboard/emulation/qemu-sbsa/cbmem.c b/src/mainboard/emulation/qemu-sbsa/cbmem.c index ebc8a78..d6d5861 100644 --- a/src/mainboard/emulation/qemu-sbsa/cbmem.c +++ b/src/mainboard/emulation/qemu-sbsa/cbmem.c @@ -2,7 +2,7 @@ #include <cbmem.h> #include <symbols.h> -#include <device_tree.h> +#include <commonlib/device_tree.h> #include <console/console.h> DECLARE_REGION(fdt_pointer) diff --git a/src/mainboard/emulation/qemu-sbsa/mainboard.c b/src/mainboard/emulation/qemu-sbsa/mainboard.c index 112e118..9d64b73 100644 --- a/src/mainboard/emulation/qemu-sbsa/mainboard.c +++ b/src/mainboard/emulation/qemu-sbsa/mainboard.c @@ -6,7 +6,7 @@ #include <bootmem.h> #include <cbfs.h> #include <device/device.h> -#include <device_tree.h> +#include <commonlib/device_tree.h> #include <bootmem.h> #include <arch/mmu.h> #include <mainboard/addressmap.h> diff --git a/src/mainboard/sifive/hifive-unleashed/fixup_fdt.c b/src/mainboard/sifive/hifive-unleashed/fixup_fdt.c index dda71b6..c4999a5 100644 --- a/src/mainboard/sifive/hifive-unleashed/fixup_fdt.c +++ b/src/mainboard/sifive/hifive-unleashed/fixup_fdt.c @@ -7,7 +7,7 @@ #include <soc/otp.h> #include <soc/sdram.h> #include <cbfs.h> -#include <device_tree.h> +#include <commonlib/device_tree.h> #include <bootstate.h> #include <mcall.h> diff --git a/src/mainboard/sifive/hifive-unmatched/fixup_fdt.c b/src/mainboard/sifive/hifive-unmatched/fixup_fdt.c index ed24ee3..766258a 100644 --- a/src/mainboard/sifive/hifive-unmatched/fixup_fdt.c +++ b/src/mainboard/sifive/hifive-unmatched/fixup_fdt.c @@ -7,7 +7,7 @@ #include <soc/otp.h> #include <soc/sdram.h> #include <cbfs.h> -#include <device_tree.h> +#include <commonlib/device_tree.h> #include <bootstate.h> #include <mcall.h> diff --git a/tests/commonlib/Makefile.mk b/tests/commonlib/Makefile.mk index 55c3ddd..e593b14 100644 --- a/tests/commonlib/Makefile.mk +++ b/tests/commonlib/Makefile.mk @@ -5,6 +5,12 @@ tests-y += list-test tests-y += rational-test tests-y += region-test +tests-y += device_tree-test + +device_tree-test-srcs += tests/commonlib/device_tree-test.c +device_tree-test-srcs += tests/stubs/console.c +device_tree-test-srcs += src/commonlib/device_tree.c +device_tree-test-syssrcs += tests/helpers/file.c list-test-srcs += tests/commonlib/list-test.c list-test-srcs += src/commonlib/list.c diff --git a/tests/lib/device_tree-test.c b/tests/commonlib/device_tree-test.c similarity index 98% rename from tests/lib/device_tree-test.c rename to tests/commonlib/device_tree-test.c index 21f81c6..0c1e2dd 100644 --- a/tests/lib/device_tree-test.c +++ b/tests/commonlib/device_tree-test.c @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <commonlib/device_tree.h> #include <console/console.h> -#include <device_tree.h> #include <helpers/file.h> #include <stddef.h> #include <stdint.h> diff --git a/tests/lib/Makefile.mk b/tests/lib/Makefile.mk index 2090ef8..7fc5471 100644 --- a/tests/lib/Makefile.mk +++ b/tests/lib/Makefile.mk @@ -39,15 +39,9 @@ tests-y += cbfs-lookup-has-mcache-test tests-y += lzma-test tests-y += ux_locales-test -tests-y += device_tree-test lib-test-srcs += tests/lib/lib-test.c -device_tree-test-srcs += tests/lib/device_tree-test.c -device_tree-test-srcs += tests/stubs/console.c -device_tree-test-srcs += src/lib/device_tree.c -device_tree-test-syssrcs += tests/helpers/file.c - string-test-srcs += tests/lib/string-test.c string-test-srcs += src/lib/string.c -- To view, visit https://review.coreboot.org/c/coreboot/+/77970?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I990d74d9fff06b17ec8a6ee962955e4b0df8b907 Gerrit-Change-Number: 77970 Gerrit-PatchSet: 12 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: libpayload/include/endian.h: Add 64 bit enc/dec
by Lean Sheng Tan (Code Review) 21 Jun '24

21 Jun '24

Lean Sheng Tan has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83082?usp=email ) Change subject: libpayload/include/endian.h: Add 64 bit enc/dec ...................................................................... libpayload/include/endian.h: Add 64 bit enc/dec Add 64 bit encode/decode functions to libpayload, since it is required in the patch that moves device_tree to commonlib. Signed-off-by: Maximilian Brune <maximilian.brune(a)9elements.com> Change-Id: I5dba9a7f41147a511ba1250786e7c51ce623e70a Reviewed-on: https://review.coreboot.org/c/coreboot/+/83082 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M payloads/libpayload/include/endian.h 1 file changed, 30 insertions(+), 0 deletions(-) Approvals: Angel Pons: Looks good to me, approved build bot (Jenkins): Verified diff --git a/payloads/libpayload/include/endian.h b/payloads/libpayload/include/endian.h index 934bb6a..35fe0fd 100644 --- a/payloads/libpayload/include/endian.h +++ b/payloads/libpayload/include/endian.h @@ -96,6 +96,16 @@ (uint32_t)(p[2] << 8) | p[3]); } +static inline uint64_t be64dec(const void *pp) +{ + uint8_t const *p = (uint8_t const *)pp; + + return (((uint64_t)p[0] << 56) | ((uint64_t)p[1] << 48) | + ((uint64_t)p[2] << 40) | ((uint64_t)p[3] << 32) | + ((uint64_t)p[4] << 24) | ((uint64_t)p[5] << 16) | + ((uint64_t)p[6] << 8) | p[7]); +} + static inline uint16_t le16dec(const void *pp) { uint8_t const *p = (uint8_t const *)pp; @@ -111,6 +121,16 @@ (uint32_t)(p[1] << 8) | p[0]); } +static inline uint64_t le64dec(const void *pp) +{ + uint8_t const *p = (uint8_t const *)pp; + + return (((uint64_t)p[7] << 56) | ((uint64_t)p[6] << 48) | + ((uint64_t)p[5] << 40) | ((uint64_t)p[4] << 32) | + ((uint64_t)p[3] << 24) | ((uint64_t)p[2] << 16) | + ((uint64_t)p[1] << 8) | p[0]); +} + static inline void bebitenc(void *pp, uint32_t u, uint8_t b) { uint8_t *p = (uint8_t *)pp; @@ -130,6 +150,11 @@ bebitenc(pp, u, 4); } +static inline void be64enc(void *pp, uint32_t u) +{ + bebitenc(pp, u, 8); +} + static inline void lebitenc(void *pp, uint32_t u, uint8_t b) { uint8_t *p = (uint8_t *)pp; @@ -149,6 +174,11 @@ lebitenc(pp, u, 4); } +static inline void le64enc(void *pp, uint32_t u) +{ + lebitenc(pp, u, 8); +} + /* Deprecated names (not in glibc / BSD) */ #define htobew(in) htobe16(in) #define htobel(in) htobe32(in) -- To view, visit https://review.coreboot.org/c/coreboot/+/83082?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5dba9a7f41147a511ba1250786e7c51ce623e70a Gerrit-Change-Number: 83082 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in gpio.h for orisa
by Amanda Hwang (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Amanda Hwang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83155?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in gpio.h for orisa ...................................................................... mb/google/trulo/var/orisa: Fill in gpio.h for orisa BUG=b:333486830 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: I9de842a8a66632314d5fdf6444005d34338a1100 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/orisa/include/variant/gpio.h 1 file changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/83155/1 diff --git a/src/mainboard/google/brya/variants/orisa/include/variant/gpio.h b/src/mainboard/google/brya/variants/orisa/include/variant/gpio.h index 0848b4b..6b6ef2d 100644 --- a/src/mainboard/google/brya/variants/orisa/include/variant/gpio.h +++ b/src/mainboard/google/brya/variants/orisa/include/variant/gpio.h @@ -3,9 +3,23 @@ #ifndef VARIANT_GPIO_H #define VARIANT_GPIO_H -#include <baseboard/gpio.h> +#include <soc/gpe.h> +#include <soc/gpio.h> /* WP signal to PCH */ +//#define GPIO_PCH_WP GPP_E3 + +/* eSPI virtual wire reporting */ +#define EC_SCI_GPI GPE0_ESPI +/* EC wake is EC_SOC_WAKE_ODL which is routed to GPP_F17 */ +#define GPE_EC_WAKE GPE0_DW2_17 +/* WP signal to PCH */ #define GPIO_PCH_WP GPP_E3 +/* EC in RW or RO */ +#define GPIO_EC_IN_RW GPP_F18 +/* GPIO IRQ for tight timestamps */ +#define EC_SYNC_IRQ GPD2_IRQ +/* GPP_H18 used as dummy here since nissa not selected HAVE_SLP_S0_GATE */ +#define GPIO_SLP_S0_GATE GPP_H18 #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/83155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9de842a8a66632314d5fdf6444005d34338a1100 Gerrit-Change-Number: 83155 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[M] Change in coreboot[main]: mb/google/trulo/var/orisa: Fill in ec.h for orisa
by Amanda Hwang (Code Review) 21 Jun '24

21 Jun '24

Amanda Hwang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83154?usp=email ) Change subject: mb/google/trulo/var/orisa: Fill in ec.h for orisa ...................................................................... mb/google/trulo/var/orisa: Fill in ec.h for orisa BUG=b:333486830 BRANCH=firmware-nissa-15217.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: Ie1edf655fd20c0c1baee01fa90ed03501e3fe161 Signed-off-by: Amanda Huang <amanda_hwang(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/orisa/include/variant/ec.h 1 file changed, 71 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/83154/1 diff --git a/src/mainboard/google/brya/variants/orisa/include/variant/ec.h b/src/mainboard/google/brya/variants/orisa/include/variant/ec.h index 7a2a6ff..dd87d2c 100644 --- a/src/mainboard/google/brya/variants/orisa/include/variant/ec.h +++ b/src/mainboard/google/brya/variants/orisa/include/variant/ec.h @@ -3,6 +3,76 @@ #ifndef __VARIANT_EC_H__ #define __VARIANT_EC_H__ -#include <baseboard/ec.h> +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> +#include <variant/gpio.h> + +#define MAINBOARD_EC_SCI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_CHARGER) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) + +#define MAINBOARD_EC_SMI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) + +/* EC can wake from S5 with lid or power button */ +#define MAINBOARD_EC_S5_WAKE_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) + +/* + * EC can wake from S3/S0ix with: + * 1. Lid open + * 2. Power button + * 3. AC Connect/Disconnect + * 4. Key press + * 5. Mode change + * 6. Low battery + */ +#define MAINBOARD_EC_S3_WAKE_EVENTS \ + (MAINBOARD_EC_S5_WAKE_EVENTS |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN)) + +#define MAINBOARD_EC_S0IX_WAKE_EVENTS \ + (MAINBOARD_EC_S3_WAKE_EVENTS |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT)) + +/* Log EC wake events plus EC shutdown events */ +#define MAINBOARD_EC_LOG_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + +/* Enable EC backed PD MCU device in ACPI */ +#define EC_ENABLE_PD_MCU_DEVICE + +#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ +#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ +#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ + +#define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp support */ #endif -- To view, visit https://review.coreboot.org/c/coreboot/+/83154?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1edf655fd20c0c1baee01fa90ed03501e3fe161 Gerrit-Change-Number: 83154 Gerrit-PatchSet: 1 Gerrit-Owner: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com>

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[S] Change in coreboot[main]: src/lib: Add Kconfig variable for fw_config default value
by Cliff Huang (Code Review) 21 Jun '24

21 Jun '24

Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83153?usp=email ) Change subject: src/lib: Add Kconfig variable for fw_config default value ...................................................................... src/lib: Add Kconfig variable for fw_config default value Set CONFIG_FW_CONFIG_DEFAULT_VALUE in config.<board> file. This default value will be used when it is not able to read via Chrome EC, CBFS or VPD. TEST=boot and check fw_config value from coreboot log Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I9694433e01bdcd9ff1e550585c14ea7ccee020a3 --- M src/Kconfig M src/lib/fw_config.c 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/83153/1 diff --git a/src/Kconfig b/src/Kconfig index 1ec7552..5241cee 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -543,6 +543,12 @@ override other sources and allow the local image to preempt the mainboard selected source and can be used for other FW_CONFIG_SOURCEs fallback option. +config FW_CONFIG_DEFAULT_VALUE + hex "Default fw_config value" + default 0x01000 + help + This value will be used when not able to retrieve from all other sources. + config HAVE_RAMPAYLOAD bool diff --git a/src/lib/fw_config.c b/src/lib/fw_config.c index 02e2a7d..804ede4 100644 --- a/src/lib/fw_config.c +++ b/src/lib/fw_config.c @@ -54,6 +54,12 @@ __func__); } + if (fw_config_value == UNDEFINED_FW_CONFIG) { + fw_config_value = CONFIG_FW_CONFIG_DEFAULT_VALUE; + printk(BIOS_INFO, "FW_CONFIG value from Kconfig is 0x%" PRIx64 "\n", + fw_config_value); + } + return fw_config_value; } -- To view, visit https://review.coreboot.org/c/coreboot/+/83153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9694433e01bdcd9ff1e550585c14ea7ccee020a3 Gerrit-Change-Number: 83153 Gerrit-PatchSet: 1 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com>

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[XS] Change in coreboot[main]: mb/google/brox: Add default ACPI brightness levels
by Karthik Ramasubramanian (Code Review) 21 Jun '24

21 Jun '24

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/83152?usp=email ) Change subject: mb/google/brox: Add default ACPI brightness levels ...................................................................... mb/google/brox: Add default ACPI brightness levels Kernel need the default brightness steps. Otherwise following error messages are observed in the kernel: [Firmware Bug]: ACPI(GFX0) defines _DOD but not _DOS ACPI BIOS Error (bug): Could not resolve symbol [^^XBCL], AE_NOT_FOUND ACPI Error: Aborting method \_SB.PCI0.GFX0.LCD0._BCL due to previous error (AE_NOT_FOUND) BUG=b:346807006 TEST=Build Brox BIOS image and boot to OS. Ensure that the concerned error messages are resolved. Ensure that the backlight controls are functional. Change-Id: Icd569b0efef31908edb1b7dc384e60a16fc5bd0c Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/brox/dsdt.asl 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/83152/1 diff --git a/src/mainboard/google/brox/dsdt.asl b/src/mainboard/google/brox/dsdt.asl index 6ae4694..30e9fe1 100644 --- a/src/mainboard/google/brox/dsdt.asl +++ b/src/mainboard/google/brox/dsdt.asl @@ -26,6 +26,7 @@ #include <soc/intel/common/block/acpi/acpi/northbridge.asl> #include <soc/intel/alderlake/acpi/southbridge.asl> #include <soc/intel/alderlake/acpi/tcss.asl> + #include <drivers/intel/gma/acpi/default_brightness_levels.asl> } } -- To view, visit https://review.coreboot.org/c/coreboot/+/83152?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icd569b0efef31908edb1b7dc384e60a16fc5bd0c Gerrit-Change-Number: 83152 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>

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