coreboot-gerrit June 2024

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[L] Change in coreboot[main]: mainboard/dell: Add new mainboard XPS 8300 (Sandy Bridge)
by Felix Singer (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Elyes Haouas, Paul Menzel, Ronald Claveau. Felix Singer has posted comments on this change by Ronald Claveau. ( https://review.coreboot.org/c/coreboot/+/83104?usp=email ) Change subject: mainboard/dell: Add new mainboard XPS 8300 (Sandy Bridge) ...................................................................... Patch Set 12: (1 comment) File src/mainboard/dell/xps_8300/devicetree.cb: https://review.coreboot.org/c/coreboot/+/83104/comment/59a9d27d_8412487d?us… : PS12, Line 15: // > I'd use "#" That doesn't work here, because it's within the value of `usb_port_config`, which is transformed to C code later. So only C style comments work. -- To view, visit https://review.coreboot.org/c/coreboot/+/83104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d394794fec580bc7aed3f6396ceb47d4a6fd059 Gerrit-Change-Number: 83104 Gerrit-PatchSet: 12 Gerrit-Owner: Ronald Claveau <sousmangoosta(a)aliel.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Ronald Claveau <sousmangoosta(a)aliel.fr> Gerrit-Comment-Date: Fri, 21 Jun 2024 18:00:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[XS] Change in coreboot[main]: lotso: Add hid report address for gt7986u
by Karthik Ramasubramanian (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Kun Liu, Paul Menzel, Shelley Chen, Subrata Banik. Karthik Ramasubramanian has posted comments on this change by Kun Liu. ( https://review.coreboot.org/c/coreboot/+/83139?usp=email ) Change subject: lotso: Add hid report address for gt7986u ...................................................................... Patch Set 2: (1 comment) File src/drivers/spi/acpi/acpi.c: https://review.coreboot.org/c/coreboot/+/83139/comment/b818443f_321613fc?us… : PS2, Line 151: if (config->hid_report_addr) : acpi_dp_add_integer(dsd, "goodix,hid-report-addr", : config->hid_report_addr); Since you are adding a vendor specific property, add it as follows: In src/drivers/spi/acpi/chip.h ``` /* Generic properties for exporting device-specific data to the OS */ struct acpi_dp property_list[MAX_GENERIC_PROPERTY_LIST]; int property_count; ``` Replace the code snippet here: ``` /* Add generic property list */ acpi_dp_add_property_list(dsd, config->property_list, config->property_count); ``` And in the mainboard overridetree.cb ``` register "property_count" = "1" register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" register "property_list[0].name" = ""goodix,hid-report-addr"" register "property_list[0].integer" = "0x22c8c" ``` Also split the mainboard change as a separate CL from the driver CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/83139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8b18e0a2925e6fd36e3a470bde9910661b7558b8 Gerrit-Change-Number: 83139 Gerrit-PatchSet: 2 Gerrit-Owner: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jian Tong <tongjian(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jinfang Mao <maojinfang(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kun Liu <liukun11(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Jun 2024 17:54:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: commonlib/bsd/lz4_wrapper.c: Fix misaligned access
by Nico Huber (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Angel Pons, Arthur Heymans, Julius Werner, Maximilian Brune, Philipp Hug, Ron Minnich. Nico Huber has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/81910?usp=email ) Change subject: commonlib/bsd/lz4_wrapper.c: Fix misaligned access ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81910/comment/e6938199_57456f4d?us… : PS1, Line 18: The coreboot LZ4 decompression code does some misaligned access during : decompression > So, AIUI, the two implementations produce different machine code, but only for architectures where unaligned accesses aren't always supported? Makes sense. Yes. > > Should anything be changed in this change as a result of this observation? No, from my point of view it underlines that there is nothing wrong with the current patchset. -- To view, visit https://review.coreboot.org/c/coreboot/+/81910?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id165829bfd35be2bce2bbb019c208a304f627add Gerrit-Change-Number: 81910 Gerrit-PatchSet: 5 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Jun 2024 17:52:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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[XS] Change in coreboot[main]: mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE
by Poornima Tom (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Dinesh Gehlot, Nick Vaccaro, Poornima Tom, Subrata Banik, V Sowmya. Poornima Tom has posted comments on this change by Poornima Tom. ( https://review.coreboot.org/c/coreboot/+/83076?usp=email ) Change subject: mb/google/nissa/var/nivviks: Enable Bluetooth for PCIE ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/brya/variants/nivviks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/83076/comment/daef5a7d_b7f973e4?us… : PS8, Line 665: probe WIFI_CATEGORY WIFI_7 > do you need the reset gpio? As per my undrstanding, reset gpio (GPP_D4) is common for both wifi6/wifi 7 module -- To view, visit https://review.coreboot.org/c/coreboot/+/83076?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I989cf6122f2555cc89f622e4ce5d21b574d0458e Gerrit-Change-Number: 83076 Gerrit-PatchSet: 8 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Fri, 21 Jun 2024 17:38:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>

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[L] Change in coreboot[main]: mainboard/dell: Add new mainboard XPS 8300 (Sandy Bridge)
by Elyes Haouas (Code Review) 21 Jun '24

21 Jun '24

Attention is currently required from: Felix Singer, Paul Menzel, Ronald Claveau. Elyes Haouas has posted comments on this change by Ronald Claveau. ( https://review.coreboot.org/c/coreboot/+/83104?usp=email ) Change subject: mainboard/dell: Add new mainboard XPS 8300 (Sandy Bridge) ...................................................................... Patch Set 12: (1 comment) File src/mainboard/dell/xps_8300/devicetree.cb: https://review.coreboot.org/c/coreboot/+/83104/comment/9fd2d52f_18aa4ee6?us… : PS12, Line 15: // I'd use "#" -- To view, visit https://review.coreboot.org/c/coreboot/+/83104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7d394794fec580bc7aed3f6396ceb47d4a6fd059 Gerrit-Change-Number: 83104 Gerrit-PatchSet: 12 Gerrit-Owner: Ronald Claveau <sousmangoosta(a)aliel.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronald Claveau <sousmangoosta(a)aliel.fr> Gerrit-Comment-Date: Fri, 21 Jun 2024 17:11:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brask/var/constitution: Generate SPD ID for supported parts
by Felix Held (Code Review) 21 Jun '24

21 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83127?usp=email ) Change subject: mb/google/brask/var/constitution: Generate SPD ID for supported parts ...................................................................... mb/google/brask/var/constitution: Generate SPD ID for supported parts Add supported memory part in mem_parts_used.txt, then generate. H54G56CYRBX247 BUG=b:199645942 TEST=run part_id_gen to generate SPD id Change-Id: I2169d71695d8d133d26cafe5c7be33b976dd8603 Signed-off-by: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83127 Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/constitution/memory/Makefile.mk M src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt M src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt 3 files changed, 3 insertions(+), 1 deletion(-) Approvals: Eric Lai: Looks good to me, approved Kapil Porwal: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/variants/constitution/memory/Makefile.mk b/src/mainboard/google/brya/variants/constitution/memory/Makefile.mk index eb56598..a6a5ab7 100644 --- a/src/mainboard/google/brya/variants/constitution/memory/Makefile.mk +++ b/src/mainboard/google/brya/variants/constitution/memory/Makefile.mk @@ -5,4 +5,4 @@ SPD_SOURCES = SPD_SOURCES += spd/lp4x/set-0/spd-1.hex # ID = 0(0b0000) Parts = K4U6E3S4AB-MGCL -SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:B, K4UBE3D4AB-MGCL +SPD_SOURCES += spd/lp4x/set-0/spd-3.hex # ID = 1(0b0001) Parts = MT53E1G32D2NP-046 WT:B, K4UBE3D4AB-MGCL, H54G56CYRBX247 diff --git a/src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt index 9b1871c..9013dd8 100644 --- a/src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt +++ b/src/mainboard/google/brya/variants/constitution/memory/dram_id.generated.txt @@ -7,3 +7,4 @@ K4U6E3S4AB-MGCL 0 (0000) MT53E1G32D2NP-046 WT:B 1 (0001) K4UBE3D4AB-MGCL 1 (0001) +H54G56CYRBX247 1 (0001) diff --git a/src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt index 29280ea..ee55088 100644 --- a/src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt +++ b/src/mainboard/google/brya/variants/constitution/memory/mem_parts_used.txt @@ -1,3 +1,4 @@ K4U6E3S4AB-MGCL MT53E1G32D2NP-046 WT:B K4UBE3D4AB-MGCL +H54G56CYRBX247 -- To view, visit https://review.coreboot.org/c/coreboot/+/83127?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2169d71695d8d133d26cafe5c7be33b976dd8603 Gerrit-Change-Number: 83127 Gerrit-PatchSet: 5 Gerrit-Owner: Morris Hsu <morris-hsu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: ec/google/chromeec: Update ec_cmd_api.h and ec_commands.h
by Felix Held (Code Review) 21 Jun '24

21 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82995?usp=email ) Change subject: ec/google/chromeec: Update ec_cmd_api.h and ec_commands.h ...................................................................... ec/google/chromeec: Update ec_cmd_api.h and ec_commands.h Generated using update_ec_headers.sh [EC-DIR]. The original include/ec_commands.h version in the EC repo is: d0771e49e7 MKBP: Increase key matrix size The original include/ec_cmd_api.h version in the EC repo is: d0771e49e7 MKBP: Increase key matrix size Change-Id: I4f3dfc3f145e50e6114894352cdc118ad5a9565b Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82995 Reviewed-by: Caveh Jalali <caveh(a)chromium.org> Reviewed-by: Forest Mittelberg <bmbm(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/ec/google/chromeec/ec_cmd_api.h M src/ec/google/chromeec/ec_commands.h 2 files changed, 165 insertions(+), 1 deletion(-) Approvals: Caveh Jalali: Looks good to me, approved Forest Mittelberg: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/ec/google/chromeec/ec_cmd_api.h b/src/ec/google/chromeec/ec_cmd_api.h index 453f507..cab69b7 100644 --- a/src/ec/google/chromeec/ec_cmd_api.h +++ b/src/ec/google/chromeec/ec_cmd_api.h @@ -237,6 +237,12 @@ #define _CROS_EC_C1_F_RF(_cmd, _fn) _CROS_EC_CV_F_R(_cmd, 1, _fn##_v1, _fn##_v1) /* + * Shorthand for host command version 3 where response name is derived + * from the function name and there is no param. + */ +#define _CROS_EC_C3_F_RF(_cmd, _fn) _CROS_EC_CV_F_R(_cmd, 3, _fn##_v3, _fn##_v3) + +/* * Shorthand for host command version 0 where response and there are no * params or response. */ @@ -312,6 +318,7 @@ _CROS_EC_CV_F_R(EC_CMD_GET_KEYBD_CONFIG, 0, get_keybd_config, keybd_config); _CROS_EC_C0_F_RF(EC_CMD_GET_NEXT_EVENT, get_next_event); _CROS_EC_C1_F_RF(EC_CMD_GET_NEXT_EVENT, get_next_event); +_CROS_EC_C3_F_RF(EC_CMD_GET_NEXT_EVENT, get_next_event); _CROS_EC_CV_F_R(EC_CMD_GET_NEXT_EVENT, 2, get_next_event_v2, get_next_event_v1); _CROS_EC_C0_F_PF_RF(EC_CMD_GET_PD_PORT_CAPS, get_pd_port_caps); _CROS_EC_C0_F_RF(EC_CMD_GET_PROTOCOL_INFO, get_protocol_info); @@ -368,6 +375,8 @@ _CROS_EC_C0_F_RF(EC_CMD_PCHG_COUNT, pchg_count); _CROS_EC_CV_F_P(EC_CMD_PD_CHARGE_PORT_OVERRIDE, 0, pd_charge_port_override, charge_port_override); +_CROS_EC_CV_F_P_R(EC_CMD_PD_CHIP_INFO, 2, pd_chip_info_v2, pd_chip_info, + pd_chip_info_v2); _CROS_EC_CV_F_P_R(EC_CMD_PD_CHIP_INFO, 1, pd_chip_info_v1, pd_chip_info, pd_chip_info_v1); _CROS_EC_C0_F_PF_RF(EC_CMD_PD_CHIP_INFO, pd_chip_info); @@ -403,6 +412,7 @@ _CROS_EC_C0_F_PF(EC_CMD_RWSIG_ACTION, rwsig_action); _CROS_EC_C0_F_RF(EC_CMD_RWSIG_CHECK_STATUS, rwsig_check_status); _CROS_EC_C0_F_RF(EC_CMD_RWSIG_INFO, rwsig_info); +_CROS_EC_C0_F_PF(EC_CMD_SET_ALARM_SLP_S0_DBG, set_alarm_slp_s0_dbg); _CROS_EC_C0_F_PF(EC_CMD_SET_BASE_STATE, set_base_state); _CROS_EC_C0_F_PF(EC_CMD_SET_TABLET_MODE, set_tablet_mode); _CROS_EC_C0_F_PF_RF(EC_CMD_SMART_DISCHARGE, smart_discharge); diff --git a/src/ec/google/chromeec/ec_commands.h b/src/ec/google/chromeec/ec_commands.h index f57b699c..1673c8b 100644 --- a/src/ec/google/chromeec/ec_commands.h +++ b/src/ec/google/chromeec/ec_commands.h @@ -3970,6 +3970,11 @@ * Get the next pending MKBP event. * * Returns EC_RES_UNAVAILABLE if there is no event pending. + * + * V0: ec_response_get_next_data + * V1: ec_response_get_next_data_v1. Increased key_matrix size from 13 -> 16. + * V2: Added EC_MKBP_HAS_MORE_EVENTS. + * V3: ec_response_get_next_data_v3. Increased key_matrix size from 16 -> 18. */ #define EC_CMD_GET_NEXT_EVENT 0x0067 @@ -4107,6 +4112,34 @@ }; BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); +union __ec_align_offset1 ec_response_get_next_data_v3 { + uint8_t key_matrix[18]; + + /* Unaligned */ + uint32_t host_event; + uint64_t host_event64; + + struct __ec_todo_unpacked { + /* For aligning the fifo_info */ + uint8_t reserved[3]; + struct ec_response_motion_sense_fifo_info info; + } sensor_fifo; + + uint32_t buttons; + + uint32_t switches; + + uint32_t fp_events; + + uint32_t sysrq; + + /* CEC events from enum mkbp_cec_event */ + uint32_t cec_events; + + uint8_t cec_message[16]; +}; +BUILD_ASSERT(sizeof(union ec_response_get_next_data_v3) == 18); + struct ec_response_get_next_event { uint8_t event_type; /* Followed by event data if any */ @@ -4119,6 +4152,12 @@ union ec_response_get_next_data_v1 data; } __ec_align1; +struct ec_response_get_next_event_v3 { + uint8_t event_type; + /* Followed by event data if any */ + union ec_response_get_next_data_v3 data; +} __ec_align1; + /* Bit indices for buttons and switches.*/ /* Buttons */ #define EC_MKBP_POWER_BUTTON 0 @@ -4587,6 +4626,9 @@ uint8_t subcmd; /* enum ec_console_read_subcmd */ } __ec_align1; +/* Print directly to EC console from host. */ +#define EC_CMD_CONSOLE_PRINT 0x00AC + /*****************************************************************************/ /* @@ -5818,6 +5860,7 @@ #define PD_EVENT_IDENTITY_RECEIVED BIT(2) #define PD_EVENT_DATA_SWAP BIT(3) #define PD_EVENT_TYPEC BIT(4) +#define PD_EVENT_PPM BIT(5) struct ec_response_host_event_status { uint32_t status; /* PD MCU host event status */ @@ -6289,6 +6332,37 @@ } __ec_align2; } __ec_align2; +/** Indicates the chip should NOT receive a firmware update, if set. This is + * useful when multiple ports are serviced by a single chip, to avoid + * performing redundant updates. The host command implementation shall ensure + * only one port out of each physical chip has FW updates active. + */ +#define USB_PD_CHIP_INFO_FWUP_FLAG_NO_UPDATE BIT(0) + +/** Maximum length of a project name embedded in a PDC FW image. This length + * does NOT include a NUL-terminator. + */ +#define USB_PD_CHIP_INFO_PROJECT_NAME_LEN 12 +struct ec_response_pd_chip_info_v2 { + uint16_t vendor_id; + uint16_t product_id; + uint16_t device_id; + union { + uint8_t fw_version_string[8]; + uint64_t fw_version_number; + } __ec_align2; + union { + uint8_t min_req_fw_version_string[8]; + uint64_t min_req_fw_version_number; + } __ec_align2; + /** Flag to control the FW update process for this chip. */ + uint16_t fw_update_flags; + /** Project name string associated with the chip's FW. Add an extra + * byte for a NUL-terminator. + */ + char fw_name_str[USB_PD_CHIP_INFO_PROJECT_NAME_LEN + 1]; +} __ec_align2; + /* Run RW signature verification and get status */ #define EC_CMD_RWSIG_CHECK_STATUS 0x011C @@ -6396,6 +6470,38 @@ } __ec_align1; /* + * Retrieve binary from CrOS Board Info primary memory source. + */ +#define EC_CMD_CBI_BIN_READ 0x0504 +/* + * Write binary into CrOS Board Info temporary buffer and then commit it to + * permanent storage once complete. Write fails if the board has hardware + * write-protect enabled. + */ +#define EC_CMD_CBI_BIN_WRITE 0x0505 + +/* + * CBI binary read/write flags + * The default write behavior is to always append any data to the buffer. + * If 'CLEAR' flag is set, buffer is cleared then data is appended. + * If 'WRITE' flag is set, data is appended then buffer is written to memory. + */ +#define EC_CBI_BIN_BUFFER_CLEAR BIT(0) +#define EC_CBI_BIN_BUFFER_WRITE BIT(1) + +struct ec_params_get_cbi_bin { + uint32_t offset; /* Data offset */ + uint32_t size; /* Data size */ +} __ec_align4; + +struct ec_params_set_cbi_bin { + uint32_t offset; /* Data offset */ + uint32_t size; /* Data size */ + uint8_t flags; /* bit field for EC_CBI_BIN_COMMIT_FLAG_* */ + uint8_t data[]; /* For string and raw data */ +} __ec_align1; + +/* * Information about resets of the AP by the EC and the EC's own uptime. */ #define EC_CMD_GET_UPTIME_INFO 0x0121 @@ -6798,6 +6904,8 @@ TK_MICMUTE = 19, TK_MENU = 20, TK_DICTATE = 21, + TK_ACCESSIBILITY = 22, + TK_DONOTDISTURB = 23, TK_COUNT }; @@ -7856,6 +7964,36 @@ uint32_t state; } __ec_align1; +/* + * UCSI OPM-PPM commands + * + * These commands are used for communication between OPM and PPM. + * Only UCSI3.0 is tested. + */ + +#define EC_CMD_UCSI_PPM_SET 0x0140 + +/* The data size is stored in the host command protocol header. */ +struct ec_params_ucsi_ppm_set { + uint16_t offset; + uint8_t data[]; +} __ec_align2; + +#define EC_CMD_UCSI_PPM_GET 0x0141 + +/* For 'GET' sub-commands, data will be returned as a raw payload. */ +struct ec_params_ucsi_ppm_get { + uint16_t offset; + uint8_t size; +} __ec_align2; + +#define EC_CMD_SET_ALARM_SLP_S0_DBG 0x0142 + +/* RTC params and response structures */ +struct ec_params_set_alarm_slp_s0_dbg { + uint32_t time; +} __ec_align2; + /*****************************************************************************/ /* The command range 0x200-0x2FF is reserved for Rotor. */ @@ -8023,7 +8161,8 @@ /* Constants for encryption parameters */ #define FP_CONTEXT_NONCE_BYTES 12 -#define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) +#define FP_CONTEXT_USERID_BYTES 32 +#define FP_CONTEXT_USERID_WORDS (FP_CONTEXT_USERID_BYTES / sizeof(uint32_t)) #define FP_CONTEXT_TAG_BYTES 16 #define FP_CONTEXT_ENCRYPTION_SALT_BYTES 16 #define FP_CONTEXT_TPM_BYTES 32 @@ -8255,6 +8394,21 @@ uint16_t fgr_num; } __ec_align4; +/* + * Migrate a legacy FP template (here, legacy refers to being generated in a + * raw user_id context instead of a nonce context) by wiping its match secret + * salt and treating it as a newly-enrolled template. + * The legacy FP template needs to be uploaded by FP_TEMPLATE command first + * without committing, then this command will commit it. + */ +#define EC_CMD_FP_MIGRATE_TEMPLATE_TO_NONCE_CONTEXT 0x0418 + +struct ec_params_fp_migrate_template_to_nonce_context { + /* The context userid used to encrypt this template when it was created. + */ + uint32_t userid[FP_CONTEXT_USERID_WORDS]; +}; + /*****************************************************************************/ /* Touchpad MCU commands: range 0x0500-0x05FF */ -- To view, visit https://review.coreboot.org/c/coreboot/+/82995?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4f3dfc3f145e50e6114894352cdc118ad5a9565b Gerrit-Change-Number: 82995 Gerrit-PatchSet: 2 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: include/input-event-codes.h: Update to latest HID tree
by Felix Held (Code Review) 21 Jun '24

21 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82993?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: include/input-event-codes.h: Update to latest HID tree ...................................................................... include/input-event-codes.h: Update to latest HID tree This commit simply updates the input-event-codes.h to the HID maintainers' tree at SHA c412e40267dd4ac020c5f8dc8c1cccc04e796ff4. Change-Id: Ic1fb9b18ced37866b84230929cd5c785d0dde9ba Signed-off-by: Aseda Aboagye <aaboagye(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82993 Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/include/input-event-codes.h 1 file changed, 12 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Elyes Haouas: Looks good to me, approved Felix Singer: Looks good to me, approved diff --git a/src/include/input-event-codes.h b/src/include/input-event-codes.h index ad98abd..968f3a3 100644 --- a/src/include/input-event-codes.h +++ b/src/include/input-event-codes.h @@ -1,9 +1,9 @@ /* * This file is copied as-is from include/uapi/linux/input-event-codes.h - * from input maintainer's tree: - * git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input.git - * from master branch - * at SHA: 1260cd04a601e0e02e09fa332111b8639611970d + * from HID maintainer's tree: + * git://git.kernel.org/pub/scm/linux/kernel/git/hid/hid.git + * from `for-next` branch + * at SHA: c412e40267dd4ac020c5f8dc8c1cccc04e796ff4 */ /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ @@ -610,6 +610,7 @@ #define KEY_ALS_TOGGLE 0x230 /* Ambient light sensor */ #define KEY_ROTATE_LOCK_TOGGLE 0x231 /* Display rotation lock */ +#define KEY_REFRESH_RATE_TOGGLE 0x232 /* Display refresh rate toggle */ #define KEY_BUTTONCONFIG 0x240 /* AL Button Configuration */ #define KEY_TASKMANAGER 0x241 /* AL Task/Project Manager */ @@ -622,6 +623,11 @@ #define KEY_KBD_LAYOUT_NEXT 0x248 /* AC Next Keyboard Layout Select */ #define KEY_EMOJI_PICKER 0x249 /* Show/hide emoji picker (HUTRR101) */ #define KEY_DICTATE 0x24a /* Start or Stop Voice Dictation Session (HUTRR99) */ +#define KEY_CAMERA_ACCESS_ENABLE 0x24b /* Enables programmatic access to camera devices. (HUTRR72) */ +#define KEY_CAMERA_ACCESS_DISABLE 0x24c /* Disables programmatic access to camera devices. (HUTRR72) */ +#define KEY_CAMERA_ACCESS_TOGGLE 0x24d /* Toggles the current state of the camera access control. (HUTRR72) */ +#define KEY_ACCESSIBILITY 0x24e /* Toggles the system bound accessibility UI/command (HUTRR116) */ +#define KEY_DO_NOT_DISTURB 0x24f /* Toggles the system-wide "Do Not Disturb" control (HUTRR94)*/ #define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */ #define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */ @@ -755,7 +761,7 @@ #define KEY_MACRO_PRESET3 0x2b5 /* - * Some keyboards have a built-in LCD panel where the contents are controlled + * Some keyboards have a buildin LCD panel where the contents are controlled * by the host. Often these have a number of keys directly below the LCD * intended for controlling a menu shown on the LCD. These keys often don't * have any labeling so we just name them KEY_KBD_LCD_MENU# @@ -899,6 +905,7 @@ #define ABS_MT_TOOL_X 0x3c /* Center X tool position */ #define ABS_MT_TOOL_Y 0x3d /* Center Y tool position */ + #define ABS_MAX 0x3f #define ABS_CNT (ABS_MAX+1) -- To view, visit https://review.coreboot.org/c/coreboot/+/82993?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic1fb9b18ced37866b84230929cd5c785d0dde9ba Gerrit-Change-Number: 82993 Gerrit-PatchSet: 3 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: util/intelp2m: Remove blank line after '{'
by Felix Held (Code Review) 21 Jun '24

21 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83003?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: util/intelp2m: Remove blank line after '{' ...................................................................... util/intelp2m: Remove blank line after '{' The generator inserts into the gpio.h an unnecessary blank line in front of the list of macros in the table. Let's remove this from the template to make the code cleaner. These changes have no effect on the configuration of macros. Change-Id: I1141ca630cb6d9a46be5bce2b434762ef8e6fdd0 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83003 Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/intelp2m/main.go 1 file changed, 1 insertion(+), 2 deletions(-) Approvals: Elyes Haouas: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/intelp2m/main.go b/util/intelp2m/main.go index 4f66a0a..38a3b5fc 100644 --- a/util/intelp2m/main.go +++ b/util/intelp2m/main.go @@ -21,8 +21,7 @@ #include <gpio.h> /* Pad configuration was generated automatically using intelp2m utility */ -static const struct pad_config gpio_table[] = { -`) +static const struct pad_config gpio_table[] = {`) // Add the pads map parser.PadMapFprint() config.OutputGenFile.WriteString(`}; -- To view, visit https://review.coreboot.org/c/coreboot/+/83003?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1141ca630cb6d9a46be5bce2b434762ef8e6fdd0 Gerrit-Change-Number: 83003 Gerrit-PatchSet: 4 Gerrit-Owner: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maximilian Brune <maximilian.brune(a)9elements.com>

1 0

[XS] Change in coreboot[main]: util/intelp2m/platforms: Fix DW register number before clear it
by Felix Held (Code Review) 21 Jun '24

21 Jun '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/83002?usp=email ) Change subject: util/intelp2m/platforms: Fix DW register number before clear it ...................................................................... util/intelp2m/platforms: Fix DW register number before clear it This error does not affect the generated files as the tests are running [1, 2, 3]. However, this once again confirms the need to work on updating the utility. [1] CB:67132 [2] CB:67133 [3] CB:67134 Change-Id: I91e74d65977bd5e10589530258d1709ea33f1af5 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83002 Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M util/intelp2m/platforms/apl/macro.go M util/intelp2m/platforms/cnl/macro.go M util/intelp2m/platforms/lbg/macro.go M util/intelp2m/platforms/snr/macro.go 4 files changed, 4 insertions(+), 4 deletions(-) Approvals: Felix Held: Looks good to me, approved build bot (Jenkins): Verified diff --git a/util/intelp2m/platforms/apl/macro.go b/util/intelp2m/platforms/apl/macro.go index 2098c57..3197277 100644 --- a/util/intelp2m/platforms/apl/macro.go +++ b/util/intelp2m/platforms/apl/macro.go @@ -297,7 +297,7 @@ // use platform-specific interface in Macro struct macro.PadIdSet(id).SetPadOwnership(ownership) macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) - macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW1).CntrMaskFieldsClear(common.AllFields) macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) return macro.Generate() diff --git a/util/intelp2m/platforms/cnl/macro.go b/util/intelp2m/platforms/cnl/macro.go index 5526b8f..ae568d5 100644 --- a/util/intelp2m/platforms/cnl/macro.go +++ b/util/intelp2m/platforms/cnl/macro.go @@ -208,7 +208,7 @@ fields.InterfaceGet()) macro.Clear() macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) - macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW1).CntrMaskFieldsClear(common.AllFields) macro.PadIdSet(id).SetPadOwnership(ownership) macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) diff --git a/util/intelp2m/platforms/lbg/macro.go b/util/intelp2m/platforms/lbg/macro.go index db34f8e..3c71ca8 100644 --- a/util/intelp2m/platforms/lbg/macro.go +++ b/util/intelp2m/platforms/lbg/macro.go @@ -95,7 +95,7 @@ fields.InterfaceGet()) macro.Clear() macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) - macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW1).CntrMaskFieldsClear(common.AllFields) macro.PadIdSet(id).SetPadOwnership(ownership) macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) diff --git a/util/intelp2m/platforms/snr/macro.go b/util/intelp2m/platforms/snr/macro.go index 4e17010..382616c 100644 --- a/util/intelp2m/platforms/snr/macro.go +++ b/util/intelp2m/platforms/snr/macro.go @@ -255,7 +255,7 @@ macro := common.GetInstanceMacro(PlatformSpecific{}, fields.InterfaceGet()) macro.Clear() macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) - macro.Register(PAD_CFG_DW0).CntrMaskFieldsClear(common.AllFields) + macro.Register(PAD_CFG_DW1).CntrMaskFieldsClear(common.AllFields) macro.PadIdSet(id).SetPadOwnership(ownership) macro.Register(PAD_CFG_DW0).ValueSet(dw0).ReadOnlyFieldsSet(PAD_CFG_DW0_RO_FIELDS) macro.Register(PAD_CFG_DW1).ValueSet(dw1).ReadOnlyFieldsSet(PAD_CFG_DW1_RO_FIELDS) -- To view, visit https://review.coreboot.org/c/coreboot/+/83002?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I91e74d65977bd5e10589530258d1709ea33f1af5 Gerrit-Change-Number: 83002 Gerrit-PatchSet: 3 Gerrit-Owner: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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