coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Anastasios Koutian (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Angel Pons, Patrick Rudolph. Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/model_206ax/chip.h: https://review.coreboot.org/c/coreboot/+/83269/comment/79dc211e_95e59a04?us… : PS1, Line 46: int pl1; /* Long-term power limit*/ : int pl2; /* Short-term power limit*/ > Huh, that's a pretty small unit. Out of curiosity, any reason to use microwatts instead of watts? […] I chose this in order to be consistent with the linux kernel's intel-rapl-msr interface (/sys/devices/virtual/powercap/intel-rapl) which allows to configure these limits from userspace. Also, Intel's manuals commonly use microjoules for MSR energy measurements, so microwatts made sense. -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 15:19:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Anastasios Koutian (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Angel Pons, Patrick Rudolph. Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 1: (1 comment) File src/northbridge/intel/sandybridge/northbridge.c: https://review.coreboot.org/c/coreboot/+/83269/comment/55873a5c_a7f0bd86?us… : PS1, Line 354: 28 > Actually, this is the time parameter, Tau. […] Ah, you're right. Personally I have not found it useful. But perhaps a thing to do in the future in order to have feature-completeness. Will note it as a low-priority TODO. -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 15:11:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: [WIP] OptiPlex 3050 port
by Máté Kukri (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Angel Pons, Felix Singer. Máté Kukri has posted comments on this change by Máté Kukri. ( https://review.coreboot.org/c/coreboot/+/82053?usp=email ) Change subject: [WIP] OptiPlex 3050 port ...................................................................... Patch Set 11: (1 comment) File src/mainboard/dell/optiplex_3050/acpi/dptf.asl: PS11: > I would remove it then. I'm not sure if DPTF is of much use on desktops anyway. Okay, I am not disagreeing, I'll get rid of it in the next patchset, I have no use for this. -- To view, visit https://review.coreboot.org/c/coreboot/+/82053?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2 Gerrit-Change-Number: 82053 Gerrit-PatchSet: 11 Gerrit-Owner: Máté Kukri <kukri.mate(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 15:09:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Máté Kukri <kukri.mate(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration
by Anastasios Koutian (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Angel Pons. Anastasios Koutian has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83271?usp=email ) Change subject: cpu/intel/model_206ax: Allow turbo boost ratio limit configuration ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/83271/comment/74e91416_c3c6744c?us… : PS2, Line 9: Tested on ThinkPad T420 with the i7-3940XM. > Sounds good. […] Ack. A potential way to go about this: - Add vendor defaults in devicetree.cb, for now use these values - Implement Kconfig settings: "Use CMOS value" or "Use devicetree value" - Implement CMOS setting -- To view, visit https://review.coreboot.org/c/coreboot/+/83271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c65a129478e8ac2c4f66eb3c6aa2507358f82ad Gerrit-Change-Number: 83271 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 15:09:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XL] Change in coreboot[main]: mb/starlabs/starlite_adl: Add Alder Lake N StarLite Mk V
by Matt DeVillier (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/80706?usp=email ) Change subject: mb/starlabs/starlite_adl: Add Alder Lake N StarLite Mk V ...................................................................... Patch Set 5: (3 comments) File Documentation/mainboard/starlabs/starlite_adl.md: https://review.coreboot.org/c/coreboot/+/80706/comment/5effa226_fa7e0114?us… : PS5, Line 19: - 9560 2230 WiFi / Bluetooth I thought it used a soldered CNVi module? https://review.coreboot.org/c/coreboot/+/80706/comment/2ade6e79_14df2632?us… : PS5, Line 32: ype-A 2x Type-C File src/mainboard/starlabs/starlite_adl/board_info.txt: https://review.coreboot.org/c/coreboot/+/80706/comment/5cdc8d59_761816ac?us… : PS5, Line 3: laptop convertible? -- To view, visit https://review.coreboot.org/c/coreboot/+/80706?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8724e578c21353032b844b20b868348580ff561b Gerrit-Change-Number: 80706 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Sun, 30 Jun 2024 15:03:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: i2c/drivers/generic: Add support for including a CDM
by Matt DeVillier (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81409?usp=email ) Change subject: i2c/drivers/generic: Add support for including a CDM ...................................................................... Patch Set 2: (2 comments) Patchset: PS2: ACPI spec says _CDM is the clock domain, I can't find anything on MS' site about chip direct mapping - got a link you can include? File src/drivers/i2c/generic/chip.h: https://review.coreboot.org/c/coreboot/+/81409/comment/deac63b0_949b8646?us… : PS2, Line 86: in is? -- To view, visit https://review.coreboot.org/c/coreboot/+/81409?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If70c25288d835df7064b4051c43abeb2d6531f3b Gerrit-Change-Number: 81409 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Sun, 30 Jun 2024 14:49:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II
by Matt DeVillier (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/80705?usp=email ) Change subject: mb/starlabs/byte_adl: Add Alder Lake N Byte Mk II ...................................................................... Patch Set 7: Code-Review+1 (3 comments) File src/mainboard/starlabs/byte_adl/cmos.default: https://review.coreboot.org/c/coreboot/+/80705/comment/9381936c_2380622c?us… : PS7, Line 9: Balanced for a device which is always connected to external power, any reason to not use performance here? File src/mainboard/starlabs/byte_adl/variants/mk_ii/devicetree.cb: https://review.coreboot.org/c/coreboot/+/80705/comment/bca2112d_90d35455?us… : PS7, Line 4: SaGv_Enabled necessary/desired for a desktop device? setting to highest freq only should save some RAM training time https://review.coreboot.org/c/coreboot/+/80705/comment/d23a5170_ec790b4f?us… : PS7, Line 143: end EC interface isn't used for fan control etc? -- To view, visit https://review.coreboot.org/c/coreboot/+/80705?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idff2d883a8c29f0fee9d633708aac92061a45132 Gerrit-Change-Number: 80705 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Sun, 30 Jun 2024 14:44:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/common: Add fpt_support to override CSME and HECI disables
by Matt DeVillier (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/83265?usp=email ) Change subject: soc/intel/common: Add fpt_support to override CSME and HECI disables ...................................................................... Patch Set 1: (1 comment) File src/soc/intel/common/block/cse/cse.c: https://review.coreboot.org/c/coreboot/+/83265/comment/63d8666a_b637b9e8?us… : PS1, Line 1328: me_state variable should be `cmos_me_state` -- To view, visit https://review.coreboot.org/c/coreboot/+/83265?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I695fa96c5057303730492139904dfcc1d989880b Gerrit-Change-Number: 83265 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Sun, 30 Jun 2024 14:33:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: cpu/intel/model_206ax: Allow PL1/PL2 configuration
by Angel Pons (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Anastasios Koutian, Patrick Rudolph. Angel Pons has posted comments on this change by Anastasios Koutian. ( https://review.coreboot.org/c/coreboot/+/83269?usp=email ) Change subject: cpu/intel/model_206ax: Allow PL1/PL2 configuration ...................................................................... Patch Set 1: (2 comments) File src/cpu/intel/model_206ax/chip.h: https://review.coreboot.org/c/coreboot/+/83269/comment/4bfe339f_4309048c?us… : PS1, Line 46: int pl1; /* Long-term power limit*/ : int pl2; /* Short-term power limit*/ > These are in microwatts. Agree that units should be made clear. […] Huh, that's a pretty small unit. Out of curiosity, any reason to use microwatts instead of watts? In any case, I'd suggest something like this: ```suggestion unsigned int pl1_uw; /* Long-term power limit, in microwatts */ unsigned int pl2_uw; /* Short-term power limit, in microwatts */ ``` File src/northbridge/intel/sandybridge/northbridge.c: https://review.coreboot.org/c/coreboot/+/83269/comment/efc11a45_c815f9c4?us… : PS1, Line 354: 28 > Yes, although it should be made clear that the lowest of the two power limits would apply when both […] Actually, this is the time parameter, Tau. I'm not sure if there's any benefit to configuring it, so I wouldn't worry. -- To view, visit https://review.coreboot.org/c/coreboot/+/83269?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I064af25ec4805fae755eea52c4c9c6d4386c0aee Gerrit-Change-Number: 83269 Gerrit-PatchSet: 1 Gerrit-Owner: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anastasios Koutian <akoutian2(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 14:27:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasios Koutian <akoutian2(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: [WIP] OptiPlex 3050 port
by Angel Pons (Code Review) 30 Jun '24

30 Jun '24

Attention is currently required from: Felix Singer, Máté Kukri. Angel Pons has posted comments on this change by Máté Kukri. ( https://review.coreboot.org/c/coreboot/+/82053?usp=email ) Change subject: [WIP] OptiPlex 3050 port ...................................................................... Patch Set 11: (2 comments) File src/mainboard/dell/optiplex_3050/acpi/dptf.asl: PS11: > i think i saw a dmesg about it, but otherwise no. I would remove it then. I'm not sure if DPTF is of much use on desktops anyway. https://review.coreboot.org/c/coreboot/+/82053/comment/01e81f5b_f4921f2f?us… : PS11, Line 13: Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 50, 0, 0, 0, 0 }, I mean... This device is not enabled in the devicetree. -- To view, visit https://review.coreboot.org/c/coreboot/+/82053?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2 Gerrit-Change-Number: 82053 Gerrit-PatchSet: 11 Gerrit-Owner: Máté Kukri <kukri.mate(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Máté Kukri <kukri.mate(a)gmail.com> Gerrit-Comment-Date: Sun, 30 Jun 2024 14:14:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Máté Kukri <kukri.mate(a)gmail.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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coreboot-gerrit June 2024