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Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82731/comment/bf1147f3_2b3225a2?us… :
PS2, Line 9: Intel introduced a new UPD
If you know the FSP(?) version, please add it, or document, what version you used.
https://review.coreboot.org/c/coreboot/+/82731/comment/cb29ba5a_065c9474?us… :
PS2, Line 12:
Please add TEST=.
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Change subject: acpi/acpi.c: fix XSDT handling on QEMU
......................................................................
Patch Set 1: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82698/comment/2caa69f2_e68da849?us… :
PS1, Line 9: c2830c9
Should you amend the commit message, please use
> Commit c2830c96616c ("acpi.c: Add XSDT on QEMU") …
https://review.coreboot.org/c/coreboot/+/82698/comment/3421a950_985d0708?us… :
PS1, Line 17:
For ease, please add the command line you used for testing.
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Change subject: [test]Makefile.mk: Use Wbad-function-cast command option
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS7:
maybe this needs some changes:
in src/include/console/uart.h:
`static inline void *uart_platform_baseptr(unsigned int idx)` to
`static inline uintptr_t uart_platform_baseptr(unsigned int idx)`
same for cbmem_top in 'src/include/cbmem.h to `uintptr_t cbmem_top(void);`
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Change subject: [test]Makefile.mk: Use Wbad-function-cast command option
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Change subject: intelvbtupgrader: New tool to upgrade VBT files to newer versions
......................................................................
Patch Set 7:
(1 comment)
Patchset:
PS4:
> Could you also add a `description. […]
Done
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Change subject: mb/asrock: Add Z87E-ITX (Haswell)
......................................................................
Patch Set 3: Code-Review+1
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81022/comment/ea261532_4bad34f4?us… :
PS3, Line 23: DVI
Connector is DVI-I, i.e. supports both DVI and VGA. Was this tested with a DVI-to-VGA passive adapter too?
File src/mainboard/asrock/z87e-itx/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/81022/comment/ace526ad_9204246e?us… :
PS3, Line 12: DP1,
: DP2,
: DP3,
Only one of these is actually needed. Would be easy to tell which one from a coreboot log, with libgfxinit debug enabled, while the DP connector is plugged in.
If possible, adding comments about which port is which would be nice.
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Change subject: [test]Makefile.mk: Use Wbad-function-cast command option
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Change subject: mb/asrock: Add Z87E-ITX (Haswell)
......................................................................
Patch Set 3:
(8 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81022/comment/25230d2b_06564cfc?us… :
PS2, Line 14: socketted
> nit: socketed (one t)
Done
File src/mainboard/asrock/z87e-itx/data.vbt:
PS2:
> How was this file obtained? Dump under Linux?
Updated the commit message.
File src/mainboard/asrock/z87e-itx/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/81022/comment/06d547a6_b672576b?us… :
PS2, Line 4: register "ec_present" = "false"
> Any zero/false options can be omitted
Done
https://review.coreboot.org/c/coreboot/+/81022/comment/0c2eb8f5_89f22fb6?us… :
PS2, Line 10: register "panel_cfg" = "{
: .up_delay_ms = 0,
: .down_delay_ms = 0,
: .cycle_delay_ms = 500,
: .backlight_on_delay_ms = 0,
: .backlight_off_delay_ms = 0,
: .backlight_pwm_hz = 0,
: }"
> There's no panel on this board
Done
File src/mainboard/asrock/z87e-itx/gma-mainboard.ads:
https://review.coreboot.org/c/coreboot/+/81022/comment/3ad70cac_ba581b36?us… :
PS2, Line 20: LVDS,
: eDP
> Replace these two with `others => Disabled`
Done
File src/mainboard/asrock/z87e-itx/romstage.c:
https://review.coreboot.org/c/coreboot/+/81022/comment/f13c33cf_87a853ac?us… :
PS2, Line 12: /* FIXME: called after romstage_common, remove it if not used */
> I guess try removing this?
Done
https://review.coreboot.org/c/coreboot/+/81022/comment/192d1196_cd87d7a1?us… :
PS2, Line 19: /* FIXME: check this */
> It's most likely 0x50 and 0x52, the first slot of each channel.
Done
https://review.coreboot.org/c/coreboot/+/81022/comment/a0627ab0_7331d30e?us… :
PS2, Line 27: /* FIXME: Length and Location are computed from IOBP values, may be inaccurate */
> If all USB ports work, remove the FIXME?
Done
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Hello Angel Pons, Máté Kukri, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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Code-Review+1 by Angel Pons, Code-Review+1 by Máté Kukri, Verified-1 by build bot (Jenkins)
Change subject: mb/asrock: Add Z87E-ITX (Haswell)
......................................................................
mb/asrock: Add Z87E-ITX (Haswell)
This was done using Haswell autoport, with manual fixes to get the
output to build against current main. I do not physically have this
board; I was sent the output of autoport with some fixes on top of
which I added additional changes. The VBT was copied from
/sys/kernel/debug/dri/0/i915_vbt on version 2.70 of the vendor firmware.
The flash chip is 8MiB in a socketed DIP8 package, making it easy to
externally flash to recover from a brick.
Working:
- Haswell MRC.bin
- S3 suspend and resume
- Libgfxinit
- HDMI
- DVI
- DisplayPort
- SATA ports
- mSATA SSD
- mPCIe WiFi slot
- Rear USB ports
- USB 3.0 header
- Audio header
- Ethernet
- x16 PCIe slot
- EHCI debug with the CH347 (top USB 2.0 port by the PS/2 connector)
- edk2 (MrChromebox uefipayload_202309)
Not Tested:
- PS/2 keyboard/mouse
- eSATA
- USB 2.0 header
Change-Id: I56c22d8f5505f9a4da25f8b4406b00978af1a586
Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com>
---
A src/mainboard/asrock/z87e-itx/Kconfig
A src/mainboard/asrock/z87e-itx/Kconfig.name
A src/mainboard/asrock/z87e-itx/Makefile.mk
A src/mainboard/asrock/z87e-itx/acpi/ec.asl
A src/mainboard/asrock/z87e-itx/acpi/platform.asl
A src/mainboard/asrock/z87e-itx/acpi/superio.asl
A src/mainboard/asrock/z87e-itx/board_info.txt
A src/mainboard/asrock/z87e-itx/bootblock.c
A src/mainboard/asrock/z87e-itx/data.vbt
A src/mainboard/asrock/z87e-itx/devicetree.cb
A src/mainboard/asrock/z87e-itx/dsdt.asl
A src/mainboard/asrock/z87e-itx/gma-mainboard.ads
A src/mainboard/asrock/z87e-itx/gpio.c
A src/mainboard/asrock/z87e-itx/hda_verb.c
A src/mainboard/asrock/z87e-itx/romstage.c
15 files changed, 512 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/81022/3
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Change subject: mb/razer/blade_stealth_kbl: add panel_cfg
......................................................................
Patch Set 18:
(1 comment)
File src/mainboard/razer/blade_stealth_kbl/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/82458/comment/feb950c2_e1e23aa8?us… :
PS13, Line 163: .backlight_off_delay_ms = 5000, /* T12 */
> Well, that's what I meant with the mapping being wrong. `down_delay_ms` *is* T10 […]
Right, I understand now - apologies for the silly mistake!
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