coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: sb/intel/bd82x6x: Allow actual USBIRx values for native USB config
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82655?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: sb/intel/bd82x6x: Allow actual USBIRx values for native USB config ...................................................................... sb/intel/bd82x6x: Allow actual USBIRx values for native USB config For USB to work under native code path, the USB port config needs to include a current setting for each port, which gets mapped to an initialization value that gets programmed into the USBIRx register for the respective port. This map resides in early_usb.c. The need to update it, whenever we see a previously unaccounted for initialization value, is getting out of hand. Instead this patch will allow specifying those values, presumably taken from an inteltool dump while running vendor firmware, directly in the USB port map. Because all USBIRx values are always in the 0x20000yyy form, we only need the lowest 12 bits. We have more than enough space in the USB port config structure for this. As the lowest yyy value we saw so far is 0x53, a note is included to limit the map to not more than 80 entries. Any value that is too big to be an index into the map is programmed directly, + 0x20000000, into the registers. This opens the future possibility to use the map for a simpler mapping for boards also using MRC, and remove the need for any mapping at all for the rest. Change-Id: I3d79b33bac742faa9bd4fc9852aff73fe326de4e Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/southbridge/intel/bd82x6x/early_usb.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/82655/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82655?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d79b33bac742faa9bd4fc9852aff73fe326de4e Gerrit-Change-Number: 82655 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in coreboot[main]: mb/*: Copy bd82x6x boards' USB port config into devicetree
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Attention is currently required from: Alexander Couzens, Angel Pons, Evgeny Zinoviev, Kevin Keijzer, Patrick Rudolph. Hello Alexander Couzens, Angel Pons, Evgeny Zinoviev, Kevin Keijzer, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81879?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/*: Copy bd82x6x boards' USB port config into devicetree ...................................................................... mb/*: Copy bd82x6x boards' USB port config into devicetree For mainboards using southbridge/intel/bd82x6x, copy the contents of mainboard_usb_ports array into southbridge devicetree. In-line comments are maintained. Boards also capable of using MRC raminit are done in a separate patch. Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/apple/macbookair4_2/devicetree.cb M src/mainboard/asrock/b75m-itx/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asrock/h77pro4-m/devicetree.cb M src/mainboard/asus/h61-series/devicetree.cb M src/mainboard/asus/maximus_iv_gene-z/devicetree.cb M src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8h77-v/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/overridetree.cb M src/mainboard/biostar/th61-itx/devicetree.cb M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb M src/mainboard/gigabyte/ga-h61m-series/devicetree.cb M src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb M src/mainboard/hp/compaq_elite_8300_usdt/devicetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/z220_cmt_workstation/overridetree.cb M src/mainboard/hp/snb_ivb_desktops/variants/z220_sff_workstation/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2170p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2560p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2570p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/2760p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8460p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8470p/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/8770w/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/folio_9470m/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/probook_6360b/overridetree.cb M src/mainboard/hp/snb_ivb_laptops/variants/revolve_810_g1/overridetree.cb M src/mainboard/intel/dq67sw/devicetree.cb M src/mainboard/lenovo/l520/devicetree.cb M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/variants/t430s/overridetree.cb M src/mainboard/lenovo/t430s/variants/t431s/overridetree.cb M src/mainboard/lenovo/t530/variants/t530/overridetree.cb M src/mainboard/lenovo/t530/variants/w530/overridetree.cb M src/mainboard/lenovo/x131e/devicetree.cb M src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb M src/mainboard/lenovo/x220/variants/x1/overridetree.cb M src/mainboard/lenovo/x230/variants/x230/overridetree.cb M src/mainboard/lenovo/x230/variants/x230s/overridetree.cb M src/mainboard/msi/ms7707/devicetree.cb M src/mainboard/sapphire/pureplatinumh61/devicetree.cb M src/mainboard/supermicro/x9sae/devicetree.cb M src/mainboard/supermicro/x9scl/devicetree.cb 47 files changed, 746 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/81879/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81879?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8a967eb3466106f3a34e024260e13d02f449a25 Gerrit-Change-Number: 81879 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io>

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[M] Change in coreboot[main]: mb/*: Add consolidated USB port config for SNB+MRC boards
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Attention is currently required from: Alexander Couzens, Patrick Rudolph. Hello Alexander Couzens, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81880?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/*: Add consolidated USB port config for SNB+MRC boards ...................................................................... mb/*: Add consolidated USB port config for SNB+MRC boards For each sandybridge boards with option to use MRC or native platform init code, add a copy of the board's USB port config, consolidated between both code paths, into the southbridge devicetree, using special values allocated for this consolidation. These get hooked up in a separate patch. Change-Id: I53efca3d29b3c5d4d5b7e3d6dc3e6ce6c34201e6 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb M src/mainboard/google/butterfly/devicetree.cb M src/mainboard/google/link/devicetree.cb M src/mainboard/google/parrot/devicetree.cb M src/mainboard/google/stout/devicetree.cb M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/emeraldlake2/devicetree.cb M src/mainboard/kontron/ktqm77/devicetree.cb M src/mainboard/lenovo/x220/variants/x220/overridetree.cb M src/mainboard/roda/rv11/variants/rv11/devicetree.cb M src/mainboard/roda/rv11/variants/rw11/devicetree.cb M src/mainboard/samsung/lumpy/devicetree.cb M src/mainboard/samsung/stumpy/devicetree.cb 13 files changed, 210 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/81880/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81880?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I53efca3d29b3c5d4d5b7e3d6dc3e6ce6c34201e6 Gerrit-Change-Number: 81880 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>

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[M] Change in coreboot[main]: nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Attention is currently required from: Angel Pons, Keith Hui, Patrick Rudolph. Hello Angel Pons, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81881?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree ...................................................................... nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree Transfer all USB responsibilities to southbridge/intel/bd82x6x, using one set of USB port configuration supplied by mainboards in the southbridge section of their devicetree. For MRC raminit, export southbridge_fill_pei_data() as a hook for southbridge code to implement. With new code via this hook, bd82x6x fills pei_data based on this one set of USB port config. For native raminit, early_usb_init() now goes directly to the devicetree and no longer get passed an address to it. TEST=abuild passes for all affected boards. All USB ports still work on asus/p8x7x-series/v/p8z77-m. Change-Id: I38378c7ee0701abc434b030dd97873f2af63e6b0 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/northbridge/intel/sandybridge/pei_data.h M src/northbridge/intel/sandybridge/raminit_mrc.c M src/northbridge/intel/sandybridge/romstage.c M src/southbridge/intel/bd82x6x/early_usb.c M src/southbridge/intel/bd82x6x/early_usb_mrc.c M src/southbridge/intel/bd82x6x/pch.h 6 files changed, 71 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/81881/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81881?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I38378c7ee0701abc434b030dd97873f2af63e6b0 Gerrit-Change-Number: 81881 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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[L] Change in coreboot[main]: mb/*: Remove old USB configurations from SNB/bd82x6x boards
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Attention is currently required from: Alexander Couzens, Angel Pons, Evgeny Zinoviev, Kevin Keijzer, Patrick Rudolph. Hello Alexander Couzens, Angel Pons, Evgeny Zinoviev, Kevin Keijzer, Patrick Rudolph, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81882?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/*: Remove old USB configurations from SNB/bd82x6x boards ...................................................................... mb/*: Remove old USB configurations from SNB/bd82x6x boards Remove USB configurations and data structures from northbridge devicetree (SNB+MRC boards) and bootblock/romstage C code (native-only SNB boards). All USB configurations are drawn from southbridge devicetree going forward. Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/apple/macbookair4_2/early_init.c M src/mainboard/asrock/b75m-itx/Makefile.mk D src/mainboard/asrock/b75m-itx/early_init.c M src/mainboard/asrock/b75pro3-m/early_init.c M src/mainboard/asrock/h77pro4-m/early_init.c M src/mainboard/asus/h61-series/variants/h61m-cs/early_init.c M src/mainboard/asus/h61-series/variants/p8h61-m_lx/early_init.c M src/mainboard/asus/h61-series/variants/p8h61-m_lx3_r2_0/early_init.c M src/mainboard/asus/h61-series/variants/p8h61-m_pro/early_init.c M src/mainboard/asus/h61-series/variants/p8h61-m_pro_cm6630/early_init.c M src/mainboard/asus/maximus_iv_gene-z/early_init.c M src/mainboard/asus/p8x7x-series/devicetree.cb M src/mainboard/asus/p8x7x-series/variants/p8c_ws/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8h77-v/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-m/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-m/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/overridetree.cb M src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/early_init.c M src/mainboard/biostar/th61-itx/Makefile.mk M src/mainboard/compulab/intense_pc/early_init.c M src/mainboard/dell/snb_ivb_workstations/early_init.c M src/mainboard/gigabyte/ga-b75m-d3h/early_init.c M src/mainboard/gigabyte/ga-h61m-series/early_init.c M src/mainboard/google/butterfly/devicetree.cb M src/mainboard/google/butterfly/early_init.c M src/mainboard/google/link/devicetree.cb M src/mainboard/google/link/early_init.c M src/mainboard/google/parrot/devicetree.cb M src/mainboard/google/parrot/early_init.c M src/mainboard/google/stout/devicetree.cb M src/mainboard/google/stout/early_init.c M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/dcp847ske/early_southbridge.c D src/mainboard/intel/dcp847ske/usb.h M src/mainboard/intel/dq67sw/early_init.c M src/mainboard/intel/emeraldlake2/devicetree.cb M src/mainboard/intel/emeraldlake2/early_init.c M src/mainboard/kontron/ktqm77/devicetree.cb M src/mainboard/kontron/ktqm77/early_init.c M src/mainboard/lenovo/l520/Makefile.mk D src/mainboard/lenovo/l520/early_init.c M src/mainboard/lenovo/s230u/early_init.c M src/mainboard/lenovo/t420/early_init.c M src/mainboard/lenovo/t420s/early_init.c M src/mainboard/lenovo/t430/early_init.c M src/mainboard/lenovo/x220/Makefile.mk M src/mainboard/lenovo/x220/devicetree.cb D src/mainboard/lenovo/x220/variants/x1/romstage.c D src/mainboard/lenovo/x220/variants/x220/romstage.c M src/mainboard/roda/rv11/variants/rv11/devicetree.cb M src/mainboard/roda/rv11/variants/rv11/early_init.c M src/mainboard/roda/rv11/variants/rw11/devicetree.cb M src/mainboard/roda/rv11/variants/rw11/early_init.c M src/mainboard/samsung/lumpy/devicetree.cb M src/mainboard/samsung/lumpy/early_init.c M src/mainboard/samsung/stumpy/devicetree.cb M src/mainboard/samsung/stumpy/early_init.c M src/mainboard/sapphire/pureplatinumh61/early_init.c M src/northbridge/intel/sandybridge/chip.h M src/southbridge/intel/bd82x6x/pch.h 62 files changed, 0 insertions(+), 941 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/81882/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81882?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67 Gerrit-Change-Number: 81882 Gerrit-PatchSet: 6 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kevin Keijzer <kevin(a)quietlife.nl> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io>

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[S] Change in coreboot[main]: util/autoport: Update for recent USB developments
by Keith Hui (Code Review) 02 Jun '24

02 Jun '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82656?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: util/autoport: Update for recent USB developments ...................................................................... util/autoport: Update for recent USB developments Update autoport for: 1. Commit xxxxxxxxxxxx ("nb/sandybridge,sb/bd82x6x: Configure USB from southbridge devicetree") 2. Commit xxxxxxxxxxxx ("sb/intel/bd82x6x: Allow actual USBIRx values for native USB config") As a side effect of #2 above, no more (broken anyway) FIXME comment will be written for usb_port_config. Change-Id: I3b8f44d9de19a7446e2fbcbce1aab6ec6583ebe3 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M util/autoport/bd82x6x.go 1 file changed, 13 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/82656/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82656?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b8f44d9de19a7446e2fbcbce1aab6ec6583ebe3 Gerrit-Change-Number: 82656 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[L] Change in coreboot[main]: mb/asrock: Add Z87E-ITX (Haswell)
by Angel Pons (Code Review) 01 Jun '24

01 Jun '24

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[XS] Change in coreboot[main]: mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I
by Angel Pons (Code Review) 01 Jun '24

01 Jun '24

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82753?usp=email ) Change subject: mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I ...................................................................... mb/asrock/z97_extreme6: Fix EDID mapping for DVI-I This board has a DVI-I connector, which supports both digital and analog display outputs. The I2C bus to retrieve the EDID is shared between both outputs, so `select GFX_GMA_ANALOG_I2C_HDMI_B` to describe this. Not yet tested. Change-Id: Ib8239917e2f7ee5bb982621752ec406c2d3ca302 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/asrock/z97_extreme6/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/82753/1 diff --git a/src/mainboard/asrock/z97_extreme6/Kconfig b/src/mainboard/asrock/z97_extreme6/Kconfig index d47e3a2..3cef429 100644 --- a/src/mainboard/asrock/z97_extreme6/Kconfig +++ b/src/mainboard/asrock/z97_extreme6/Kconfig @@ -5,6 +5,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select BOARD_ROMSIZE_KB_8192 + select GFX_GMA_ANALOG_I2C_HDMI_B select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_GMA_HAVE_VBT -- To view, visit https://review.coreboot.org/c/coreboot/+/82753?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib8239917e2f7ee5bb982621752ec406c2d3ca302 Gerrit-Change-Number: 82753 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>

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[L] Change in coreboot[main]: mb/asrock: Add Z87E-ITX (Haswell)
by Angel Pons (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Máté Kukri, Nicholas Chin. Angel Pons has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/81022?usp=email ) Change subject: mb/asrock: Add Z87E-ITX (Haswell) ...................................................................... Patch Set 3: (4 comments) File src/mainboard/asrock/z87e-itx/gma-mainboard.ads: https://review.coreboot.org/c/coreboot/+/81022/comment/26d516b0_0fa55f44?us… : PS3, Line 12: DP1, : DP2, : DP3, > Only one of these is actually needed. […] DP2 is DP, HDMI2 is DP alt mode (I'm not sure if it's supported, but keeping HDMI2 enabled won't hurt) Looks like it matches https://review.coreboot.org/c/coreboot/+/68188/11/src/mainboard/asrock/z97_… https://review.coreboot.org/c/coreboot/+/81022/comment/43057936_ec8dd48b?us… : PS3, Line 15: HDMI1, HDMI1 is DVI https://review.coreboot.org/c/coreboot/+/81022/comment/fce4fc7a_e469a6de?us… : PS3, Line 17: HDMI3, HDMI3 is HDMI https://review.coreboot.org/c/coreboot/+/81022/comment/f6403a23_a8f6f524?us… : PS3, Line 18: Analog, Analog is also DVI (it's DVI-D) -- To view, visit https://review.coreboot.org/c/coreboot/+/81022?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I56c22d8f5505f9a4da25f8b4406b00978af1a586 Gerrit-Change-Number: 81022 Gerrit-PatchSet: 3 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Máté Kukri <kukri.mate(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Máté Kukri <kukri.mate(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 18:47:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[M] Change in coreboot[main]: cbmem_top: Change the return value to uintptr_t
by Elyes Haouas (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Andrey Petrov, Angel Pons, Arthur Heymans, Christian Walter, Elyes Haouas, Felix Held, Fred Reitberger, Jason Glenesk, Jeff Daly, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Patrick Rudolph, Philipp Hug, Ron Minnich, Ronak Kanabar, Shuo Liu, Tim Chu, Vanessa Eusebio. Hello Andrey Petrov, Angel Pons, Arthur Heymans, Christian Walter, Felix Held, Fred Reitberger, Jason Glenesk, Jeff Daly, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Matt DeVillier, Patrick Rudolph, Philipp Hug, Ron Minnich, Ronak Kanabar, Shuo Liu, Tim Chu, Vanessa Eusebio, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82752?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: cbmem_top: Change the return value to uintptr_t ...................................................................... cbmem_top: Change the return value to uintptr_t Get rid of a lot of casts. Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/device/pci_device.c M src/drivers/amd/agesa/mtrr_fixme.c M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp2_0/hob_verify.c M src/include/cbmem.h M src/include/imd.h M src/include/program_loading.h M src/lib/ext_stage_cache.c M src/lib/imd.c M src/lib/imd_cbmem.c M src/mainboard/emulation/qemu-aarch64/mainboard.c M src/mainboard/emulation/qemu-riscv/mainboard.c M src/northbridge/intel/gm45/memmap.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/memmap.c M src/northbridge/intel/i440bx/memmap.c M src/northbridge/intel/i945/memmap.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/ironlake/memmap.c M src/northbridge/intel/pineview/memmap.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/memmap.c M src/northbridge/intel/x4x/memmap.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/common/block/cpu/noncar/memmap.c M src/soc/amd/common/fsp/fsp_report_resources.c M src/soc/amd/stoneyridge/memmap.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/romstage.c M src/soc/intel/baytrail/memmap.c M src/soc/intel/broadwell/memmap.c M src/soc/intel/common/block/systemagent/memmap.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/memmap.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/xeon_sp/memmap.c M src/soc/intel/xeon_sp/uncore.c M src/soc/sifive/fu740/chip.c M src/vendorcode/amd/opensil/genoa_poc/memmap.c M tests/data/lib/lzma-test/data.3.bin M tests/lib/imd-test.c 42 files changed, 88 insertions(+), 112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/82752/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/82752?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Gerrit-Change-Number: 82752 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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