June 2024 - coreboot-gerrit - mail.coreboot.org

[XS] Change in coreboot[main]: soc/intel/mtl: Set HDA subsystem ID during FSP-M
by Tim Crawford (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun. Tim Crawford has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82731?usp=email ) Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82731/comment/b288d8a1_d1f8e7fa?us… : PS2, Line 7: Set HDA subsystem ID during FSP-M > Please check fill_fsps_pci_ssid_params(), I believe it solves the same purpose and it is still getti […] We see no SSID reported in `lspci -s 0:1f.3 -vnn` without this change on Clevo L240TU and V5[46]0TU, so I assume it's already locked with a value of 0. Setting this UPD causes SSID to show up in lspci. -- To view, visit https://review.coreboot.org/c/coreboot/+/82731?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3 Gerrit-Change-Number: 82731 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:53:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: intelvbtupgrader: New tool to upgrade VBT files to newer versions
by Vladimir Serbinenko (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Vladimir Serbinenko. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82722?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: intelvbtupgrader: New tool to upgrade VBT files to newer versions ...................................................................... intelvbtupgrader: New tool to upgrade VBT files to newer versions Change-Id: Ie677403898b7b8ab9f57ad77668155bb55188769 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- M Documentation/util.md M util/README.md A util/intelvbtupgrader/.gitignore A util/intelvbtupgrader/Makefile A util/intelvbtupgrader/description.md A util/intelvbtupgrader/intelvbtupgrader.c 6 files changed, 222 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/82722/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/82722?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie677403898b7b8ab9f57ad77668155bb55188769 Gerrit-Change-Number: 82722 Gerrit-PatchSet: 7 Gerrit-Owner: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Vladimir Serbinenko <phcoder(a)gmail.com>

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[XS] Change in coreboot[main]: soc/intel/mtl: Set HDA subsystem ID during FSP-M
by Subrata Banik (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82731?usp=email ) Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82731/comment/99bc2676_3ae56fea?us… : PS2, Line 7: Set HDA subsystem ID during FSP-M Please check fill_fsps_pci_ssid_params(), I believe it solves the same purpose and it is still getting called before FSP-S. ``` /* * Programming SSID before FSP-S is important because SSID registers of a few PCIE * devices (e.g. IPU, Crashlog, XHCI, TCSS_XHCI etc.) are locked after FSP-S hence * provide a custom SSID (same as DID by default) value via UPD. */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82731?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3 Gerrit-Change-Number: 82731 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:23:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/mtl: Fill in SPD data on both channels of DDR5 memory
by Subrata Banik (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82733?usp=email ) Change subject: soc/intel/mtl: Fill in SPD data on both channels of DDR5 memory ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82733/comment/e93de523_8ac73740?us… : PS1, Line 14: looks like you are trying to change the existing system behavior where we prefer to read SPD via SMBUS. Rather you are trying to pass the SPD static data for DDR5 as well. technically, what you are trying is yet another way to fill the SPD but that doesn't mean we shall drop the SMBUS read (which would allow anyone to alter the DIMM w/o really need to bother about passing SPD hex data for each DIMM configuration. hence, my suggestion is to add some Kconfig kind if possible to keep SPD fill vis SMBUS in parallel to fill SPD using static hex data w/o dropping the previous one. -- To view, visit https://review.coreboot.org/c/coreboot/+/82733?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I600d8fd480cb84d5dcb679e4f0bdeeaaebfab386 Gerrit-Change-Number: 82733 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:19:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports
by Subrata Banik (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82730?usp=email ) Change subject: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/meteorlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/82730/comment/b0ff8816_a11fbfca?us… : PS2, Line 481: s_cfg->PortResetMessageEnable[i] = 1 WDYT? ``` s_cfg->PortResetMessageEnable[i] = config->usb2_ports[i].type_c; ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82730?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821 Gerrit-Change-Number: 82730 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:14:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: device/dram/spd: Add missing <smbios.h>
by Elyes Haouas (Code Review) June 1, 2024

June 1, 2024

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82245?usp=email to look at the new patch set (#2). Change subject: device/dram/spd: Add missing <smbios.h> ...................................................................... device/dram/spd: Add missing <smbios.h> smbios_memory_type needs <smbios.h>. Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/device/dram/spd.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/82245/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82245?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Gerrit-Change-Number: 82245 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: device/dram/spd: Add missing <smbios.h>
by Elyes Haouas (Code Review) June 1, 2024

June 1, 2024

Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82245?usp=email ) Change subject: device/dram/spd: Add missing <smbios.h> ...................................................................... Patch Set 1: (1 comment) File src/device/dram/spd.c: https://review.coreboot.org/c/coreboot/+/82245/comment/5e3c6831_e92e7995?us… : PS1, Line 182: smbios_memory_type needs <smbios.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/82245?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Gerrit-Change-Number: 82245 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:09:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: nb/intel/sandybridge/sandybridge.h: Clean up
by Elyes Haouas (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Angel Pons, Felix Held, Felix Singer. Hello Angel Pons, Felix Singer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/70698?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+2 by Felix Singer, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: nb/intel/sandybridge/sandybridge.h: Clean up ...................................................................... nb/intel/sandybridge/sandybridge.h: Clean up Remove useless comments and move includes to the top. Change-Id: Ibf354b3fcd6e1986e7656abc1bffcb974d74219f Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/northbridge/intel/sandybridge/sandybridge.h 1 file changed, 7 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/70698/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/70698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibf354b3fcd6e1986e7656abc1bffcb974d74219f Gerrit-Change-Number: 70698 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: nb/intel/sandybridge/sandybridge.h: Clean up
by Elyes Haouas (Code Review) June 1, 2024

June 1, 2024

Attention is currently required from: Angel Pons, Felix Held, Felix Singer. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/70698?usp=email ) Change subject: nb/intel/sandybridge/sandybridge.h: Clean up ...................................................................... Patch Set 3: (1 comment) File src/northbridge/intel/sandybridge/sandybridge.h: https://review.coreboot.org/c/coreboot/+/70698/comment/245ffd79_3d151847?us… : PS3, Line 13: /* Everything below this line is ignored in the DSDT */ > this isn't exactly obvious when only looking at this file, so i'd also like to keep this comment. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/70698?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibf354b3fcd6e1986e7656abc1bffcb974d74219f Gerrit-Change-Number: 70698 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 01 Jun 2024 06:57:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[S] Change in coreboot[main]: tree: Add some SMBIOS_PROCESSOR_FAMILY macros
by Elyes Haouas (Code Review) June 1, 2024

June 1, 2024

Elyes Haouas has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82648?usp=email ) Change subject: tree: Add some SMBIOS_PROCESSOR_FAMILY macros ...................................................................... tree: Add some SMBIOS_PROCESSOR_FAMILY macros Change-Id: Ibe551a4c83f416ba30326077aa165818cf79c1fd Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82648 Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/arm64/smbios.c M src/arch/x86/smbios.c M src/include/smbios.h 3 files changed, 9 insertions(+), 3 deletions(-) Approvals: Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/arch/arm64/smbios.c b/src/arch/arm64/smbios.c index a8d0523..f0be956 100644 --- a/src/arch/arm64/smbios.c +++ b/src/arch/arm64/smbios.c @@ -66,8 +66,8 @@ smbios_processor_id(t->processor_id); t->processor_manufacturer = smbios_processor_manufacturer(t->eos); t->processor_version = smbios_processor_name(t->eos); - t->processor_family = 0xfe; /* Use processor_family2 field */ - t->processor_family2 = 0x101; /* ARMv8 */ + t->processor_family = SMBIOS_PROCESSOR_FAMILY_FROM_FAMILY2; + t->processor_family2 = SMBIOS_PROCESSOR_FAMILY2_ARMV8; t->processor_type = SMBIOS_PROCESSOR_TYPE_CENTRAL; smbios_cpu_get_core_counts(&t->core_count2, &t->thread_count2); diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index ef2c19a..4fa8612 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -68,7 +68,7 @@ unsigned int __weak smbios_processor_family(struct cpuid_result res) { - return (res.eax > 0) ? 0x0c : 0x6; + return (res.eax > 0) ? SMBIOS_PROCESSOR_FAMILY_PENTIUM_PRO : SMBIOS_PROCESSOR_FAMILY_INTEL486; } static size_t get_number_of_caches(size_t max_logical_cpus_sharing_cache) diff --git a/src/include/smbios.h b/src/include/smbios.h index 0fe2b9c..8ef37d8 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -584,7 +584,13 @@ /* defines for processor family */ #define SMBIOS_PROCESSOR_FAMILY_OTHER 0x01 #define SMBIOS_PROCESSOR_FAMILY_UNKNOWN 0x02 +#define SMBIOS_PROCESSOR_FAMILY_INTEL486 0x06 +#define SMBIOS_PROCESSOR_FAMILY_PENTIUM_PRO 0x0c #define SMBIOS_PROCESSOR_FAMILY_XEON 0xb3 +#define SMBIOS_PROCESSOR_FAMILY_FROM_FAMILY2 0xfe + +/* defines for processor family 2 */ +#define SMBIOS_PROCESSOR_FAMILY2_ARMV8 0x101 /* defines for processor characteristics */ #define PROCESSOR_64BIT_CAPABLE (1 << 2) -- To view, visit https://review.coreboot.org/c/coreboot/+/82648?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibe551a4c83f416ba30326077aa165818cf79c1fd Gerrit-Change-Number: 82648 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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