coreboot-gerrit June 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports
by Tim Crawford (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Subrata Banik, Tarun. Tim Crawford has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82730?usp=email ) Change subject: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/meteorlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/82730/comment/f8352e1c_6cb5400e?us… : PS2, Line 481: s_cfg->PortResetMessageEnable[i] = 1 > WDYT? […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82730?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821 Gerrit-Change-Number: 82730 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 08:05:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports
by Tim Crawford (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Tarun, Tim Crawford. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82730?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports ...................................................................... soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports Apply commit c6b65c1a811e ("soc/intel/alderlake: Enable USB2 port reset message on Type-C ports") to Meteor Lake. This change is added to address the issue of USB3 ports downgrading to high speed during low power modes and not returning back to super speed. The patch enables port reset event on USB2 ports. This event is is passed to USB3 upstream ports to upgrade back to super speed (USB3) after a downgrade during low power state. Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821 Signed-off-by: Jeremy Soller <jeremy(a)system76.com> Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/meteorlake/include/soc/usb.h 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/82730/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82730?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821 Gerrit-Change-Number: 82730 Gerrit-PatchSet: 3 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com>

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[XS] Change in coreboot[main]: soc/intel/mtl: Set HDA subsystem ID during FSP-M
by Subrata Banik (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82731?usp=email ) Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82731/comment/4f543e2b_46991bda?us… : PS2, Line 7: Set HDA subsystem ID during FSP-M > We see no SSID reported in `lspci -s 0:1f.3 -vnn` without this change on Clevo L240TU and V5[46]0TU, so I assume it's already locked with a value of 0. > > Setting this UPD causes SSID to show up in lspci. based on our debug during MTL, we have highlighted what all IPs are being locked post FSP-S hence, this is surprising to me that fill_fsps_pci_ssid_params() unable to resolve your problem (which is still before FSP-S). I don't think FSP locks anything prior to FSP-S execution. Hence, setting SSID before FSP-M is too early. -- To view, visit https://review.coreboot.org/c/coreboot/+/82731?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3 Gerrit-Change-Number: 82731 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 08:00:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Crawford <tcrawford(a)system76.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/mtl: Set HDA subsystem ID during FSP-M
by Tim Crawford (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Subrata Banik, Tarun. Tim Crawford has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82731?usp=email ) Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82731/comment/b288d8a1_d1f8e7fa?us… : PS2, Line 7: Set HDA subsystem ID during FSP-M > Please check fill_fsps_pci_ssid_params(), I believe it solves the same purpose and it is still getti […] We see no SSID reported in `lspci -s 0:1f.3 -vnn` without this change on Clevo L240TU and V5[46]0TU, so I assume it's already locked with a value of 0. Setting this UPD causes SSID to show up in lspci. -- To view, visit https://review.coreboot.org/c/coreboot/+/82731?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3 Gerrit-Change-Number: 82731 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:53:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: intelvbtupgrader: New tool to upgrade VBT files to newer versions
by Vladimir Serbinenko (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Vladimir Serbinenko. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82722?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: intelvbtupgrader: New tool to upgrade VBT files to newer versions ...................................................................... intelvbtupgrader: New tool to upgrade VBT files to newer versions Change-Id: Ie677403898b7b8ab9f57ad77668155bb55188769 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- M Documentation/util.md M util/README.md A util/intelvbtupgrader/.gitignore A util/intelvbtupgrader/Makefile A util/intelvbtupgrader/description.md A util/intelvbtupgrader/intelvbtupgrader.c 6 files changed, 222 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/82722/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/82722?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie677403898b7b8ab9f57ad77668155bb55188769 Gerrit-Change-Number: 82722 Gerrit-PatchSet: 7 Gerrit-Owner: Vladimir Serbinenko <phcoder(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Vladimir Serbinenko <phcoder(a)gmail.com>

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[XS] Change in coreboot[main]: soc/intel/mtl: Set HDA subsystem ID during FSP-M
by Subrata Banik (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82731?usp=email ) Change subject: soc/intel/mtl: Set HDA subsystem ID during FSP-M ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82731/comment/99bc2676_3ae56fea?us… : PS2, Line 7: Set HDA subsystem ID during FSP-M Please check fill_fsps_pci_ssid_params(), I believe it solves the same purpose and it is still getting called before FSP-S. ``` /* * Programming SSID before FSP-S is important because SSID registers of a few PCIE * devices (e.g. IPU, Crashlog, XHCI, TCSS_XHCI etc.) are locked after FSP-S hence * provide a custom SSID (same as DID by default) value via UPD. */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82731?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e668747d99b955b0a3946524c5918d328b8e1d3 Gerrit-Change-Number: 82731 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:23:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/mtl: Fill in SPD data on both channels of DDR5 memory
by Subrata Banik (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82733?usp=email ) Change subject: soc/intel/mtl: Fill in SPD data on both channels of DDR5 memory ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82733/comment/e93de523_8ac73740?us… : PS1, Line 14: looks like you are trying to change the existing system behavior where we prefer to read SPD via SMBUS. Rather you are trying to pass the SPD static data for DDR5 as well. technically, what you are trying is yet another way to fill the SPD but that doesn't mean we shall drop the SMBUS read (which would allow anyone to alter the DIMM w/o really need to bother about passing SPD hex data for each DIMM configuration. hence, my suggestion is to add some Kconfig kind if possible to keep SPD fill vis SMBUS in parallel to fill SPD using static hex data w/o dropping the previous one. -- To view, visit https://review.coreboot.org/c/coreboot/+/82733?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I600d8fd480cb84d5dcb679e4f0bdeeaaebfab386 Gerrit-Change-Number: 82733 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:19:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports
by Subrata Banik (Code Review) 01 Jun '24

01 Jun '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Tarun, Tim Crawford. Subrata Banik has posted comments on this change by Tim Crawford. ( https://review.coreboot.org/c/coreboot/+/82730?usp=email ) Change subject: soc/intel/meteorlake: Enable USB2 port reset message on Type-C ports ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/meteorlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/82730/comment/b0ff8816_a11fbfca?us… : PS2, Line 481: s_cfg->PortResetMessageEnable[i] = 1 WDYT? ``` s_cfg->PortResetMessageEnable[i] = config->usb2_ports[i].type_c; ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82730?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac702a8d8edd2b3b7e03abcac020be7e45335821 Gerrit-Change-Number: 82730 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:14:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: device/dram/spd: Add missing <smbios.h>
by Elyes Haouas (Code Review) 01 Jun '24

01 Jun '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82245?usp=email to look at the new patch set (#2). Change subject: device/dram/spd: Add missing <smbios.h> ...................................................................... device/dram/spd: Add missing <smbios.h> smbios_memory_type needs <smbios.h>. Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/device/dram/spd.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/82245/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82245?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Gerrit-Change-Number: 82245 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: device/dram/spd: Add missing <smbios.h>
by Elyes Haouas (Code Review) 01 Jun '24

01 Jun '24

Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82245?usp=email ) Change subject: device/dram/spd: Add missing <smbios.h> ...................................................................... Patch Set 1: (1 comment) File src/device/dram/spd.c: https://review.coreboot.org/c/coreboot/+/82245/comment/5e3c6831_e92e7995?us… : PS1, Line 182: smbios_memory_type needs <smbios.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/82245?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iacab6171c61abd047c09ff7e20313a455bd8414f Gerrit-Change-Number: 82245 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 01 Jun 2024 07:09:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit June 2024