coreboot-gerrit June 2024

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[XS] Change in coreboot[main]: intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Hello Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82781?usp=email to look at the new patch set (#2). Change subject: intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP ...................................................................... intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP This patch is to switch Client ADL-N FSP headers to vendorcode from IOT headers. Also guard IOT headers & bin path with FSP_TYPE_IOT Kconfig. BUG=b:296433836 TEST=TBD Change-Id: I1ffcc3f284c213ff0533de3a0e228aacf523b380 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/82781/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82781?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ffcc3f284c213ff0533de3a0e228aacf523b380 Gerrit-Change-Number: 82781 Gerrit-PatchSet: 2 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[XL] Change in coreboot[main]: Revert "vc/intel/fsp2/alderlake_n: Drop unused header files"
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Ronak Kanabar has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82779?usp=email ) Change subject: Revert "vc/intel/fsp2/alderlake_n: Drop unused header files" ...................................................................... Revert "vc/intel/fsp2/alderlake_n: Drop unused header files" This reverts commit 79503ef515967ffceab7bd2a16a381e6a02c3d30. The Intel FSP repository at https://github.com/intel/FSP.git currently lacks the Client ADL-N headers. The existing coreboot code references the "IoT/AlderLakeN/" directory for these headers, but it is missing the crucial FspProducerDataHeader.h file. Without this header, the ADL-N platform is unable to utilize the appropriate MRC version needed for updating MRC caches. This patch aims to restore the necessary FSP headers for the ADL-N platform within the vendorcode directory. Change-Id: I99e9d5a07b4ca8d1666e3fd50d3d363ed5d4618e --- A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FirmwareVersionInfoHob.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspsUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/MemInfoHob.h 5 files changed, 7,655 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/82779/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82779?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99e9d5a07b4ca8d1666e3fd50d3d363ed5d4618e Gerrit-Change-Number: 82779 Gerrit-PatchSet: 2 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, Subrata Banik. Ronak Kanabar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82781?usp=email ) Change subject: intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP ...................................................................... intel/alderlake/Kconfig: Use vendorcode headers for Client ADL-N FSP This patch is to switch Client ADL-N FSP headers to vendorcode from IOT headers. Also guard IOT headers & bin path with FSP_TYPE_IOT Kconfig. BUG=b:296433836 TEST=Able to build and boot google/nivviks Change-Id: I1ffcc3f284c213ff0533de3a0e228aacf523b380 Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/82781/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index e0afe5a..a332424 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -116,7 +116,6 @@ config SOC_INTEL_ALDERLAKE_PCH_N bool - select HAVE_INTEL_FSP_REPO if !SOC_INTEL_TWINLAKE select SOC_INTEL_ALDERLAKE help Choose this option if your mainboard has a PCH-N chipset. @@ -408,7 +407,7 @@ default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Include/" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Include/" if SOC_INTEL_ALDERLAKE_PCH_S - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if SOC_INTEL_ALDERLAKE_PCH_N + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Include/" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" if !FSP_USE_REPO config FSP_FD_PATH @@ -422,7 +421,7 @@ default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && !SOC_INTEL_RAPTORLAKE default "3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_P && SOC_INTEL_RAPTORLAKE default "3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeS/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_S - default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N + default "3rdparty/fsp/AlderLakeFspBinPkg/IoT/AlderLakeN/Fsp.fd" if SOC_INTEL_ALDERLAKE_PCH_N && FSP_TYPE_IOT config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT int "Debug Consent for ADL" -- To view, visit https://review.coreboot.org/c/coreboot/+/82781?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ffcc3f284c213ff0533de3a0e228aacf523b380 Gerrit-Change-Number: 82781 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[M] Change in coreboot[main]: vc/intel/fsp: Update ADL N FSP headers from v3343.05 to v5021.00
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Ronak Kanabar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82780?usp=email ) Change subject: vc/intel/fsp: Update ADL N FSP headers from v3343.05 to v5021.00 ...................................................................... vc/intel/fsp: Update ADL N FSP headers from v3343.05 to v5021.00 Update generated FSP headers for Alder Lake N from v5021.00 Changes include: - Add FspProducerDataHeader.h header file BUG=b:296433836 TEST=Able to build and boot google/nivviks Change-Id: Ieb4cc8f2f83d8f6e821894f0ec2e56262a25743c Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspProducerDataHeader.h 1 file changed, 78 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/82780/1 diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspProducerDataHeader.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspProducerDataHeader.h new file mode 100644 index 0000000..2d75439 --- /dev/null +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspProducerDataHeader.h @@ -0,0 +1,78 @@ +/** @file + Copyright (c) 2023, Intel Corporation. All rights reserved.<BR> + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +**/ +#ifndef _FSP_PRODUCER_DATA_HEADER_H_ +#define _FSP_PRODUCER_DATA_HEADER_H_ + +#include <Guid/FspHeaderFile.h> + +#define BUILD_TIME_STAMP_SIZE 12 + +// +// FSP Header Data structure from FspHeader driver. +// +#pragma pack(1) +/// +/// FSP Producer Data Subtype - 1 +/// +typedef struct { + /// + /// Byte 0x00: Length of this FSP producer data type record. + /// + UINT16 Length; + /// + /// Byte 0x02: FSP producer data type. + /// + UINT8 Type; + /// + /// Byte 0x03: Revision of this FSP producer data type. + /// + UINT8 Revision; + /// + /// Byte 0x04: 4 byte field of RC version which is used to build this FSP image. + /// + UINT32 RcVersion; + /// + /// Byte 0x08: Represents the build time stamp "YYYYMMDDHHMM". + /// + UINT8 BuildTimeStamp[BUILD_TIME_STAMP_SIZE]; +} FSP_PRODUCER_DATA_TYPE1; + +/// +/// FSP Producer Data Subtype - 2 +/// +typedef struct { + /// + /// Byte 0x00: Length of this FSP producer data type record. + /// + UINT16 Length; + /// + /// Byte 0x02: FSP producer data type. + /// + UINT8 Type; + /// + /// Byte 0x03: Revision of this FSP producer data type. + /// + UINT8 Revision; + /// + /// Byte 0x04: 4 byte field of Mrc version which is used to build this FSP image. + /// + UINT8 MrcVersion [4]; +} FSP_PRODUCER_DATA_TYPE2; + +typedef struct { + FSP_INFO_HEADER FspInfoHeader; + FSP_INFO_EXTENDED_HEADER FspInfoExtendedHeader; + FSP_PRODUCER_DATA_TYPE1 FspProduceDataType1; + FSP_PRODUCER_DATA_TYPE2 FspProduceDataType2; + FSP_PATCH_TABLE FspPatchTable; +} FSP_PRODUCER_DATA_TABLES; +#pragma pack() + +#endif // _FSP_PRODUCER_DATA_HEADER_H -- To view, visit https://review.coreboot.org/c/coreboot/+/82780?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ieb4cc8f2f83d8f6e821894f0ec2e56262a25743c Gerrit-Change-Number: 82780 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com>

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[XL] Change in coreboot[main]: Revert "vc/intel/fsp2/alderlake_n: Drop unused header files"
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Ronak Kanabar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82779?usp=email ) Change subject: Revert "vc/intel/fsp2/alderlake_n: Drop unused header files" ...................................................................... Revert "vc/intel/fsp2/alderlake_n: Drop unused header files" This reverts commit 79503ef515967ffceab7bd2a16a381e6a02c3d30. The Intel FSP repository at https://github.com/intel/FSP.git currently lacks the Client ADL-N headers. The existing coreboot code references the "IoT/AlderLakeN/" directory for these headers, but it is missing the crucial FspProducerDataHeader.h file. Without this header, the ADL-N platform is unable to utilize the appropriate MRC version needed for updating MRC caches. This patch aims to restore the necessary FSP headers for the ADL-N platform within the vendorcode directory. Change-Id: I99e9d5a07b4ca8d1666e3fd50d3d363ed5d4618e --- A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FirmwareVersionInfoHob.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspmUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/FspsUpd.h A src/vendorcode/intel/fsp/fsp2_0/alderlake_n/MemInfoHob.h 5 files changed, 7,655 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/82779/1 -- To view, visit https://review.coreboot.org/c/coreboot/+/82779?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I99e9d5a07b4ca8d1666e3fd50d3d363ed5d4618e Gerrit-Change-Number: 82779 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com>

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[XS] Change in coreboot[main]: soc/intel/alderlake: select Kconfig MRC_CACHE_USING_MRC_VERSION
by Ronak Kanabar (Code Review) 03 Jun '24

03 Jun '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Krishna P Bhat D, Nick Vaccaro, Ronak Kanabar, V Sowmya. Hello Dinesh Gehlot, Kapil Porwal, Krishna P Bhat D, Nick Vaccaro, Subrata Banik, V Sowmya, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81038?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/alderlake: select Kconfig MRC_CACHE_USING_MRC_VERSION ...................................................................... soc/intel/alderlake: select Kconfig MRC_CACHE_USING_MRC_VERSION This patch is to add support to store MRC cache using MRC version in ADL-N & TWL. select MRC_CACHE_USING_MRC_VERSION if SOC_INTEL_ALDERLAKE_PCH_N selected. BUG=b:296433836 Change-Id: Icc7e4ecd84a7d2818d54acc6ac5d0592544bb9ce Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/81038/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/81038?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icc7e4ecd84a7d2818d54acc6ac5d0592544bb9ce Gerrit-Change-Number: 81038 Gerrit-PatchSet: 7 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: V Sowmya <v.sowmya(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com>

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[S] Change in coreboot[main]: nb/via/cx700: Perform early bootblock init
by Nico Huber (Code Review) 03 Jun '24

03 Jun '24

Nico Huber has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/82768?usp=email ) Change subject: nb/via/cx700: Perform early bootblock init ...................................................................... nb/via/cx700: Perform early bootblock init Disable a timer (GP3) that is always running by default. And enable SMBus, which is useful this early as a console. The SMBus controller is mostly compatible to the Intel one. Change-Id: I77f179433b280d67860fc495605b5764ed081a6c Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/via/cx700/Kconfig M src/northbridge/via/cx700/Makefile.mk A src/northbridge/via/cx700/bootblock.c A src/northbridge/via/cx700/early_smbus.c 4 files changed, 36 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/82768/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82768?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I77f179433b280d67860fc495605b5764ed081a6c Gerrit-Change-Number: 82768 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining
by Subrata Banik (Code Review) 03 Jun '24

03 Jun '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, SH Kim. Subrata Banik has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/82778?usp=email ) Change subject: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82778?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia346ce559b4509ea1a63abe28b12ad909f9b7b0d Gerrit-Change-Number: 82778 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jun 2024 09:29:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining
by Eric Lai (Code Review) 03 Jun '24

03 Jun '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, SH Kim, Subrata Banik. Eric Lai has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/82778?usp=email ) Change subject: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82778?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia346ce559b4509ea1a63abe28b12ad909f9b7b0d Gerrit-Change-Number: 82778 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 03 Jun 2024 09:13:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining
by SH Kim (Code Review) 03 Jun '24

03 Jun '24

SH Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82778?usp=email ) Change subject: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining ...................................................................... mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining Set LpDdrDqDqsReTraining to 1 for xol. Value 0 will cause black screen issue. Reference: https://review.coreboot.org/c/coreboot/+/79527 > FSP default value for LpDdrDqDqsReTraining is 1. For boards > that didn't set LpDdrDqDqsReTraining to any value, 0 was being > assigned and it caused black screen issue. BUG=b:332980211 BRANCH=brya TEST=Built and verified there is no black screen issue during power on/off test for over 100 cycles. Change-Id: Ia346ce559b4509ea1a63abe28b12ad909f9b7b0d Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/xol/memory.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/82778/1 diff --git a/src/mainboard/google/brya/variants/xol/memory.c b/src/mainboard/google/brya/variants/xol/memory.c index 4e29412..b0cbaad 100644 --- a/src/mainboard/google/brya/variants/xol/memory.c +++ b/src/mainboard/google/brya/variants/xol/memory.c @@ -63,6 +63,8 @@ .ccc_config = 0xff, }, + .LpDdrDqDqsReTraining = 1, + .ect = 1, /* Early Command Training */ .UserBd = BOARD_TYPE_ULT_ULX, -- To view, visit https://review.coreboot.org/c/coreboot/+/82778?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia346ce559b4509ea1a63abe28b12ad909f9b7b0d Gerrit-Change-Number: 82778 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com>

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coreboot-gerrit June 2024