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Change subject: device/azalia_device.c: Use `azalia_enter_reset()`
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Patch Set 1: Code-Review+2
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Change subject: acpi: Add support for DRHD size reporting
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Patch Set 17:
(1 comment)
File src/include/acpi/acpi.h:
https://review.coreboot.org/c/coreboot/+/82429/comment/481f552e_adc65dbd?us… :
PS16, Line 1855: u32
> The register encoding as described in the spec works this way. […]
I mean the change to `_64`.
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Change subject: x86: Change MMIO addr in readN(addr)/writeN(addr, val) to pointer
......................................................................
Patch Set 10:
(1 comment)
File src/device/azalia_device.c:
https://review.coreboot.org/c/coreboot/+/7784/comment/e60449bd_cb3f826b?usp… :
PS10, Line 62: codec_detect(u8 *base)
> Please why the "base" changed from `u32` to `u8`?
It didn't. It was changed to a pointer to `u8`. That's a different type.
The reason `u8 *` is used is that there is pointer arithmetic going on, e.g.
```
if (set_bits(base + 0x08, ...
```
If we want this `+ 0x08` to mean 8 *bytes* higher in memory, the pointer needs
to point to something of 1B size. (some people use `void *` instead which works
too if one knows that the compiler implies a size of 1B but it's not standard C).
> shouldn't be `uintptr_t`
Not in the context of this patch. The summary says: "x86: Change [...] to pointer".
So the intention was to make more use of pointers. Back then we didn't have the
readXXp()/writeXXp() versions, so using pointers avoided a lot of casts, I guess.
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Change subject: payloads/depthcharge: support depthcharge build with local changes
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Patch Set 1: Code-Review+1
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Change subject: soc/intel/xeon_sp: Reserve MMIO range for VTd BAR dynamically
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Patch Set 20: Code-Review+2
(1 comment)
File src/soc/intel/xeon_sp/include/soc/chip_common.h:
https://review.coreboot.org/c/coreboot/+/82431/comment/71669c46_4e222d93?us… :
PS19, Line 93: uint32_t
> `size_t` please.
Done
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Change subject: acpi: Add support for DRHD size reporting
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Patch Set 17:
(1 comment)
File src/include/acpi/acpi.h:
https://review.coreboot.org/c/coreboot/+/82429/comment/bfa0d5c0_c9193004?us… :
PS16, Line 1855: u32
> TBH, I don't get the log2_64().
The register encoding as described in the spec works this way. A bitfield value of N means `2^N` 4k pages.
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Change subject: acpi: Add support for DRHD size reporting
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Patch Set 17: Code-Review+1
(1 comment)
File src/include/acpi/acpi.h:
https://review.coreboot.org/c/coreboot/+/82429/comment/8912826c_ffdd686c?us… :
PS16, Line 1855: u32
> Done
TBH, I don't get the log2_64().
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Change subject: src/lib: Add Kconfig variable for fw_config default value
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Please see my other comment and patch set 3 for new changes.
Acknowledged
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Change subject: src/lib: Add Kconfig variable for fw_config default value
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS2:
> If fw_config_value is all '1's, fw_config_is_provisioned() returns false. […]
Please see my other comment and patch set 3 for new changes.
File src/Kconfig:
https://review.coreboot.org/c/coreboot/+/83153/comment/be42a301_c0fc28b8?us… :
PS2, Line 548: 0x00000
> Good point! This is used in make build environment where no CBI value is synced from config.star. […]
I change default value to UNDEFINED_FW_CONFIG and this won't be used unless config.<board> has different value. We are using this to assign fw_config value in make build environment and using simulation environment.
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